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--------------------------------------------------------------------------------
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-- obj_code_pkg.vhdl -- Application object code in vhdl constant string format.
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--------------------------------------------------------------------------------
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-- Built for project '@project_name@'.
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--------------------------------------------------------------------------------
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-- This file contains object code in the form of a VHDL byte table constant.
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-- This constant can be used to initialize FPGA memories for synthesis or
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-- simulation.
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-- Note that the object code is stored as a plain byte table in byte address
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-- order. This table knows nothing of data endianess and can be used to
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-- initialize 32-, 16- or 8-bit-wide memory -- memory initialization functions
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-- can be found in package mips_pkg.
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--------------------------------------------------------------------------------
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-- Copyright (C) 2012 Jose A. Ruiz
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--
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-- This source file may be used and distributed without
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-- restriction provided that this copyright statement is not
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-- removed from the file and that any derivative work contains
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-- the original copyright notice and the associated disclaimer.
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--
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-- This source file is free software; you can redistribute it
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-- and/or modify it under the terms of the GNU Lesser General
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-- Public License as published by the Free Software Foundation;
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-- either version 2.1 of the License, or (at your option) any
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-- later version.
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--
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-- This source is distributed in the hope that it will be
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-- useful, but WITHOUT ANY WARRANTY; without even the implied
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-- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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-- PURPOSE. See the GNU Lesser General Public License for more
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-- details.
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--
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-- You should have received a copy of the GNU Lesser General
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-- Public License along with this source; if not, download it
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-- from http://www.opencores.org/lgpl.shtml
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--------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.mips_pkg.all;
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package @obj_pkg_name@ is
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-- Hardcoded simulation parameters ---------------------------------------------
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-- Simulation clock rate
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constant CLOCK_RATE : integer := 50e6;
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-- Simulation clock period
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constant T : time := (1.0e9/real(CLOCK_RATE)) * 1 ns;
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-- Other simulation parameters -------------------------------------------------
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@constants@
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-- Memory initialization data --------------------------------------------------
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@obj_tables@
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end package @obj_pkg_name@;
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