1 |
64 |
ja_rd |
--------------------------------------------------------------------------------
|
2 |
|
|
-- mips_pkg.vhdl -- Configuration constants & utility types and functions
|
3 |
|
|
--------------------------------------------------------------------------------
|
4 |
|
|
-- IMPORTANT:
|
5 |
|
|
-- Here's where you define the memory map of the system, in the implementation
|
6 |
|
|
-- of function decode_addr.
|
7 |
|
|
-- You need to change that function to change the memory map, independent of any
|
8 |
|
|
-- additional address decoding you may do out of the FPGA (e.g. if you have more
|
9 |
|
|
-- than one chip on any data bus) or out of the MCU module (e.g. when you add
|
10 |
|
|
-- new IO registers).
|
11 |
|
|
-- Please see the module c2sb_demo and mips_mcu for examples of memory decoding.
|
12 |
|
|
--------------------------------------------------------------------------------
|
13 |
162 |
ja_rd |
-- Copyright (C) 2011 Jose A. Ruiz
|
14 |
161 |
ja_rd |
--
|
15 |
|
|
-- This source file may be used and distributed without
|
16 |
|
|
-- restriction provided that this copyright statement is not
|
17 |
|
|
-- removed from the file and that any derivative work contains
|
18 |
|
|
-- the original copyright notice and the associated disclaimer.
|
19 |
|
|
--
|
20 |
|
|
-- This source file is free software; you can redistribute it
|
21 |
|
|
-- and/or modify it under the terms of the GNU Lesser General
|
22 |
|
|
-- Public License as published by the Free Software Foundation;
|
23 |
|
|
-- either version 2.1 of the License, or (at your option) any
|
24 |
|
|
-- later version.
|
25 |
|
|
--
|
26 |
|
|
-- This source is distributed in the hope that it will be
|
27 |
|
|
-- useful, but WITHOUT ANY WARRANTY; without even the implied
|
28 |
|
|
-- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
29 |
|
|
-- PURPOSE. See the GNU Lesser General Public License for more
|
30 |
|
|
-- details.
|
31 |
|
|
--
|
32 |
|
|
-- You should have received a copy of the GNU Lesser General
|
33 |
|
|
-- Public License along with this source; if not, download it
|
34 |
|
|
-- from http://www.opencores.org/lgpl.shtml
|
35 |
|
|
--------------------------------------------------------------------------------
|
36 |
64 |
ja_rd |
|
37 |
2 |
ja_rd |
library ieee;
|
38 |
|
|
use ieee.std_logic_1164.all;
|
39 |
|
|
use ieee.std_logic_arith.all;
|
40 |
|
|
use ieee.std_logic_unsigned.all;
|
41 |
|
|
|
42 |
|
|
package mips_pkg is
|
43 |
|
|
|
44 |
64 |
ja_rd |
---- Basic types ---------------------------------------------------------------
|
45 |
|
|
|
46 |
|
|
subtype t_word is std_logic_vector(31 downto 0);
|
47 |
225 |
ja_rd |
subtype t_halfword is std_logic_vector(15 downto 0);
|
48 |
|
|
subtype t_byte is std_logic_vector(7 downto 0);
|
49 |
64 |
ja_rd |
|
50 |
|
|
---- System configuration constants --------------------------------------------
|
51 |
|
|
|
52 |
|
|
-- True to use standard-ish MIPS-1 memory map, false to use Plasma's
|
53 |
|
|
-- (see implementation of function decode_addr below).
|
54 |
|
|
constant USE_MIPS1_ADDR_MAP : boolean := true;
|
55 |
|
|
|
56 |
|
|
-- Reset vector address minus 4 (0xfffffffc for Plasma, 0xbfbffffc for mips1)
|
57 |
|
|
constant RESET_VECTOR_M4 : t_word := X"bfbffffc";
|
58 |
|
|
|
59 |
|
|
-- Trap vector address (0x0000003c for Plasma, 0xbfc00180 for mips1)
|
60 |
|
|
constant TRAP_VECTOR : t_word := X"bfc00180";
|
61 |
|
|
|
62 |
225 |
ja_rd |
-- Object code in bytes, i.e. as read from a binary or HEX file.
|
63 |
|
|
-- This type is used to define BRAM init constants from external scripts.
|
64 |
|
|
type t_obj_code is array(integer range <>) of std_logic_vector(7 downto 0);
|
65 |
64 |
ja_rd |
|
66 |
225 |
ja_rd |
-- Types used to define memories for synthesis or simulation.
|
67 |
|
|
type t_word_table is array(integer range <>) of t_word;
|
68 |
|
|
type t_hword_table is array(integer range <>) of t_halfword;
|
69 |
|
|
type t_byte_table is array(integer range <>) of t_byte;
|
70 |
|
|
|
71 |
|
|
---- Object code management -- initialization helper functions -----------------
|
72 |
|
|
|
73 |
|
|
-- Dummy t_obj_code constant, to be used essentially as a syntactic placeholder.
|
74 |
|
|
constant default_object_code : t_obj_code(0 to 3) := (
|
75 |
|
|
X"00", X"00", X"00", X"00"
|
76 |
|
|
);
|
77 |
|
|
|
78 |
|
|
-- Builds BRAM initialization constant from a constant CONSTRAINED byte array
|
79 |
|
|
-- containing the application object code.
|
80 |
|
|
-- The constant is a 32-bit, big endian word table.
|
81 |
|
|
-- The object code is placed at the beginning of the BRAM and the rest is
|
82 |
|
|
-- filled with zeros.
|
83 |
|
|
-- The object code is truncated if it doesn't fit the given table size.
|
84 |
|
|
-- CAN BE USED IN SYNTHESIZABLE CODE to compute a BRAM initialization constant
|
85 |
|
|
-- from a constant argument.
|
86 |
|
|
function objcode_to_wtable(oC : t_obj_code; size : integer) return t_word_table;
|
87 |
|
|
|
88 |
|
|
-- Builds BRAM initialization constant from a constant CONSTRAINED byte array
|
89 |
|
|
-- containing the application object code.
|
90 |
|
|
-- The constant is a 32-bit, big endian word table.
|
91 |
|
|
-- The object code is placed at the beginning of the BRAM and the rest is
|
92 |
|
|
-- filled with zeros.
|
93 |
|
|
-- The object code is truncated if it doesn't fit the given table size.
|
94 |
|
|
-- CAN BE USED IN SYNTHESIZABLE CODE to compute a BRAM initialization constant
|
95 |
|
|
-- from a constant argument.
|
96 |
|
|
function objcode_to_htable(oC : t_obj_code; size : integer) return t_hword_table;
|
97 |
|
|
|
98 |
|
|
-- Builds BRAM initialization constant from a constant CONSTRAINED byte array
|
99 |
|
|
-- containing the application object code.
|
100 |
|
|
-- The constant is an 8-bit byte table.
|
101 |
|
|
-- The object code is placed at the beginning of the BRAM and the rest is
|
102 |
|
|
-- filled with zeros.
|
103 |
|
|
-- The object code is truncated if it doesn't fit the given table size.
|
104 |
|
|
-- CAN BE USED IN SYNTHESIZABLE CODE to compute a BRAM initialization constant
|
105 |
|
|
-- from a constant argument.
|
106 |
|
|
function objcode_to_btable(oC : t_obj_code; size : integer) return t_byte_table;
|
107 |
|
|
|
108 |
|
|
|
109 |
|
|
|
110 |
64 |
ja_rd |
---- Address decoding ----------------------------------------------------------
|
111 |
|
|
|
112 |
|
|
-- Note: it is the cache module that does all internal address decoding --------
|
113 |
|
|
|
114 |
|
|
-- This is the slice of the address that will be used to decode memory areas
|
115 |
48 |
ja_rd |
subtype t_addr_decode is std_logic_vector(31 downto 24);
|
116 |
37 |
ja_rd |
|
117 |
64 |
ja_rd |
-- Part of the memory area attribute: the type of memory determines how the
|
118 |
|
|
-- cache module handles each block
|
119 |
72 |
ja_rd |
subtype t_memory_type is std_logic_vector(7 downto 5);
|
120 |
64 |
ja_rd |
-- These are all the types the cache knows about
|
121 |
|
|
constant MT_BRAM : t_memory_type := "000";
|
122 |
|
|
constant MT_IO_SYNC : t_memory_type := "001";
|
123 |
|
|
constant MT_SRAM_16B : t_memory_type := "010";
|
124 |
75 |
ja_rd |
constant MT_SRAM_8B : t_memory_type := "011";
|
125 |
64 |
ja_rd |
constant MT_DDR_16B : t_memory_type := "100";
|
126 |
|
|
constant MT_UNMAPPED : t_memory_type := "111";
|
127 |
37 |
ja_rd |
|
128 |
72 |
ja_rd |
-- Wait state counter -- we're supporting static memory from 10 to >100 ns
|
129 |
|
|
subtype t_wait_state_count is std_logic_vector(2 downto 0);
|
130 |
64 |
ja_rd |
|
131 |
72 |
ja_rd |
-- 'Attributes' of some memory block -- used when decoding memory addresses
|
132 |
|
|
type t_range_attr is record
|
133 |
|
|
mem_type : t_memory_type;
|
134 |
|
|
writeable : std_logic;
|
135 |
|
|
cacheable : std_logic;
|
136 |
|
|
wait_states : t_wait_state_count;
|
137 |
|
|
end record t_range_attr;
|
138 |
|
|
|
139 |
|
|
|
140 |
|
|
|
141 |
64 |
ja_rd |
---- More basic types and constants --------------------------------------------
|
142 |
|
|
|
143 |
2 |
ja_rd |
subtype t_addr is std_logic_vector(31 downto 0);
|
144 |
|
|
subtype t_dword is std_logic_vector(63 downto 0);
|
145 |
|
|
subtype t_regnum is std_logic_vector(4 downto 0);
|
146 |
|
|
type t_rbank is array(0 to 31) of t_word;
|
147 |
|
|
subtype t_pc is std_logic_vector(31 downto 2);
|
148 |
64 |
ja_rd |
-- This is used as a textual shortcut only
|
149 |
2 |
ja_rd |
constant ZERO : t_word := (others => '0');
|
150 |
64 |
ja_rd |
-- control word for ALU
|
151 |
2 |
ja_rd |
type t_alu_control is record
|
152 |
|
|
logic_sel : std_logic_vector(1 downto 0);
|
153 |
|
|
shift_sel : std_logic_vector(1 downto 0);
|
154 |
|
|
shift_amount : std_logic_vector(4 downto 0);
|
155 |
|
|
neg_sel : std_logic_vector(1 downto 0);
|
156 |
|
|
use_arith : std_logic;
|
157 |
|
|
use_logic : std_logic_vector(1 downto 0);
|
158 |
|
|
cy_in : std_logic;
|
159 |
|
|
use_slt : std_logic;
|
160 |
|
|
arith_unsigned : std_logic;
|
161 |
|
|
end record t_alu_control;
|
162 |
64 |
ja_rd |
-- Flags coming from the ALU
|
163 |
2 |
ja_rd |
type t_alu_flags is record
|
164 |
|
|
inp1_lt_zero : std_logic;
|
165 |
|
|
inp1_eq_zero : std_logic;
|
166 |
|
|
inp1_lt_inp2 : std_logic;
|
167 |
|
|
inp1_eq_inp2 : std_logic;
|
168 |
|
|
end record t_alu_flags;
|
169 |
|
|
|
170 |
134 |
ja_rd |
-- Debug info output by sinthesizable MPU core; meant to debug the core itself,
|
171 |
|
|
-- not to debug software!
|
172 |
|
|
type t_debug_info is record
|
173 |
|
|
cache_enabled : std_logic;
|
174 |
|
|
unmapped_access : std_logic;
|
175 |
|
|
end record t_debug_info;
|
176 |
|
|
|
177 |
|
|
|
178 |
12 |
ja_rd |
-- 32-cycle mul/div module control. Bits 4-3 & 1-0 of IR.
|
179 |
|
|
subtype t_mult_function is std_logic_vector(3 downto 0);
|
180 |
|
|
constant MULT_NOTHING : t_mult_function := "0000";
|
181 |
|
|
constant MULT_READ_LO : t_mult_function := "1010"; -- 18
|
182 |
|
|
constant MULT_READ_HI : t_mult_function := "1000"; -- 16
|
183 |
|
|
constant MULT_WRITE_LO : t_mult_function := "1011"; -- 19
|
184 |
|
|
constant MULT_WRITE_HI : t_mult_function := "1001"; -- 17
|
185 |
|
|
constant MULT_MULT : t_mult_function := "1101"; -- 25
|
186 |
|
|
constant MULT_SIGNED_MULT : t_mult_function := "1100"; -- 24
|
187 |
|
|
constant MULT_DIVIDE : t_mult_function := "1111"; -- 26
|
188 |
|
|
constant MULT_SIGNED_DIVIDE : t_mult_function := "1110"; -- 27
|
189 |
|
|
|
190 |
37 |
ja_rd |
-- Computes ceil(log2(A)), e.g. address width of memory block
|
191 |
|
|
-- CAN BE USED IN SYNTHESIZABLE CODE as long as called with constant arguments
|
192 |
|
|
function log2(A : natural) return natural;
|
193 |
12 |
ja_rd |
|
194 |
64 |
ja_rd |
-- Decodes a memory address, gives the type of memory
|
195 |
|
|
-- CAN BE USED IN SYNTHESIZABLE CODE, argument does not need to be constant
|
196 |
|
|
function decode_addr(addr : t_addr_decode) return t_range_attr;
|
197 |
37 |
ja_rd |
|
198 |
64 |
ja_rd |
|
199 |
2 |
ja_rd |
end package;
|
200 |
37 |
ja_rd |
|
201 |
|
|
package body mips_pkg is
|
202 |
|
|
|
203 |
|
|
function log2(A : natural) return natural is
|
204 |
|
|
begin
|
205 |
|
|
for I in 1 to 30 loop -- Works for up to 32 bit integers
|
206 |
85 |
ja_rd |
if(2**I >= A) then
|
207 |
|
|
return(I);
|
208 |
37 |
ja_rd |
end if;
|
209 |
|
|
end loop;
|
210 |
|
|
return(30);
|
211 |
|
|
end function log2;
|
212 |
|
|
|
213 |
64 |
ja_rd |
-- Address decoding for Plasma-like system
|
214 |
|
|
function decode_addr_plasma(addr : t_addr_decode) return t_range_attr is
|
215 |
|
|
begin
|
216 |
|
|
|
217 |
|
|
case addr(31 downto 27) is
|
218 |
72 |
ja_rd |
when "00000" => return (MT_BRAM ,'0','0',"000"); -- useg
|
219 |
|
|
when "10000" => return (MT_SRAM_16B ,'1','1',"000"); -- kseg0
|
220 |
|
|
when "00100" => return (MT_IO_SYNC ,'1','0',"000"); -- kseg1 i/o
|
221 |
|
|
when others => return (MT_UNMAPPED ,'0','0',"000"); -- stray
|
222 |
64 |
ja_rd |
end case;
|
223 |
|
|
|
224 |
|
|
end function decode_addr_plasma;
|
225 |
|
|
|
226 |
75 |
ja_rd |
-- Address decoding for MIPS-I-like system as implemented in target hardware
|
227 |
64 |
ja_rd |
function decode_addr_mips1(addr : t_addr_decode) return t_range_attr is
|
228 |
|
|
begin
|
229 |
|
|
|
230 |
|
|
case addr(31 downto 27) is
|
231 |
120 |
ja_rd |
when "00000" => return (MT_SRAM_16B ,'1','1',"010"); -- useg
|
232 |
|
|
when "10000" => return (MT_SRAM_16B ,'1','1',"010"); -- kseg0
|
233 |
72 |
ja_rd |
--when "10100" => return (MT_IO_SYNC ,'1','0',"000"); -- kseg1 i/o
|
234 |
|
|
when "00100" => return (MT_IO_SYNC ,'1','0',"000"); -- kseg1 i/o
|
235 |
120 |
ja_rd |
when "10110" => return (MT_SRAM_8B ,'0','0',"111"); -- kseg1 flash
|
236 |
72 |
ja_rd |
when "10111" => return (MT_BRAM ,'0','0',"000"); -- kseg1 boot rom
|
237 |
|
|
when others => return (MT_UNMAPPED ,'0','0',"000"); -- stray
|
238 |
64 |
ja_rd |
end case;
|
239 |
|
|
|
240 |
|
|
end function decode_addr_mips1;
|
241 |
|
|
|
242 |
|
|
|
243 |
|
|
function decode_addr(addr : t_addr_decode) return t_range_attr is
|
244 |
|
|
begin
|
245 |
|
|
if USE_MIPS1_ADDR_MAP then
|
246 |
|
|
return decode_addr_mips1(addr);
|
247 |
|
|
else
|
248 |
|
|
return decode_addr_plasma(addr);
|
249 |
|
|
end if;
|
250 |
|
|
|
251 |
|
|
end function decode_addr;
|
252 |
|
|
|
253 |
225 |
ja_rd |
function objcode_to_wtable(oC : t_obj_code;
|
254 |
|
|
size : integer)
|
255 |
|
|
return t_word_table is
|
256 |
|
|
variable br : t_word_table(integer range 0 to size-1):=(others => X"00000000");
|
257 |
|
|
variable i, address, index : integer;
|
258 |
|
|
begin
|
259 |
|
|
|
260 |
|
|
-- Copy object code to start of BRAM...
|
261 |
|
|
i := 0;
|
262 |
|
|
for i in 0 to oC'length-1 loop
|
263 |
|
|
case i mod 4 is
|
264 |
|
|
when 0 => index := 24;
|
265 |
|
|
when 1 => index := 16;
|
266 |
|
|
when 2 => index := 8;
|
267 |
|
|
when others => index := 0;
|
268 |
|
|
end case;
|
269 |
|
|
|
270 |
|
|
address := i / 4;
|
271 |
|
|
if address >= size then
|
272 |
|
|
exit;
|
273 |
|
|
end if;
|
274 |
|
|
br(address)(index+7 downto index) := oC(i);
|
275 |
|
|
end loop;
|
276 |
|
|
|
277 |
|
|
return br;
|
278 |
|
|
end function objcode_to_wtable;
|
279 |
|
|
|
280 |
|
|
|
281 |
|
|
function objcode_to_htable(oC : t_obj_code;
|
282 |
|
|
size : integer)
|
283 |
|
|
return t_hword_table is
|
284 |
|
|
variable br : t_hword_table(integer range 0 to size-1):=(others => X"0000");
|
285 |
|
|
variable i, address, index : integer;
|
286 |
|
|
begin
|
287 |
|
|
|
288 |
|
|
-- Copy object code to start of BRAM...
|
289 |
|
|
i := 0;
|
290 |
|
|
for i in 0 to oC'length-1 loop
|
291 |
|
|
case i mod 2 is
|
292 |
|
|
when 1 => index := 8;
|
293 |
|
|
when others => index := 0;
|
294 |
|
|
end case;
|
295 |
|
|
|
296 |
|
|
address := i / 2;
|
297 |
|
|
if address >= size then
|
298 |
|
|
exit;
|
299 |
|
|
end if;
|
300 |
|
|
br(address)(index+7 downto index) := oC(i);
|
301 |
|
|
end loop;
|
302 |
|
|
|
303 |
|
|
|
304 |
|
|
return br;
|
305 |
|
|
end function objcode_to_htable;
|
306 |
|
|
|
307 |
|
|
function objcode_to_btable(oC : t_obj_code;
|
308 |
|
|
size : integer)
|
309 |
|
|
return t_byte_table is
|
310 |
|
|
variable br : t_byte_table(integer range 0 to size-1):=(others => X"00");
|
311 |
|
|
variable i, address, index : integer;
|
312 |
|
|
begin
|
313 |
|
|
|
314 |
|
|
-- Copy object code to start of table, leave the rest of the table
|
315 |
|
|
for i in 0 to oC'length-1 loop
|
316 |
|
|
if i >= size then
|
317 |
|
|
exit;
|
318 |
|
|
end if;
|
319 |
|
|
br(i) := oC(i);
|
320 |
|
|
end loop;
|
321 |
|
|
|
322 |
|
|
return br;
|
323 |
|
|
end function objcode_to_btable;
|
324 |
|
|
|
325 |
37 |
ja_rd |
end package body;
|