URL https://opencores.org/ocsvn/iota_pow_vhdl/iota_pow_vhdl/trunk

Subversion Repositories iota_pow_vhdl

[/] [iota_pow_vhdl/] [trunk/] [vhdl_cyclone10_lp/] [pll.qip] - Blame information for rev 4

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set_global_assignment -name IP_TOOL_NAME "ALTPLL"
set_global_assignment -name IP_TOOL_VERSION "17.1"
set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone 10 LP}"
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "pll.vhd"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll.cmp"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll.ppf"]

Line No.	Rev	Author	Line
1	4	microengin	`set_global_assignment -name IP_TOOL_NAME "ALTPLL"`
2			`set_global_assignment -name IP_TOOL_VERSION "17.1"`
3			`set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone 10 LP}"`
4			`set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "pll.vhd"]`
5			`set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll.cmp"]`
6			`set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll.ppf"]`

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Subversion Repositories iota_pow_vhdl

[/] [iota_pow_vhdl/] [trunk/] [vhdl_cyclone10_lp/] [pll.qip] - Blame information for rev 4