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/******************************************************************************
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* Numonyx™ 128 Mbit EMBEDDED FLASH MEMORY J3 Version D *
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******************************************************************************
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* REFERENCES *
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* [1] Numonyx™ Embedded Flash Memory(J3 v. D) Datasheet Revision 5 *
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* *
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******************************************************************************
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* Copyright (C)2011 Mathias Hörtnagl <mathias.hoertnagl@gmail.com> *
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* *
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* This program is free software: you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation, either version 3 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program. If not, see <http://www.gnu.org/licenses/>. *
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******************************************************************************/
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#include "stddef.h"
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#ifndef _FLASH_H
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#define _FLASH_H
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/* Flash memory location */
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#define FLASH_MEMORY ((volatile uchar *) 0x10000000)
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/* Flash status register flags. */
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#define FLASH_READY ((uint) 0x80) // Bit 8: Flash is ready.
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#define FLASH_ERASE_ERROR ((uint) 0x20) // Bit 5: Error while errasing.
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#define FLASH_PROGRAM_ERROR ((uint) 0x10) // Bit 4: Error while programming.
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#define FLASH_CMD_ERROR (FLASH_ERASE_ERROR | FLASH_PROGRAM_ERROR)
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#define FLASH_BLOCK_LOCKED ((uint) 0x02) // Bit 2: Block is locked.
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/* Status register commands */
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#define CMD_READ_SR ((uint) 0x70) // Read the status register.
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#define CMD_CLEAR_SR ((uint) 0x50) // Clear error states.
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/* Memory operations */
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#define CMD_READ_ARRAY ((uint) 0xff) // Read 32bit of data.
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#define CMD_BYTE_PROGRAM ((uint) 0x10) // Write one byte of data.
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#define CMD_BLOCK_ERASE_SETUP ((uint) 0x20) // Setup erase command.
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#define CMD_BLOCK_ERASE_CONFIRM ((uint) 0xd0) // Confirm errase command.
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/* Memory size */
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#define FLASH_BLOCK_SIZE 131072 // Size of one block in bytes.
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#define FLASH_BLOCKS 128 // Number of blocks available.
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/* Read the status register. */
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extern uchar flash_read_status();
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/* Clear the status register.
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The Status Register (SR) contain status and error bits which are set by the
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device. SR status bits are cleared by the device, however SR error bits are
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cleared by issuing the Clear Status Register command. Resetting the device
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also clears the Status Register. */
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extern void flash_clear_sr();
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/* Write a byte of data to a specific device address.
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Writing only changes '1' to '0'. If you overwrite data that would change '0'
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to '1', erase the block beforhand.
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Issuing the Read Array command to the device while it is actively programming
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causes subsequent reads from the device to output invalid data. [1] */
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extern void flash_write(uint adr, uchar b);
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/* Read 32bit of data from a specific device address.
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Issues a Read Array Command each time, although device stays in Array Read
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mode until another command operation takes place. */
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extern uint flash_read(uint adr);
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/* Erase block. Point to an address within the block address space you want to
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erase. 16 Mbytes or 8 Mword (128-Mbit), organized as 128-Kbyte erase blocks.
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Erasing is performed on a block basis - an entire block is erased each time
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an erase command sequence is issued. Once a block is fully erased, all
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addressable locations within that block read as logical ones (FFFFh). [1] */
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extern void flash_block_erase(uint blk);
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/* Wait for the end of a operation and return the status register when ready.
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Block erasure and writing data takes longer than a WB write operation.
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So after each erase or write call flash_wait() or do something else
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meanwhile. */
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extern uchar flash_wait();
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#endif
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