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https://opencores.org/ocsvn/layer2/layer2/trunk
[/] [layer2/] [trunk/] [vhdl/] [vga/] [bench/] [tb_vga.vhd] - Blame information for rev 2
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idiolatrie |
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-- --
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--------------------------------------------------------------------------------
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-- Version: 1.0 --
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-- Device: Spartan 3E --
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-- --
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-- DESCRIPTION --
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-- --
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-- --
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--------------------------------------------------------------------------------
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-- Copyright (C)2011 Mathias H�rtnagl <mathias.hoertnagl@gmail.comt> --
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-- --
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-- This program is free software: you can redistribute it and/or modify --
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-- it under the terms of the GNU General Public License as published by --
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-- the Free Software Foundation, either version 3 of the License, or --
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-- (at your option) any later version. --
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-- --
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-- This program is distributed in the hope that it will be useful, --
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of --
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --
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-- GNU General Public License for more details. --
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-- --
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-- You should have received a copy of the GNU General Public License --
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-- along with this program. If not, see <http://www.gnu.org/licenses/>. --
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--------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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library work;
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use work.iwb.all;
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use work.ivga.all;
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entity tb_vga is
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port(
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CLK : in std_logic;
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VGA_HSYNC : out std_logic;
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VGA_VSYNC : out std_logic;
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VGA_RED : out std_logic;
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VGA_GREEN : out std_logic;
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VGA_BLUE : out std_logic
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);
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end tb_vga;
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architecture tb of tb_vga is
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component global_clock
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port(
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clkin_in : in std_logic;
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rst_in : in std_logic;
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clkdv_out : out std_logic;
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clkin_ibufg_out : out std_logic;
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clk0_out : out std_logic
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);
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end component;
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signal si : slave_in_t;
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signal so : slave_out_t;
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begin
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inst_clock: global_clock
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port map(
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clkin_in => CLK,
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rst_in => '0',
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clkdv_out => open, --si.clk,
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clkin_ibufg_out => open,
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clk0_out => si.clk--open
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);
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disp : vga
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port map(
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si => si,
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so => so,
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-- Non Wishbone Signals
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VGA_HSYNC => VGA_HSYNC,
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VGA_VSYNC => VGA_VSYNC,
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VGA_RED => VGA_RED,
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VGA_GREEN => VGA_GREEN,
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VGA_BLUE => VGA_BLUE
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);
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end tb;
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