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<title>OPENCORES.ORG</title>
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<META NAME="keywords" CONTENT="cores, VHDL, Verilog HDL, ASIC, Synthesizable,
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<META NAME="description" CONTENT="OPENCORES.ORG endorses development and hosts
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a repository of free, open source IP cores (chip designs, System-on-a-Chip) and
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supplemental boards.">
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<body bgcolor=#ffffff>
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<table width="100%" cellspacing=5 cellpadding=0 border=0>
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    <tr valign="top"><td>
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    <center>
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        <table cellspacing=0 cellpadding=5 width="100%" valign="top" border=0>
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<tr valign="top"><td bgcolor=#f0f0f0 valign="top">
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<center><font size=+3><b>OPENCORES.ORG</b></font>
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<br><font size=-4><font color=#ffffff>.</font></font>
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<br>
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</center>
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</td></tr></table>
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    </center>
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    </td></tr>
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    <tr valign="top"><td>
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    <table border=0 cellspacing=0 cellpadding=5 width="100%"><tr valign="top"><td bgcolor="#f8f8f0">
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        &nbsp;
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    </td>
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    <td valign="top">
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    <table cellpadding=5><tr><td valign="top">
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<font SIZE="2">#include &lt;genlib.h&gt;
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<p>main()</p>
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<p>{</p>
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<p>DEF_LOFIG(&quot;decoder&quot;);</p>
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<p>LOCON(&quot;A[0:3]&quot;, IN, &quot;A[0:3]&quot;);</p>
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<p>LOCON(&quot;en&quot;, IN, &quot;en&quot;);</p>
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<p>LOCON(&quot;ck&quot;, IN, &quot;ck&quot;);</p>
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<p>LOCON(&quot;res&quot;, IN, &quot;res&quot;);</p>
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<p>LOCON(&quot;vdd&quot;, IN, &quot;vdd&quot;);</p>
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<p>LOCON(&quot;vss&quot;, IN, &quot;vss&quot;);</p>
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<p>LOCON(&quot;C[0:15]&quot;,OUT, &quot;C[0:15]&quot;);</p>
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<p>&nbsp;</p>
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<p>LOINS(&quot;n1_y&quot;, &quot;inv0&quot;, &quot;A[0]&quot;,
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&quot;o_inv0&quot;, &quot;vdd&quot;, &quot;vss&quot;,0);</p>
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<p>LOINS(&quot;n1_y&quot;, &quot;inv1&quot;, &quot;A[1]&quot;,
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&quot;o_inv1&quot;, &quot;vdd&quot;, &quot;vss&quot;,0);</p>
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<p>LOINS(&quot;n1_y&quot;, &quot;inv2&quot;, &quot;A[2]&quot;,
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&quot;o_inv2&quot;, &quot;vdd&quot;, &quot;vss&quot;,0);</p>
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<p>LOINS(&quot;n1_y&quot;, &quot;inv3&quot;, &quot;A[3]&quot;,
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&quot;o_inv3&quot;, &quot;vdd&quot;, &quot;vss&quot;,0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;0an0&quot;, &quot;o_inv3&quot;,
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&quot;o_inv2&quot;,
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&quot;o_inv1&quot;,&quot;o_inv0&quot;,&quot;o_0an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,
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0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;0an1&quot;, &quot;en&quot;,
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&quot;o_0an0&quot;,&quot;C[0]&quot;, &quot;vdd&quot;, &quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;1an0&quot;, &quot;o_inv3&quot;,
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&quot;o_inv2&quot;,
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&quot;o_inv1&quot;,&quot;A[0]&quot;,&quot;o_1an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,
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0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;1an1&quot;, &quot;en&quot;,
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&quot;o_1an0&quot;,&quot;C[1]&quot;, &quot;vdd&quot;, &quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;2an0&quot;, &quot;o_inv3&quot;,
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&quot;o_inv2&quot;,
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&quot;A[1]&quot;,&quot;o_inv0&quot;,&quot;o_2an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,
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0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;2an1&quot;,
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&quot;en&quot;,&quot;o_2an0&quot;,&quot;C[2]&quot;, &quot;vdd&quot;,
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&quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;3an0&quot;, &quot;o_inv3&quot;,
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&quot;o_inv2&quot;,&quot;A[1]&quot;,&quot;A[0]&quot;,&quot;O_3an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;3an1&quot;,
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&quot;en&quot;,&quot;o_3an0&quot;,&quot;C[3]&quot;, &quot;vdd&quot;,
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&quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;4an0&quot;,
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&quot;o_inv3&quot;,&quot;A[2]&quot;,&quot;o_inv1&quot;,&quot;o_inv0&quot;,&quot;o_4an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;4an1&quot;,
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&quot;en&quot;,&quot;o_4an0&quot;,&quot;C[4]&quot;, &quot;vdd&quot;,
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&quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;5an0&quot;, &quot;o_inv3&quot;,
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&quot;A[2]&quot;,&quot;o_inv1&quot;,&quot;A[0]&quot;,&quot;o_5an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;5an1&quot;,
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&quot;en&quot;,&quot;o_5an0&quot;,&quot;C[5]&quot;, &quot;vdd&quot;,
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&quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;6an0&quot;, &quot;o_inv3&quot;,
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&quot;A[2]&quot;,&quot;A[1]&quot;,&quot;o_inv0&quot;,&quot;o_6an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;6an1&quot;,
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&quot;en&quot;,&quot;o_6an0&quot;,&quot;C[6]&quot;, &quot;vdd&quot;,
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&quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;7an0&quot;, &quot;o_inv3&quot;,
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&quot;A[2]&quot;,&quot;A[1]&quot;,&quot;A[0]&quot;,&quot;o_7an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,
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0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;7an1&quot;,
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&quot;en&quot;,&quot;o_7an0&quot;,&quot;C[7]&quot;, &quot;vdd&quot;,
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&quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;8an0&quot;,
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&quot;A[3]&quot;,&quot;o_inv2&quot;,&quot;o_inv1&quot;,&quot;o_inv0&quot;,&quot;o_8an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,
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0);</p>
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<p>LOINS(&quot;a2_y&quot;,
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&quot;8an1&quot;,&quot;en&quot;,&quot;o_8an0&quot;,&quot;C[8]&quot;,
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&quot;vdd&quot;, &quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;9an0&quot;, &quot;A[3]&quot;,
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&quot;o_inv2&quot;,&quot;o_inv1&quot;,&quot;A[0]&quot;,&quot;o_9an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;9an1&quot;,
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&quot;en&quot;,&quot;o_9an0&quot;,&quot;C[9]&quot;, &quot;vdd&quot;,
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&quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;10an0&quot;,
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&quot;A[3]&quot;,&quot;o_inv2&quot;,&quot;A[1]&quot;,&quot;o_inv0&quot;,&quot;o_10an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,
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0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;10an1&quot;,&quot;en&quot;,
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&quot;o_10an0&quot;,&quot;C[10]&quot;, &quot;vdd&quot;, &quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;11an0&quot;, &quot;A[3]&quot;,
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&quot;o_inv2&quot;,&quot;A[1]&quot;,&quot;A[0]&quot;,&quot;o_11an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;11an1&quot;,
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&quot;en&quot;,&quot;o_11an0&quot;,&quot;C[11]&quot;, &quot;vdd&quot;,
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&quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;12an0&quot;, &quot;A[3]&quot;,
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&quot;A[2]&quot;,&quot;o_inv1&quot;,&quot;o_inv0&quot;,&quot;o_12an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;12an1&quot;,
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&quot;en&quot;,&quot;o_12an0&quot;,&quot;C[12]&quot;, &quot;vdd&quot;,
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&quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;13an0&quot;, &quot;A[3]&quot;,
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&quot;A[2]&quot;,&quot;o_inv1&quot;,&quot;A[0]&quot;,&quot;o_13an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;13an1&quot;,
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&quot;en&quot;,&quot;o_13an0&quot;,&quot;C[13]&quot;, &quot;vdd&quot;,
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&quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;14an0&quot;, &quot;A[3]&quot;,
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&quot;A[2]&quot;,&quot;A[1]&quot;,&quot;o_inv0&quot;,&quot;o_14an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;14an1&quot;,
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&quot;en&quot;,&quot;o_14an0&quot;,&quot;C[14]&quot;, &quot;vdd&quot;,
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&quot;vss&quot;, 0);</p>
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<p>LOINS(&quot;a4_y&quot;, &quot;15an0&quot;, &quot;A[3]&quot;,
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&quot;A[2]&quot;,&quot;A[1]&quot;,&quot;A[0]&quot;,&quot;o_15an0&quot;,&quot;vdd&quot;,&quot;vss&quot;,0);</p>
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<p>LOINS(&quot;a2_y&quot;, &quot;15an1&quot;,
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&quot;en&quot;,&quot;o_15an0&quot;,&quot;C[15]&quot;, &quot;vdd&quot;,
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&quot;vss&quot;, 0);</p>
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<p>SAVE_LOFIG();</p>
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<p>exit(0);</p>
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<p>}</p>
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<p>&nbsp;</p>
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</font>
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<b><font size=+1>Maintainers and Authors :</font></b>
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<p>LCD Driver development team
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<p>current members:
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<ul>
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<li>
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<a href="mailto:marta@vlsi.itb.ac.id">Hendra Gunawan</a></li>
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<li>
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<a href="mailto:sigit@students.ee.itb.ac.id">Nurhadi Wiyono</a></li>
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<li>
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<a href="mailto:sigit@students.ee.itb.ac.id">Kharisma Sinung P</a></li>
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</ul>
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&nbsp;
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<p>
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<b><font size=+1>Mailing-list:</font></b>
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<ul><a href="mailto:cores@opencores.org_NOSPAM">cores@opencores.org_NOSPAM</a></ul>
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<tr><td bgcolor="#f8f8f0">&nbsp;</td>
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<table cellspacing=0 cellpadding=4 border=0 width="100%"bgcolor="#f0f0f0"><tr>
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<td align=left><i><small>Last modified on Sunday, 17-Sep-2000 03:58:04 JAVT</i></td>
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<td align=right><i><small>Copyright © 1999-2000 OPENCORES.ORG. All rights reserved.</td>
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