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[/] [leros/] [trunk/] [Makefile] - Blame information for rev 3

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#
# Makefile for Leros build
#
 
# cleanup
EXTENSIONS=class rbf rpt sof pin summary ttf qdf dat wlf done qws
 
#
#       Set USB to true for an FTDI chip based board (dspio, usbmin, lego)
#
USB=false
 
 
# Assembler files
APP=test
APP=muvium
# Altera FPGA configuration cable
#BLASTER_TYPE=ByteBlasterMV
BLASTER_TYPE=USB-Blaster
 
ifeq ($(WINDIR),)
        USBRUNNER=./USBRunner
        S=:
else
        USBRUNNER=USBRunner.exe
        S=\;
endif
 
# The VHDL project for Quartus
QPROJ=dspio
QPROJ=altde2-70
 
all: directories tools rom
        make lerosusb
        make config
 
directories:
        -mkdir rbf
 
tools:
        -rm -rf java/classes
        -rm -rf java/lib
        -rm -rf java/src/leros/asm/generated
        mkdir java/classes
        mkdir java/lib
        mkdir java/src/leros/asm/generated
        java -classpath lib/antlr-3.3-complete.jar org.antlr.Tool \
                -fo java/src/leros/asm/generated java/src/grammar/Leros.g
        javac -classpath lib/antlr-3.3-complete.jar \
                -d java/classes java/src/leros/asm/generated/*.java \
                java/src/leros/asm/*.java
        javac -d java/classes -sourcepath java/src java/src/leros/sim/*.java
        cd java/classes && jar cf ../lib/leros-tools.jar *
 
rom:
        -rm -rf vhdl/generated
        mkdir vhdl/generated
        java -cp java/lib/leros-tools.jar$(S)lib/antlr-3.3-complete.jar \
                leros.asm.LerosAsm -s asm -d vhdl/generated $(APP).asm
jsim: rom
        java -cp java/lib/leros-tools.jar -Dlog=false \
                leros.sim.LerosSim rom.txt
sim: rom
        cd modelsim; make
 
rom_old:
        -rm -rf vhdl/generated
        mkdir vhdl/generated
        java -cp java/lib/leros-tools.jar leros.LerosAsm -s asm -d vhdl/generated $(APP).asm
 
# configure the FPGA
config:
ifeq ($(USB),true)
        make config_usb
else
ifeq ($(XFPGA),true)
        make config_xilinx
else
        make config_byteblaster
endif
endif
 
lerosusb:
        @echo $(QPROJ)
        for target in $(QPROJ); do \
                make qsyn -e QBT=$$target || exit; \
                cd quartus/$$target && quartus_cpf -c leros.sof ../../rbf/$$target.rbf; \
        done
 
#
#       Quartus build process
#               called by jopser, jopusb,...
#
qsyn:
        echo $(QBT)
        echo "building $(QBT)"
        -rm -rf quartus/$(QBT)/db
        -rm -f quartus/$(QBT)/leros.sof
        -rm -f jbc/$(QBT).jbc
        -rm -f rbf/$(QBT).rbf
        quartus_map quartus/$(QBT)/leros
        quartus_fit quartus/$(QBT)/leros
        quartus_asm quartus/$(QBT)/leros
        quartus_sta quartus/$(QBT)/leros
 
config_byteblaster:
        cd quartus/$(QPROJ) && quartus_pgm -c $(BLASTER_TYPE) -m JTAG leros.cdf
 
config_usb:
        cd rbf && ../$(USBRUNNER) $(QPROJ).rbf
 
# TODO: no Xilinx Makefiles available yet
config_xilinx:
        cd xilinx/$(XPROJ) && make config
 
clean:
        for ext in $(EXTENSIONS); do \
                find `ls` -name \*.$$ext -print -exec rm -r -f {} \; ; \
        done
        -find `ls` -name leros.pof -print -exec rm -r -f {} \;
        -find `ls` -name db -print -exec rm -r -f {} \;
        -find `ls` -name incremental_db -print -exec rm -r -f {} \;
        -find `ls` -name leros_description.txt -print -exec rm -r -f {} \;
        -rm -rf asm/generated
        -rm -f vhdl/*.vhd
        -rm -rf $(TOOLS)/dist
        -rm -rf $(PCTOOLS)/dist
        -rm -rf $(TARGET)/dist
        -rm -rf modelsim/work
        -rm -rf modelsim/transcript
        -rm -rf modelsim/gaisler
        -rm -rf modelsim/grlib
        -rm -rf modelsim/techmap

Line No.	Rev	Author	Line
1	3	martin	`#`
2			`# Makefile for Leros build`
3			`#`
4
5			`# cleanup`
6			`EXTENSIONS=class rbf rpt sof pin summary ttf qdf dat wlf done qws`
7
8			`#`
9			`# Set USB to true for an FTDI chip based board (dspio, usbmin, lego)`
10			`#`
11			`USB=false`
12
13
14			`# Assembler files`
15			`APP=test`
16			`APP=muvium`
17			`# Altera FPGA configuration cable`
18			`#BLASTER_TYPE=ByteBlasterMV`
19			`BLASTER_TYPE=USB-Blaster`
20
21			`ifeq ($(WINDIR),)`
22			`USBRUNNER=./USBRunner`
23			`S=:`
24			`else`
25			`USBRUNNER=USBRunner.exe`
26			`S=\;`
27			`endif`
28
29			`# The VHDL project for Quartus`
30			`QPROJ=dspio`
31			`QPROJ=altde2-70`
32
33			`all: directories tools rom`
34			`make lerosusb`
35			`make config`
36
37			`directories:`
38			`-mkdir rbf`
39
40			`tools:`
41			`-rm -rf java/classes`
42			`-rm -rf java/lib`
43			`-rm -rf java/src/leros/asm/generated`
44			`mkdir java/classes`
45			`mkdir java/lib`
46			`mkdir java/src/leros/asm/generated`
47			`java -classpath lib/antlr-3.3-complete.jar org.antlr.Tool \`
48			`-fo java/src/leros/asm/generated java/src/grammar/Leros.g`
49			`javac -classpath lib/antlr-3.3-complete.jar \`
50			`-d java/classes java/src/leros/asm/generated/*.java \`
51			`java/src/leros/asm/*.java`
52			`javac -d java/classes -sourcepath java/src java/src/leros/sim/*.java`
53			`cd java/classes && jar cf ../lib/leros-tools.jar *`
54
55			`rom:`
56			`-rm -rf vhdl/generated`
57			`mkdir vhdl/generated`
58			`java -cp java/lib/leros-tools.jar$(S)lib/antlr-3.3-complete.jar \`
59			`leros.asm.LerosAsm -s asm -d vhdl/generated $(APP).asm`
60			`jsim: rom`
61			`java -cp java/lib/leros-tools.jar -Dlog=false \`
62			`leros.sim.LerosSim rom.txt`
63			`sim: rom`
64			`cd modelsim; make`
65
66			`rom_old:`
67			`-rm -rf vhdl/generated`
68			`mkdir vhdl/generated`
69			`java -cp java/lib/leros-tools.jar leros.LerosAsm -s asm -d vhdl/generated $(APP).asm`
70
71			`# configure the FPGA`
72			`config:`
73			`ifeq ($(USB),true)`
74			`make config_usb`
75			`else`
76			`ifeq ($(XFPGA),true)`
77			`make config_xilinx`
78			`else`
79			`make config_byteblaster`
80			`endif`
81			`endif`
82
83			`lerosusb:`
84			`@echo $(QPROJ)`
85			`for target in $(QPROJ); do \`
86			`make qsyn -e QBT=$$target \|\| exit; \`
87			`cd quartus/$$target && quartus_cpf -c leros.sof ../../rbf/$$target.rbf; \`
88			`done`
89
90			`#`
91			`# Quartus build process`
92			`# called by jopser, jopusb,...`
93			`#`
94			`qsyn:`
95			`echo $(QBT)`
96			`echo "building $(QBT)"`
97			`-rm -rf quartus/$(QBT)/db`
98			`-rm -f quartus/$(QBT)/leros.sof`
99			`-rm -f jbc/$(QBT).jbc`
100			`-rm -f rbf/$(QBT).rbf`
101			`quartus_map quartus/$(QBT)/leros`
102			`quartus_fit quartus/$(QBT)/leros`
103			`quartus_asm quartus/$(QBT)/leros`
104			`quartus_sta quartus/$(QBT)/leros`
105
106			`config_byteblaster:`
107			`cd quartus/$(QPROJ) && quartus_pgm -c $(BLASTER_TYPE) -m JTAG leros.cdf`
108
109			`config_usb:`
110			`cd rbf && ../$(USBRUNNER) $(QPROJ).rbf`
111
112			`# TODO: no Xilinx Makefiles available yet`
113			`config_xilinx:`
114			`cd xilinx/$(XPROJ) && make config`
115
116			`clean:`
117			`for ext in $(EXTENSIONS); do \`
118			find `ls` -name \*.$$ext -print -exec rm -r -f {} \; ; \
119			`done`
120			-find `ls` -name leros.pof -print -exec rm -r -f {} \;
121			-find `ls` -name db -print -exec rm -r -f {} \;
122			-find `ls` -name incremental_db -print -exec rm -r -f {} \;
123			-find `ls` -name leros_description.txt -print -exec rm -r -f {} \;
124			`-rm -rf asm/generated`
125			`-rm -f vhdl/*.vhd`
126			`-rm -rf $(TOOLS)/dist`
127			`-rm -rf $(PCTOOLS)/dist`
128			`-rm -rf $(TARGET)/dist`
129			`-rm -rf modelsim/work`
130			`-rm -rf modelsim/transcript`
131			`-rm -rf modelsim/gaisler`
132			`-rm -rf modelsim/grlib`
133			`-rm -rf modelsim/techmap`

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