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https://opencores.org/ocsvn/light52/light52/trunk
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ja_rd |
Cpu_test -- Perform a basic test of all the CPU opcodes.
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This demo will test all the CPU opcodes for basic behavior. Each opcode is
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tested at least once. Those opcodes with more complex behavior (e.g. ADD) are
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tested with a few 'corner cases', but the test is by no means exhaustive.
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In particular, this test bench does not check for unintended side effects.
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This demo can be run on a physical core, but it is most useful when used with
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the simulation log feature -- comparing the simulation logs of Modelsim and the
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software simulator B51 (included as part of this project).
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In order to make this demo, you need the free assembler ASEM51.
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DOS BAT script 'build.bat' will assemble the demo and build a suitable object
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code VHDL package that can then be used in synthesis or simulation.
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In fact, two object code packages will be built: the code will be assembled
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You can run this demo on the software simulator B51 by running script
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'run_full.bat'. This script will simulate the 'full' CPU which implements the
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optional BCD opcodes. Script 'run.bat' will simulate the basic cpu with no BCD
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opcodes.
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You can run this demo in Modelsim using script /sim/light52_full_tb.do (for the
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full CPU) or script /sim/light52_tb.do (basic CPU).
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Once you have run the demo in Modelsim and B51, you can then compare the
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respective simulation logs (sw_log.txt and /sim/hw_sim_log.txt). For this demo,
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both files should be identical.
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It should be easy to port the BAT scripts to any linux shell flavor.
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