OpenCores
URL https://opencores.org/ocsvn/light8080/light8080/trunk

Subversion Repositories light8080

[/] [light8080/] [trunk/] [c/] [hello.c] - Blame information for rev 75

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 65 motilito
//---------------------------------------------------------------------------------------
2
//      Project:                        light8080 SOC           WiCores Solutions 
3
//
4
//      File name:                      hello.c                                 (February 04, 2012)
5
//
6
//      Writer:                         Moti Litochevski 
7
//
8
//      Description:
9
//              This file contains a simple program written in Small-C that sends a string to 
10
//              the UART and then switches to echo received bytes. 
11 66 motilito
//              This example also include a simple interrupt example which will work with the 
12
//              verilog testbench. the testbench 
13 65 motilito
//
14
//      Revision History:
15
//
16
//      Rev <revnumber>                 <Date>                  <owner> 
17
//              <comment>
18
//---------------------------------------------------------------------------------------
19
 
20 66 motilito
// define interrupt vectors 
21
// note that this file must be edited to enable interrupt used 
22
#include intr_vec.h 
23
// insert c80 assmbly library to the output file 
24 65 motilito
#include ..\tools\c80\c80.lib
25
 
26
// UART IO registers 
27
port (128) UDATA;               // uart data register used for both transmit and receive 
28
port (129) UBAUDL;              // low byte of baud rate register 
29
port (130) UBAUDH;              // low byte of baud rate register 
30
port (131) USTAT;               // uart status register 
31
// digital IO ports registers 
32 66 motilito
port (132) P1DATA;      // port 1 data register 
33
port (133) P1DIR;               // port 1 direction register control 
34
port (134) P2DATA;              // port 2 data register 
35
port (135) P2DIR;               // port 2 direction register control 
36
// interrupt controller register 
37
port (136) INTRENA;             // interrupts enable register 
38 65 motilito
// simulation end register 
39
// writing any value to this port will end the verilog simulation when using tb_l80soc 
40
// test bench. 
41
port (255) SIMEND;
42
 
43
// registers bit fields definition 
44
// uart status register decoding 
45
#define UTXBUSY         1
46
#define URXFULL         16
47
 
48
// globals 
49
char rxbyte;            // byte received from the uart 
50
int tstary[2] = {1234, 5678};
51
 
52
//---------------------------------------------------------------------------------------
53
// send a single byte to the UART 
54
sendbyte(by)
55
char by;
56
{
57
        while (USTAT & UTXBUSY);
58
        UDATA = by;
59
}
60
 
61
// check if a byte was received by the uart 
62
getbyte()
63
{
64
        if (USTAT & URXFULL) {
65
                rxbyte = UDATA;
66
                return 1;
67
        }
68
        else
69
                return 0;
70
}
71
 
72
// send new line to the UART 
73
nl()
74
{
75
        sendbyte(13);
76
        sendbyte(10);
77
}
78
 
79
// sends a string to the UART 
80
printstr(sptr)
81
char *sptr;
82
{
83
        while (*sptr != 0)
84
                sendbyte(*sptr++);
85
}
86
 
87
// sends a decimal value to the UART 
88
printdec(dval)
89
int dval;
90
{
91
        if (dval<0) {
92
                sendbyte('-');
93
                dval = -dval;
94
        }
95
        outint(dval);
96
}
97
 
98
// function copied from c80dos.c 
99
outint(n)
100
int n;
101
{
102
int q;
103
 
104
        q = n/10;
105
        if (q) outint(q);
106
        sendbyte('0'+(n-q*10));
107
}
108
 
109
// sends a hexadecimal value to the UART 
110
printhex(hval)
111
int hval;
112
{
113
int q;
114
 
115
        q = hval/16;
116
        if (q) printhex(q);
117
        q = hval-q*16;
118
        if (q > 9)
119
                sendbyte('A'+q-10);
120
        else
121
                sendbyte('0'+q);
122
}
123
 
124 66 motilito
// external interrupt 0 service routine 
125
int0_isr()
126
{
127
        printstr("Interrupt 0 was asserted."); nl();
128
}
129
 
130 65 motilito
// program main routine 
131
main()
132
{
133
        // configure UART baud rate - set to 9600 for 30MHz clock 
134
        // BAUD = round(<clock>/<baud rate>/16) = round(30e6/9600/16) = 195 
135 67 motilito
        // Note: Usage of a minimum divider value of 1 will accelerate the RTL simulation. 
136
        UBAUDL = 195;
137 65 motilito
        UBAUDH = 0;
138
 
139 66 motilito
        // configure both ports to output and digital outputs as zeros 
140
        P1DATA = 0x00;
141
        P1DIR = 0xff;
142
        P2DATA = 0x00;
143
        P2DIR = 0xff;
144
        // enable interrupt 0 only 
145
        INTRENA = 0x01;
146
        // enable CPU interrupt 
147
#asm 
148
        ei
149
#endasm
150 67 motilito
 
151 65 motilito
        // print message 
152
        printstr("Hello World!!!"); nl();
153
        printstr("Dec value: "); printdec(tstary[1]); nl();
154
        printstr("Hex value: 0x"); printhex(tstary[0]); nl();
155 66 motilito
 
156
        // assert bit 0 of port 1 to test external interrupt 0 
157
        P1DATA = 0x01;
158
 
159 65 motilito
        printstr("Echoing received bytes: "); nl();
160
        // loop forever 
161
        while (1) {
162
                // check if a new byte was received 
163
                if (getbyte())
164
                        // echo the received byte to the UART 
165
                        sendbyte(rxbyte);
166
        }
167
}
168
//---------------------------------------------------------------------------------------
169
//                                              Th.. Th.. Th.. Thats all folks !!!
170
//---------------------------------------------------------------------------------------
171
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.