OpenCores
URL https://opencores.org/ocsvn/loadbalancer/loadbalancer/trunk

Subversion Repositories loadbalancer

[/] [loadbalancer/] [trunk/] [db/] [LB.hif] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 atalla 
Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version
2 
7
3 
2633
4 
OFF
5 
OFF
6 
OFF
7 
OFF
8 
ON
9 
ON
10 
ON
11 
FV_OFF
12 
Level2
13 
 
14 
 
15 
VRSM_ON
16 
VHSM_ON
17 
 
18 
-- Start Partition --
19 
-- End Partition --
20 
-- Start Library Paths --
21 
-- End Library Paths --
22 
-- Start VHDL Libraries --
23 
-- End VHDL Libraries --
24 
# entity
25 
open_header
26 
# storage
27 
db|LB.(3).cnf
28 
db|LB.(3).cnf
29 
# logic_option {
30 
AUTO_RAM_RECOGNITION
31 
ON
32 
}
33 
# case_insensitive
34 
# source_file
35 
Classfier|open_header.vhd
36 
22a9d27491f447f995c1e911b7b98c99
37 
4
38 
# internal_option {
39 
HDL_INITIAL_FANOUT_LIMIT
40 
OFF
41 
AUTO_RESOURCE_SHARING
42 
OFF
43 
AUTO_RAM_RECOGNITION
44 
ON
45 
AUTO_ROM_RECOGNITION
46 
ON
47 
}
48 
# user_parameter {
49 
data_width
50 
64
51 
PARAMETER_SIGNED_DEC
52 
USR
53 
ctrl_width
54 
8
55 
PARAMETER_SIGNED_DEC
56 
USR
57 
 constraint(in_data)
58 
63 downto 0
59 
PARAMETER_STRING
60 
USR
61 
 constraint(in_ctrl)
62 
7 downto 0
63 
PARAMETER_STRING
64 
USR
65 
 constraint(pkt_type)
66 
7 downto 0
67 
PARAMETER_STRING
68 
USR
69 
}
70 
# include_file {
71 
config.vhd
72 
a9aaccd982e3760a0ac88fe1caf2098
73 
}
74 
# lmf
75 
d:|altera|72|quartus|lmf|maxplus2.lmf
76 
9a59d39b0706640b4b2718e8a1ff1f
77 
# macro_sequence
78 
 
79 
# end
80 
# entity
81 
small_fifo
82 
# storage
83 
db|LB.(4).cnf
84 
db|LB.(4).cnf
85 
# logic_option {
86 
AUTO_RAM_RECOGNITION
87 
ON
88 
}
89 
# case_sensitive
90 
# source_file
91 
small_fifo.v
92 
1177d4c5f95945d866fbc28febfb18a6
93 
7
94 
# internal_option {
95 
HDL_INITIAL_FANOUT_LIMIT
96 
OFF
97 
AUTO_RESOURCE_SHARING
98 
OFF
99 
AUTO_RAM_RECOGNITION
100 
ON
101 
AUTO_ROM_RECOGNITION
102 
ON
103 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
104 
OFF
105 
}
106 
# user_parameter {
107 
WIDTH
108 
72
109 
PARAMETER_SIGNED_DEC
110 
USR
111 
MAX_DEPTH_BITS
112 
5
113 
PARAMETER_SIGNED_DEC
114 
USR
115 
NEARLY_FULL
116 
31
117 
PARAMETER_SIGNED_DEC
118 
DEF
119 
}
120 
# lmf
121 
d:|altera|72|quartus|lmf|
122 
d41d8cd98f0b24e980998ecf8427e
123 
# macro_sequence
124 
 
125 
# end
126 
# entity
127 
small_fifo
128 
# storage
129 
db|LB.(5).cnf
130 
db|LB.(5).cnf
131 
# logic_option {
132 
AUTO_RAM_RECOGNITION
133 
ON
134 
}
135 
# case_sensitive
136 
# source_file
137 
small_fifo.v
138 
1177d4c5f95945d866fbc28febfb18a6
139 
7
140 
# internal_option {
141 
HDL_INITIAL_FANOUT_LIMIT
142 
OFF
143 
AUTO_RESOURCE_SHARING
144 
OFF
145 
AUTO_RAM_RECOGNITION
146 
ON
147 
AUTO_ROM_RECOGNITION
148 
ON
149 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
150 
OFF
151 
}
152 
# user_parameter {
153 
WIDTH
154 
8
155 
PARAMETER_SIGNED_DEC
156 
USR
157 
MAX_DEPTH_BITS
158 
5
159 
PARAMETER_SIGNED_DEC
160 
USR
161 
NEARLY_FULL
162 
31
163 
PARAMETER_SIGNED_DEC
164 
DEF
165 
}
166 
# lmf
167 
d:|altera|72|quartus|lmf|
168 
d41d8cd98f0b24e980998ecf8427e
169 
# macro_sequence
170 
 
171 
# end
172 
# entity
173 
arp_top
174 
# storage
175 
db|LB.(6).cnf
176 
db|LB.(6).cnf
177 
# logic_option {
178 
AUTO_RAM_RECOGNITION
179 
ON
180 
}
181 
# case_insensitive
182 
# source_file
183 
ARP|arp_top.vhd
184 
7a50b54219a38886f96613c4c4dd0
185 
4
186 
# internal_option {
187 
HDL_INITIAL_FANOUT_LIMIT
188 
OFF
189 
AUTO_RESOURCE_SHARING
190 
OFF
191 
AUTO_RAM_RECOGNITION
192 
ON
193 
AUTO_ROM_RECOGNITION
194 
ON
195 
}
196 
# user_parameter {
197 
data_width
198 
64
199 
PARAMETER_SIGNED_DEC
200 
USR
201 
ctrl_width
202 
8
203 
PARAMETER_SIGNED_DEC
204 
USR
205 
 constraint(in_data)
206 
63 downto 0
207 
PARAMETER_STRING
208 
USR
209 
 constraint(in_ctrl)
210 
7 downto 0
211 
PARAMETER_STRING
212 
USR
213 
 constraint(out_data)
214 
63 downto 0
215 
PARAMETER_STRING
216 
USR
217 
 constraint(out_ctrl)
218 
7 downto 0
219 
PARAMETER_STRING
220 
USR
221 
}
222 
# lmf
223 
d:|altera|72|quartus|lmf|maxplus2.lmf
224 
9a59d39b0706640b4b2718e8a1ff1f
225 
# macro_sequence
226 
 
227 
# end
228 
# entity
229 
small_fifo
230 
# storage
231 
db|LB.(7).cnf
232 
db|LB.(7).cnf
233 
# logic_option {
234 
AUTO_RAM_RECOGNITION
235 
ON
236 
}
237 
# case_sensitive
238 
# source_file
239 
small_fifo.v
240 
1177d4c5f95945d866fbc28febfb18a6
241 
7
242 
# internal_option {
243 
HDL_INITIAL_FANOUT_LIMIT
244 
OFF
245 
AUTO_RESOURCE_SHARING
246 
OFF
247 
AUTO_RAM_RECOGNITION
248 
ON
249 
AUTO_ROM_RECOGNITION
250 
ON
251 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
252 
OFF
253 
}
254 
# user_parameter {
255 
WIDTH
256 
72
257 
PARAMETER_SIGNED_DEC
258 
USR
259 
MAX_DEPTH_BITS
260 
3
261 
PARAMETER_SIGNED_DEC
262 
USR
263 
NEARLY_FULL
264 
7
265 
PARAMETER_SIGNED_DEC
266 
DEF
267 
}
268 
# lmf
269 
d:|altera|72|quartus|lmf|
270 
d41d8cd98f0b24e980998ecf8427e
271 
# macro_sequence
272 
 
273 
# end
274 
# entity
275 
arp_parser
276 
# storage
277 
db|LB.(8).cnf
278 
db|LB.(8).cnf
279 
# logic_option {
280 
AUTO_RAM_RECOGNITION
281 
ON
282 
}
283 
# case_insensitive
284 
# source_file
285 
ARP|arp_parser.vhd
286 
7c6d8419fd8d29701eeb70dfa91b11
287 
4
288 
# internal_option {
289 
HDL_INITIAL_FANOUT_LIMIT
290 
OFF
291 
AUTO_RESOURCE_SHARING
292 
OFF
293 
AUTO_RAM_RECOGNITION
294 
ON
295 
AUTO_ROM_RECOGNITION
296 
ON
297 
}
298 
# user_parameter {
299 
data_width
300 
64
301 
PARAMETER_SIGNED_DEC
302 
USR
303 
ctrl_width
304 
8
305 
PARAMETER_SIGNED_DEC
306 
USR
307 
 constraint(in_data)
308 
63 downto 0
309 
PARAMETER_STRING
310 
USR
311 
 constraint(in_ctrl)
312 
7 downto 0
313 
PARAMETER_STRING
314 
USR
315 
 constraint(header)
316 
63 downto 0
317 
PARAMETER_STRING
318 
USR
319 
 constraint(src_mac)
320 
47 downto 0
321 
PARAMETER_STRING
322 
USR
323 
 constraint(sha)
324 
47 downto 0
325 
PARAMETER_STRING
326 
USR
327 
 constraint(spa)
328 
31 downto 0
329 
PARAMETER_STRING
330 
USR
331 
 constraint(tha)
332 
47 downto 0
333 
PARAMETER_STRING
334 
USR
335 
 constraint(tpa)
336 
31 downto 0
337 
PARAMETER_STRING
338 
USR
339 
}
340 
# lmf
341 
d:|altera|72|quartus|lmf|maxplus2.lmf
342 
9a59d39b0706640b4b2718e8a1ff1f
343 
# macro_sequence
344 
 
345 
# end
346 
# entity
347 
arp_response
348 
# storage
349 
db|LB.(9).cnf
350 
db|LB.(9).cnf
351 
# logic_option {
352 
AUTO_RAM_RECOGNITION
353 
ON
354 
}
355 
# case_insensitive
356 
# source_file
357 
ARP|arp_response.vhd
358 
3d83dce7c9336cfafac6541735dfbe79
359 
4
360 
# internal_option {
361 
HDL_INITIAL_FANOUT_LIMIT
362 
OFF
363 
AUTO_RESOURCE_SHARING
364 
OFF
365 
AUTO_RAM_RECOGNITION
366 
ON
367 
AUTO_ROM_RECOGNITION
368 
ON
369 
}
370 
# user_parameter {
371 
data_width
372 
64
373 
PARAMETER_SIGNED_DEC
374 
USR
375 
ctrl_width
376 
8
377 
PARAMETER_SIGNED_DEC
378 
USR
379 
 constraint(out_data)
380 
63 downto 0
381 
PARAMETER_STRING
382 
USR
383 
 constraint(out_ctrl)
384 
7 downto 0
385 
PARAMETER_STRING
386 
USR
387 
 constraint(header)
388 
63 downto 0
389 
PARAMETER_STRING
390 
USR
391 
 constraint(src_mac)
392 
47 downto 0
393 
PARAMETER_STRING
394 
USR
395 
 constraint(sha)
396 
47 downto 0
397 
PARAMETER_STRING
398 
USR
399 
 constraint(spa)
400 
31 downto 0
401 
PARAMETER_STRING
402 
USR
403 
 constraint(tha)
404 
47 downto 0
405 
PARAMETER_STRING
406 
USR
407 
 constraint(tpa)
408 
31 downto 0
409 
PARAMETER_STRING
410 
USR
411 
}
412 
# include_file {
413 
config.vhd
414 
a9aaccd982e3760a0ac88fe1caf2098
415 
}
416 
# lmf
417 
d:|altera|72|quartus|lmf|maxplus2.lmf
418 
9a59d39b0706640b4b2718e8a1ff1f
419 
# macro_sequence
420 
 
421 
# end
422 
# entity
423 
balance
424 
# storage
425 
db|LB.(11).cnf
426 
db|LB.(11).cnf
427 
# logic_option {
428 
AUTO_RAM_RECOGNITION
429 
ON
430 
}
431 
# case_insensitive
432 
# source_file
433 
Balance|balance.vhd
434 
8ac8ddf2290af175da898a7da19029
435 
4
436 
# internal_option {
437 
HDL_INITIAL_FANOUT_LIMIT
438 
OFF
439 
AUTO_RESOURCE_SHARING
440 
OFF
441 
AUTO_RAM_RECOGNITION
442 
ON
443 
AUTO_ROM_RECOGNITION
444 
ON
445 
}
446 
# user_parameter {
447 
data_width
448 
64
449 
PARAMETER_SIGNED_DEC
450 
USR
451 
ctrl_width
452 
8
453 
PARAMETER_SIGNED_DEC
454 
USR
455 
 constraint(in_data)
456 
63 downto 0
457 
PARAMETER_STRING
458 
USR
459 
 constraint(in_ctrl)
460 
7 downto 0
461 
PARAMETER_STRING
462 
USR
463 
 constraint(out_data)
464 
63 downto 0
465 
PARAMETER_STRING
466 
USR
467 
 constraint(out_ctrl)
468 
7 downto 0
469 
PARAMETER_STRING
470 
USR
471 
 constraint(in_next_mac)
472 
47 downto 0
473 
PARAMETER_STRING
474 
USR
475 
 constraint(in_exit_port)
476 
7 downto 0
477 
PARAMETER_STRING
478 
USR
479 
 constraint(key)
480 
11 downto 0
481 
PARAMETER_STRING
482 
USR
483 
}
484 
# lmf
485 
d:|altera|72|quartus|lmf|maxplus2.lmf
486 
9a59d39b0706640b4b2718e8a1ff1f
487 
# macro_sequence
488 
 
489 
# end
490 
# entity
491 
hash
492 
# storage
493 
db|LB.(13).cnf
494 
db|LB.(13).cnf
495 
# logic_option {
496 
AUTO_RAM_RECOGNITION
497 
ON
498 
}
499 
# case_insensitive
500 
# source_file
501 
Balance|hash.vhd
502 
3f8b544165ae5bf77c725c78f94a7a
503 
4
504 
# internal_option {
505 
HDL_INITIAL_FANOUT_LIMIT
506 
OFF
507 
AUTO_RESOURCE_SHARING
508 
OFF
509 
AUTO_RAM_RECOGNITION
510 
ON
511 
AUTO_ROM_RECOGNITION
512 
ON
513 
}
514 
# user_parameter {
515 
key_width
516 
48
517 
PARAMETER_SIGNED_DEC
518 
USR
519 
add_width
520 
12
521 
PARAMETER_SIGNED_DEC
522 
USR
523 
hash_no
524 
1
525 
PARAMETER_SIGNED_DEC
526 
USR
527 
 constraint(key)
528 
47 downto 0
529 
PARAMETER_STRING
530 
USR
531 
 constraint(address)
532 
11 downto 0
533 
PARAMETER_STRING
534 
USR
535 
}
536 
# lmf
537 
d:|altera|72|quartus|lmf|maxplus2.lmf
538 
9a59d39b0706640b4b2718e8a1ff1f
539 
# macro_sequence
540 
 
541 
# end
542 
# entity
543 
small_fifo
544 
# storage
545 
db|LB.(14).cnf
546 
db|LB.(14).cnf
547 
# logic_option {
548 
AUTO_RAM_RECOGNITION
549 
ON
550 
}
551 
# case_sensitive
552 
# source_file
553 
small_fifo.v
554 
1177d4c5f95945d866fbc28febfb18a6
555 
7
556 
# internal_option {
557 
HDL_INITIAL_FANOUT_LIMIT
558 
OFF
559 
AUTO_RESOURCE_SHARING
560 
OFF
561 
AUTO_RAM_RECOGNITION
562 
ON
563 
AUTO_ROM_RECOGNITION
564 
ON
565 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
566 
OFF
567 
}
568 
# user_parameter {
569 
WIDTH
570 
56
571 
PARAMETER_SIGNED_DEC
572 
USR
573 
MAX_DEPTH_BITS
574 
5
575 
PARAMETER_SIGNED_DEC
576 
USR
577 
NEARLY_FULL
578 
31
579 
PARAMETER_SIGNED_DEC
580 
DEF
581 
}
582 
# lmf
583 
d:|altera|72|quartus|lmf|
584 
d41d8cd98f0b24e980998ecf8427e
585 
# macro_sequence
586 
 
587 
# end
588 
# entity
589 
classifier_arbiter
590 
# storage
591 
db|LB.(18).cnf
592 
db|LB.(18).cnf
593 
# logic_option {
594 
AUTO_RAM_RECOGNITION
595 
ON
596 
}
597 
# case_sensitive
598 
# source_file
599 
classifier_arbiter|classifier_arbiter.v
600 
87aecbb4e8311353df2d30582c654afb
601 
7
602 
# internal_option {
603 
HDL_INITIAL_FANOUT_LIMIT
604 
OFF
605 
AUTO_RESOURCE_SHARING
606 
OFF
607 
AUTO_RAM_RECOGNITION
608 
ON
609 
AUTO_ROM_RECOGNITION
610 
ON
611 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
612 
OFF
613 
}
614 
# user_parameter {
615 
DATA_WIDTH
616 
64
617 
PARAMETER_SIGNED_DEC
618 
USR
619 
CTRL_WIDTH
620 
8
621 
PARAMETER_SIGNED_DEC
622 
USR
623 
UDP_REG_SRC_WIDTH
624 
2
625 
PARAMETER_SIGNED_DEC
626 
DEF
627 
STAGE_NUMBER
628 
2
629 
PARAMETER_SIGNED_DEC
630 
DEF
631 
NUM_QUEUES
632 
8
633 
PARAMETER_SIGNED_DEC
634 
DEF
635 
}
636 
# lmf
637 
d:|altera|72|quartus|lmf|
638 
d41d8cd98f0b24e980998ecf8427e
639 
# macro_sequence
640 
 
641 
# end
642 
# entity
643 
small_fifo
644 
# storage
645 
db|LB.(19).cnf
646 
db|LB.(19).cnf
647 
# logic_option {
648 
AUTO_RAM_RECOGNITION
649 
ON
650 
}
651 
# case_sensitive
652 
# source_file
653 
small_fifo.v
654 
1177d4c5f95945d866fbc28febfb18a6
655 
7
656 
# internal_option {
657 
HDL_INITIAL_FANOUT_LIMIT
658 
OFF
659 
AUTO_RESOURCE_SHARING
660 
OFF
661 
AUTO_RAM_RECOGNITION
662 
ON
663 
AUTO_ROM_RECOGNITION
664 
ON
665 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
666 
OFF
667 
}
668 
# user_parameter {
669 
WIDTH
670 
72
671 
PARAMETER_SIGNED_DEC
672 
USR
673 
MAX_DEPTH_BITS
674 
8
675 
PARAMETER_SIGNED_DEC
676 
USR
677 
NEARLY_FULL
678 
60
679 
PARAMETER_SIGNED_DEC
680 
USR
681 
}
682 
# lmf
683 
d:|altera|72|quartus|lmf|
684 
d41d8cd98f0b24e980998ecf8427e
685 
# macro_sequence
686 
 
687 
# end
688 
# entity
689 
altsyncram
690 
# storage
691 
db|LB.(20).cnf
692 
db|LB.(20).cnf
693 
# case_insensitive
694 
# source_file
695 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
696 
1a8e44bce3df5c9cae2128978e887541
697 
6
698 
# user_parameter {
699 
BYTE_SIZE_BLOCK
700 
8
701 
PARAMETER_UNKNOWN
702 
DEF
703 
AUTO_CARRY_CHAINS
704 
ON
705 
AUTO_CARRY
706 
USR
707 
IGNORE_CARRY_BUFFERS
708 
OFF
709 
IGNORE_CARRY
710 
USR
711 
AUTO_CASCADE_CHAINS
712 
ON
713 
AUTO_CASCADE
714 
USR
715 
IGNORE_CASCADE_BUFFERS
716 
OFF
717 
IGNORE_CASCADE
718 
USR
719 
WIDTH_BYTEENA
720 
1
721 
PARAMETER_UNKNOWN
722 
DEF
723 
OPERATION_MODE
724 
DUAL_PORT
725 
PARAMETER_UNKNOWN
726 
USR
727 
WIDTH_A
728 
8
729 
PARAMETER_UNKNOWN
730 
USR
731 
WIDTHAD_A
732 
3
733 
PARAMETER_UNKNOWN
734 
USR
735 
NUMWORDS_A
736 
8
737 
PARAMETER_UNKNOWN
738 
USR
739 
OUTDATA_REG_A
740 
UNREGISTERED
741 
PARAMETER_UNKNOWN
742 
DEF
743 
ADDRESS_ACLR_A
744 
NONE
745 
PARAMETER_UNKNOWN
746 
USR
747 
OUTDATA_ACLR_A
748 
NONE
749 
PARAMETER_UNKNOWN
750 
DEF
751 
WRCONTROL_ACLR_A
752 
NONE
753 
PARAMETER_UNKNOWN
754 
USR
755 
INDATA_ACLR_A
756 
NONE
757 
PARAMETER_UNKNOWN
758 
USR
759 
BYTEENA_ACLR_A
760 
NONE
761 
PARAMETER_UNKNOWN
762 
DEF
763 
WIDTH_B
764 
8
765 
PARAMETER_UNKNOWN
766 
USR
767 
WIDTHAD_B
768 
3
769 
PARAMETER_UNKNOWN
770 
USR
771 
NUMWORDS_B
772 
8
773 
PARAMETER_UNKNOWN
774 
USR
775 
INDATA_REG_B
776 
CLOCK1
777 
PARAMETER_UNKNOWN
778 
DEF
779 
WRCONTROL_WRADDRESS_REG_B
780 
CLOCK1
781 
PARAMETER_UNKNOWN
782 
DEF
783 
RDCONTROL_REG_B
784 
CLOCK1
785 
PARAMETER_UNKNOWN
786 
DEF
787 
ADDRESS_REG_B
788 
CLOCK0
789 
PARAMETER_UNKNOWN
790 
USR
791 
OUTDATA_REG_B
792 
UNREGISTERED
793 
PARAMETER_UNKNOWN
794 
USR
795 
BYTEENA_REG_B
796 
CLOCK1
797 
PARAMETER_UNKNOWN
798 
DEF
799 
INDATA_ACLR_B
800 
NONE
801 
PARAMETER_UNKNOWN
802 
DEF
803 
WRCONTROL_ACLR_B
804 
NONE
805 
PARAMETER_UNKNOWN
806 
DEF
807 
ADDRESS_ACLR_B
808 
NONE
809 
PARAMETER_UNKNOWN
810 
USR
811 
OUTDATA_ACLR_B
812 
NONE
813 
PARAMETER_UNKNOWN
814 
USR
815 
RDCONTROL_ACLR_B
816 
NONE
817 
PARAMETER_UNKNOWN
818 
DEF
819 
BYTEENA_ACLR_B
820 
NONE
821 
PARAMETER_UNKNOWN
822 
DEF
823 
WIDTH_BYTEENA_A
824 
1
825 
PARAMETER_UNKNOWN
826 
DEF
827 
WIDTH_BYTEENA_B
828 
1
829 
PARAMETER_UNKNOWN
830 
DEF
831 
RAM_BLOCK_TYPE
832 
AUTO
833 
PARAMETER_UNKNOWN
834 
USR
835 
BYTE_SIZE
836 
8
837 
PARAMETER_UNKNOWN
838 
DEF
839 
READ_DURING_WRITE_MODE_MIXED_PORTS
840 
OLD_DATA
841 
PARAMETER_UNKNOWN
842 
USR
843 
READ_DURING_WRITE_MODE_PORT_A
844 
NEW_DATA_NO_NBE_READ
845 
PARAMETER_UNKNOWN
846 
DEF
847 
READ_DURING_WRITE_MODE_PORT_B
848 
NEW_DATA_NO_NBE_READ
849 
PARAMETER_UNKNOWN
850 
DEF
851 
INIT_FILE
852 
UNUSED
853 
PARAMETER_UNKNOWN
854 
DEF
855 
INIT_FILE_LAYOUT
856 
PORT_A
857 
PARAMETER_UNKNOWN
858 
DEF
859 
MAXIMUM_DEPTH
860 
 
861 
PARAMETER_UNKNOWN
862 
DEF
863 
CLOCK_ENABLE_INPUT_A
864 
NORMAL
865 
PARAMETER_UNKNOWN
866 
DEF
867 
CLOCK_ENABLE_INPUT_B
868 
NORMAL
869 
PARAMETER_UNKNOWN
870 
DEF
871 
CLOCK_ENABLE_OUTPUT_A
872 
NORMAL
873 
PARAMETER_UNKNOWN
874 
DEF
875 
CLOCK_ENABLE_OUTPUT_B
876 
NORMAL
877 
PARAMETER_UNKNOWN
878 
DEF
879 
CLOCK_ENABLE_CORE_A
880 
USE_INPUT_CLKEN
881 
PARAMETER_UNKNOWN
882 
DEF
883 
CLOCK_ENABLE_CORE_B
884 
USE_INPUT_CLKEN
885 
PARAMETER_UNKNOWN
886 
DEF
887 
ENABLE_ECC
888 
FALSE
889 
PARAMETER_UNKNOWN
890 
DEF
891 
DEVICE_FAMILY
892 
Stratix II
893 
PARAMETER_UNKNOWN
894 
USR
895 
CBXI_PARAMETER
896 
altsyncram_p9i1
897 
PARAMETER_UNKNOWN
898 
USR
899 
}
900 
# used_port {
901 
wren_a
902 
-1
903 
3
904 
data_a7
905 
-1
906 
3
907 
data_a6
908 
-1
909 
3
910 
data_a5
911 
-1
912 
3
913 
data_a4
914 
-1
915 
3
916 
data_a3
917 
-1
918 
3
919 
data_a2
920 
-1
921 
3
922 
data_a1
923 
-1
924 
3
925 
data_a0
926 
-1
927 
3
928 
clock0
929 
-1
930 
3
931 
address_b2
932 
-1
933 
3
934 
address_b1
935 
-1
936 
3
937 
address_b0
938 
-1
939 
3
940 
address_a2
941 
-1
942 
3
943 
address_a1
944 
-1
945 
3
946 
address_a0
947 
-1
948 
3
949 
}
950 
# include_file {
951 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
952 
c22bfd353214c01495b560fc34e47d79
953 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
954 
2263a3bdfffeb150af977ee13902f70
955 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
956 
bd0e2f5e01c1bd360461dceb53d48
957 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
958 
f39123b8592ab2dac019716e56b3ec18
959 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
960 
60d229340bc3c24acb0a137b4849830
961 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
962 
d4e3a69a331d3a99d3281790d99a1ebd
963 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
964 
e66a83eccf6717bed97c99d891ad085
965 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
966 
99d442b5b66c88db4daf94d99c6e4e77
967 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
968 
74e08939f96a7ea8e7a4d59a5b01fe7
969 
}
970 
# lmf
971 
d:|altera|72|quartus|lmf|
972 
d41d8cd98f0b24e980998ecf8427e
973 
# macro_sequence
974 
 
975 
# end
976 
# entity
977 
altsyncram_p9i1
978 
# storage
979 
db|LB.(21).cnf
980 
db|LB.(21).cnf
981 
# case_insensitive
982 
# source_file
983 
db|altsyncram_p9i1.tdf
984 
e5f9a626a8472ce65cde0ec8abd6080
985 
6
986 
# used_port {
987 
wren_a
988 
-1
989 
3
990 
data_a7
991 
-1
992 
3
993 
data_a6
994 
-1
995 
3
996 
data_a5
997 
-1
998 
3
999 
data_a4
1000 
-1
1001 
3
1002 
data_a3
1003 
-1
1004 
3
1005 
data_a2
1006 
-1
1007 
3
1008 
data_a1
1009 
-1
1010 
3
1011 
data_a0
1012 
-1
1013 
3
1014 
clock0
1015 
-1
1016 
3
1017 
address_b2
1018 
-1
1019 
3
1020 
address_b1
1021 
-1
1022 
3
1023 
address_b0
1024 
-1
1025 
3
1026 
address_a2
1027 
-1
1028 
3
1029 
address_a1
1030 
-1
1031 
3
1032 
address_a0
1033 
-1
1034 
3
1035 
}
1036 
# lmf
1037 
d:|altera|72|quartus|lmf|
1038 
d41d8cd98f0b24e980998ecf8427e
1039 
# macro_sequence
1040 
 
1041 
# end
1042 
# entity
1043 
altsyncram
1044 
# storage
1045 
db|LB.(22).cnf
1046 
db|LB.(22).cnf
1047 
# case_insensitive
1048 
# source_file
1049 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
1050 
1a8e44bce3df5c9cae2128978e887541
1051 
6
1052 
# user_parameter {
1053 
BYTE_SIZE_BLOCK
1054 
8
1055 
PARAMETER_UNKNOWN
1056 
DEF
1057 
AUTO_CARRY_CHAINS
1058 
ON
1059 
AUTO_CARRY
1060 
USR
1061 
IGNORE_CARRY_BUFFERS
1062 
OFF
1063 
IGNORE_CARRY
1064 
USR
1065 
AUTO_CASCADE_CHAINS
1066 
ON
1067 
AUTO_CASCADE
1068 
USR
1069 
IGNORE_CASCADE_BUFFERS
1070 
OFF
1071 
IGNORE_CASCADE
1072 
USR
1073 
WIDTH_BYTEENA
1074 
1
1075 
PARAMETER_UNKNOWN
1076 
DEF
1077 
OPERATION_MODE
1078 
DUAL_PORT
1079 
PARAMETER_UNKNOWN
1080 
USR
1081 
WIDTH_A
1082 
72
1083 
PARAMETER_UNKNOWN
1084 
USR
1085 
WIDTHAD_A
1086 
8
1087 
PARAMETER_UNKNOWN
1088 
USR
1089 
NUMWORDS_A
1090 
256
1091 
PARAMETER_UNKNOWN
1092 
USR
1093 
OUTDATA_REG_A
1094 
UNREGISTERED
1095 
PARAMETER_UNKNOWN
1096 
DEF
1097 
ADDRESS_ACLR_A
1098 
NONE
1099 
PARAMETER_UNKNOWN
1100 
USR
1101 
OUTDATA_ACLR_A
1102 
NONE
1103 
PARAMETER_UNKNOWN
1104 
DEF
1105 
WRCONTROL_ACLR_A
1106 
NONE
1107 
PARAMETER_UNKNOWN
1108 
USR
1109 
INDATA_ACLR_A
1110 
NONE
1111 
PARAMETER_UNKNOWN
1112 
USR
1113 
BYTEENA_ACLR_A
1114 
NONE
1115 
PARAMETER_UNKNOWN
1116 
DEF
1117 
WIDTH_B
1118 
72
1119 
PARAMETER_UNKNOWN
1120 
USR
1121 
WIDTHAD_B
1122 
8
1123 
PARAMETER_UNKNOWN
1124 
USR
1125 
NUMWORDS_B
1126 
256
1127 
PARAMETER_UNKNOWN
1128 
USR
1129 
INDATA_REG_B
1130 
CLOCK1
1131 
PARAMETER_UNKNOWN
1132 
DEF
1133 
WRCONTROL_WRADDRESS_REG_B
1134 
CLOCK1
1135 
PARAMETER_UNKNOWN
1136 
DEF
1137 
RDCONTROL_REG_B
1138 
CLOCK1
1139 
PARAMETER_UNKNOWN
1140 
DEF
1141 
ADDRESS_REG_B
1142 
CLOCK0
1143 
PARAMETER_UNKNOWN
1144 
USR
1145 
OUTDATA_REG_B
1146 
UNREGISTERED
1147 
PARAMETER_UNKNOWN
1148 
USR
1149 
BYTEENA_REG_B
1150 
CLOCK1
1151 
PARAMETER_UNKNOWN
1152 
DEF
1153 
INDATA_ACLR_B
1154 
NONE
1155 
PARAMETER_UNKNOWN
1156 
DEF
1157 
WRCONTROL_ACLR_B
1158 
NONE
1159 
PARAMETER_UNKNOWN
1160 
DEF
1161 
ADDRESS_ACLR_B
1162 
NONE
1163 
PARAMETER_UNKNOWN
1164 
USR
1165 
OUTDATA_ACLR_B
1166 
NONE
1167 
PARAMETER_UNKNOWN
1168 
USR
1169 
RDCONTROL_ACLR_B
1170 
NONE
1171 
PARAMETER_UNKNOWN
1172 
DEF
1173 
BYTEENA_ACLR_B
1174 
NONE
1175 
PARAMETER_UNKNOWN
1176 
DEF
1177 
WIDTH_BYTEENA_A
1178 
1
1179 
PARAMETER_UNKNOWN
1180 
DEF
1181 
WIDTH_BYTEENA_B
1182 
1
1183 
PARAMETER_UNKNOWN
1184 
DEF
1185 
RAM_BLOCK_TYPE
1186 
AUTO
1187 
PARAMETER_UNKNOWN
1188 
USR
1189 
BYTE_SIZE
1190 
8
1191 
PARAMETER_UNKNOWN
1192 
DEF
1193 
READ_DURING_WRITE_MODE_MIXED_PORTS
1194 
OLD_DATA
1195 
PARAMETER_UNKNOWN
1196 
USR
1197 
READ_DURING_WRITE_MODE_PORT_A
1198 
NEW_DATA_NO_NBE_READ
1199 
PARAMETER_UNKNOWN
1200 
DEF
1201 
READ_DURING_WRITE_MODE_PORT_B
1202 
NEW_DATA_NO_NBE_READ
1203 
PARAMETER_UNKNOWN
1204 
DEF
1205 
INIT_FILE
1206 
UNUSED
1207 
PARAMETER_UNKNOWN
1208 
DEF
1209 
INIT_FILE_LAYOUT
1210 
PORT_A
1211 
PARAMETER_UNKNOWN
1212 
DEF
1213 
MAXIMUM_DEPTH
1214 
 
1215 
PARAMETER_UNKNOWN
1216 
DEF
1217 
CLOCK_ENABLE_INPUT_A
1218 
NORMAL
1219 
PARAMETER_UNKNOWN
1220 
DEF
1221 
CLOCK_ENABLE_INPUT_B
1222 
NORMAL
1223 
PARAMETER_UNKNOWN
1224 
DEF
1225 
CLOCK_ENABLE_OUTPUT_A
1226 
NORMAL
1227 
PARAMETER_UNKNOWN
1228 
DEF
1229 
CLOCK_ENABLE_OUTPUT_B
1230 
NORMAL
1231 
PARAMETER_UNKNOWN
1232 
DEF
1233 
CLOCK_ENABLE_CORE_A
1234 
USE_INPUT_CLKEN
1235 
PARAMETER_UNKNOWN
1236 
DEF
1237 
CLOCK_ENABLE_CORE_B
1238 
USE_INPUT_CLKEN
1239 
PARAMETER_UNKNOWN
1240 
DEF
1241 
ENABLE_ECC
1242 
FALSE
1243 
PARAMETER_UNKNOWN
1244 
DEF
1245 
DEVICE_FAMILY
1246 
Stratix II
1247 
PARAMETER_UNKNOWN
1248 
USR
1249 
CBXI_PARAMETER
1250 
altsyncram_1ui1
1251 
PARAMETER_UNKNOWN
1252 
USR
1253 
}
1254 
# used_port {
1255 
wren_a
1256 
-1
1257 
3
1258 
q_b9
1259 
-1
1260 
3
1261 
q_b8
1262 
-1
1263 
3
1264 
q_b71
1265 
-1
1266 
3
1267 
q_b70
1268 
-1
1269 
3
1270 
q_b7
1271 
-1
1272 
3
1273 
q_b69
1274 
-1
1275 
3
1276 
q_b68
1277 
-1
1278 
3
1279 
q_b67
1280 
-1
1281 
3
1282 
q_b66
1283 
-1
1284 
3
1285 
q_b65
1286 
-1
1287 
3
1288 
q_b64
1289 
-1
1290 
3
1291 
q_b63
1292 
-1
1293 
3
1294 
q_b62
1295 
-1
1296 
3
1297 
q_b61
1298 
-1
1299 
3
1300 
q_b60
1301 
-1
1302 
3
1303 
q_b6
1304 
-1
1305 
3
1306 
q_b59
1307 
-1
1308 
3
1309 
q_b58
1310 
-1
1311 
3
1312 
q_b57
1313 
-1
1314 
3
1315 
q_b56
1316 
-1
1317 
3
1318 
q_b55
1319 
-1
1320 
3
1321 
q_b54
1322 
-1
1323 
3
1324 
q_b53
1325 
-1
1326 
3
1327 
q_b52
1328 
-1
1329 
3
1330 
q_b51
1331 
-1
1332 
3
1333 
q_b50
1334 
-1
1335 
3
1336 
q_b5
1337 
-1
1338 
3
1339 
q_b49
1340 
-1
1341 
3
1342 
q_b48
1343 
-1
1344 
3
1345 
q_b47
1346 
-1
1347 
3
1348 
q_b46
1349 
-1
1350 
3
1351 
q_b45
1352 
-1
1353 
3
1354 
q_b44
1355 
-1
1356 
3
1357 
q_b43
1358 
-1
1359 
3
1360 
q_b42
1361 
-1
1362 
3
1363 
q_b41
1364 
-1
1365 
3
1366 
q_b40
1367 
-1
1368 
3
1369 
q_b4
1370 
-1
1371 
3
1372 
q_b39
1373 
-1
1374 
3
1375 
q_b38
1376 
-1
1377 
3
1378 
q_b37
1379 
-1
1380 
3
1381 
q_b36
1382 
-1
1383 
3
1384 
q_b35
1385 
-1
1386 
3
1387 
q_b34
1388 
-1
1389 
3
1390 
q_b33
1391 
-1
1392 
3
1393 
q_b32
1394 
-1
1395 
3
1396 
q_b31
1397 
-1
1398 
3
1399 
q_b30
1400 
-1
1401 
3
1402 
q_b3
1403 
-1
1404 
3
1405 
q_b29
1406 
-1
1407 
3
1408 
q_b28
1409 
-1
1410 
3
1411 
q_b27
1412 
-1
1413 
3
1414 
q_b26
1415 
-1
1416 
3
1417 
q_b25
1418 
-1
1419 
3
1420 
q_b24
1421 
-1
1422 
3
1423 
q_b23
1424 
-1
1425 
3
1426 
q_b22
1427 
-1
1428 
3
1429 
q_b21
1430 
-1
1431 
3
1432 
q_b20
1433 
-1
1434 
3
1435 
q_b2
1436 
-1
1437 
3
1438 
q_b19
1439 
-1
1440 
3
1441 
q_b18
1442 
-1
1443 
3
1444 
q_b17
1445 
-1
1446 
3
1447 
q_b16
1448 
-1
1449 
3
1450 
q_b15
1451 
-1
1452 
3
1453 
q_b14
1454 
-1
1455 
3
1456 
q_b13
1457 
-1
1458 
3
1459 
q_b12
1460 
-1
1461 
3
1462 
q_b11
1463 
-1
1464 
3
1465 
q_b10
1466 
-1
1467 
3
1468 
q_b1
1469 
-1
1470 
3
1471 
q_b0
1472 
-1
1473 
3
1474 
data_a9
1475 
-1
1476 
3
1477 
data_a8
1478 
-1
1479 
3
1480 
data_a71
1481 
-1
1482 
3
1483 
data_a70
1484 
-1
1485 
3
1486 
data_a7
1487 
-1
1488 
3
1489 
data_a69
1490 
-1
1491 
3
1492 
data_a68
1493 
-1
1494 
3
1495 
data_a67
1496 
-1
1497 
3
1498 
data_a66
1499 
-1
1500 
3
1501 
data_a65
1502 
-1
1503 
3
1504 
data_a64
1505 
-1
1506 
3
1507 
data_a63
1508 
-1
1509 
3
1510 
data_a62
1511 
-1
1512 
3
1513 
data_a61
1514 
-1
1515 
3
1516 
data_a60
1517 
-1
1518 
3
1519 
data_a6
1520 
-1
1521 
3
1522 
data_a59
1523 
-1
1524 
3
1525 
data_a58
1526 
-1
1527 
3
1528 
data_a57
1529 
-1
1530 
3
1531 
data_a56
1532 
-1
1533 
3
1534 
data_a55
1535 
-1
1536 
3
1537 
data_a54
1538 
-1
1539 
3
1540 
data_a53
1541 
-1
1542 
3
1543 
data_a52
1544 
-1
1545 
3
1546 
data_a51
1547 
-1
1548 
3
1549 
data_a50
1550 
-1
1551 
3
1552 
data_a5
1553 
-1
1554 
3
1555 
data_a49
1556 
-1
1557 
3
1558 
data_a48
1559 
-1
1560 
3
1561 
data_a47
1562 
-1
1563 
3
1564 
data_a46
1565 
-1
1566 
3
1567 
data_a45
1568 
-1
1569 
3
1570 
data_a44
1571 
-1
1572 
3
1573 
data_a43
1574 
-1
1575 
3
1576 
data_a42
1577 
-1
1578 
3
1579 
data_a41
1580 
-1
1581 
3
1582 
data_a40
1583 
-1
1584 
3
1585 
data_a4
1586 
-1
1587 
3
1588 
data_a39
1589 
-1
1590 
3
1591 
data_a38
1592 
-1
1593 
3
1594 
data_a37
1595 
-1
1596 
3
1597 
data_a36
1598 
-1
1599 
3
1600 
data_a35
1601 
-1
1602 
3
1603 
data_a34
1604 
-1
1605 
3
1606 
data_a33
1607 
-1
1608 
3
1609 
data_a32
1610 
-1
1611 
3
1612 
data_a31
1613 
-1
1614 
3
1615 
data_a30
1616 
-1
1617 
3
1618 
data_a3
1619 
-1
1620 
3
1621 
data_a29
1622 
-1
1623 
3
1624 
data_a28
1625 
-1
1626 
3
1627 
data_a27
1628 
-1
1629 
3
1630 
data_a26
1631 
-1
1632 
3
1633 
data_a25
1634 
-1
1635 
3
1636 
data_a24
1637 
-1
1638 
3
1639 
data_a23
1640 
-1
1641 
3
1642 
data_a22
1643 
-1
1644 
3
1645 
data_a21
1646 
-1
1647 
3
1648 
data_a20
1649 
-1
1650 
3
1651 
data_a2
1652 
-1
1653 
3
1654 
data_a19
1655 
-1
1656 
3
1657 
data_a18
1658 
-1
1659 
3
1660 
data_a17
1661 
-1
1662 
3
1663 
data_a16
1664 
-1
1665 
3
1666 
data_a15
1667 
-1
1668 
3
1669 
data_a14
1670 
-1
1671 
3
1672 
data_a13
1673 
-1
1674 
3
1675 
data_a12
1676 
-1
1677 
3
1678 
data_a11
1679 
-1
1680 
3
1681 
data_a10
1682 
-1
1683 
3
1684 
data_a1
1685 
-1
1686 
3
1687 
data_a0
1688 
-1
1689 
3
1690 
clock0
1691 
-1
1692 
3
1693 
address_b7
1694 
-1
1695 
3
1696 
address_b6
1697 
-1
1698 
3
1699 
address_b5
1700 
-1
1701 
3
1702 
address_b4
1703 
-1
1704 
3
1705 
address_b3
1706 
-1
1707 
3
1708 
address_b2
1709 
-1
1710 
3
1711 
address_b1
1712 
-1
1713 
3
1714 
address_b0
1715 
-1
1716 
3
1717 
address_a7
1718 
-1
1719 
3
1720 
address_a6
1721 
-1
1722 
3
1723 
address_a5
1724 
-1
1725 
3
1726 
address_a4
1727 
-1
1728 
3
1729 
address_a3
1730 
-1
1731 
3
1732 
address_a2
1733 
-1
1734 
3
1735 
address_a1
1736 
-1
1737 
3
1738 
address_a0
1739 
-1
1740 
3
1741 
}
1742 
# include_file {
1743 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
1744 
c22bfd353214c01495b560fc34e47d79
1745 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
1746 
2263a3bdfffeb150af977ee13902f70
1747 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
1748 
bd0e2f5e01c1bd360461dceb53d48
1749 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
1750 
f39123b8592ab2dac019716e56b3ec18
1751 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
1752 
60d229340bc3c24acb0a137b4849830
1753 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
1754 
d4e3a69a331d3a99d3281790d99a1ebd
1755 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
1756 
e66a83eccf6717bed97c99d891ad085
1757 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
1758 
99d442b5b66c88db4daf94d99c6e4e77
1759 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
1760 
74e08939f96a7ea8e7a4d59a5b01fe7
1761 
}
1762 
# lmf
1763 
d:|altera|72|quartus|lmf|
1764 
d41d8cd98f0b24e980998ecf8427e
1765 
# macro_sequence
1766 
 
1767 
# end
1768 
# entity
1769 
altsyncram_1ui1
1770 
# storage
1771 
db|LB.(23).cnf
1772 
db|LB.(23).cnf
1773 
# case_insensitive
1774 
# source_file
1775 
db|altsyncram_1ui1.tdf
1776 
2a44da8228680dddb14d7d6f38fa18a
1777 
6
1778 
# used_port {
1779 
wren_a
1780 
-1
1781 
3
1782 
q_b9
1783 
-1
1784 
3
1785 
q_b8
1786 
-1
1787 
3
1788 
q_b71
1789 
-1
1790 
3
1791 
q_b70
1792 
-1
1793 
3
1794 
q_b7
1795 
-1
1796 
3
1797 
q_b69
1798 
-1
1799 
3
1800 
q_b68
1801 
-1
1802 
3
1803 
q_b67
1804 
-1
1805 
3
1806 
q_b66
1807 
-1
1808 
3
1809 
q_b65
1810 
-1
1811 
3
1812 
q_b64
1813 
-1
1814 
3
1815 
q_b63
1816 
-1
1817 
3
1818 
q_b62
1819 
-1
1820 
3
1821 
q_b61
1822 
-1
1823 
3
1824 
q_b60
1825 
-1
1826 
3
1827 
q_b6
1828 
-1
1829 
3
1830 
q_b59
1831 
-1
1832 
3
1833 
q_b58
1834 
-1
1835 
3
1836 
q_b57
1837 
-1
1838 
3
1839 
q_b56
1840 
-1
1841 
3
1842 
q_b55
1843 
-1
1844 
3
1845 
q_b54
1846 
-1
1847 
3
1848 
q_b53
1849 
-1
1850 
3
1851 
q_b52
1852 
-1
1853 
3
1854 
q_b51
1855 
-1
1856 
3
1857 
q_b50
1858 
-1
1859 
3
1860 
q_b5
1861 
-1
1862 
3
1863 
q_b49
1864 
-1
1865 
3
1866 
q_b48
1867 
-1
1868 
3
1869 
q_b47
1870 
-1
1871 
3
1872 
q_b46
1873 
-1
1874 
3
1875 
q_b45
1876 
-1
1877 
3
1878 
q_b44
1879 
-1
1880 
3
1881 
q_b43
1882 
-1
1883 
3
1884 
q_b42
1885 
-1
1886 
3
1887 
q_b41
1888 
-1
1889 
3
1890 
q_b40
1891 
-1
1892 
3
1893 
q_b4
1894 
-1
1895 
3
1896 
q_b39
1897 
-1
1898 
3
1899 
q_b38
1900 
-1
1901 
3
1902 
q_b37
1903 
-1
1904 
3
1905 
q_b36
1906 
-1
1907 
3
1908 
q_b35
1909 
-1
1910 
3
1911 
q_b34
1912 
-1
1913 
3
1914 
q_b33
1915 
-1
1916 
3
1917 
q_b32
1918 
-1
1919 
3
1920 
q_b31
1921 
-1
1922 
3
1923 
q_b30
1924 
-1
1925 
3
1926 
q_b3
1927 
-1
1928 
3
1929 
q_b29
1930 
-1
1931 
3
1932 
q_b28
1933 
-1
1934 
3
1935 
q_b27
1936 
-1
1937 
3
1938 
q_b26
1939 
-1
1940 
3
1941 
q_b25
1942 
-1
1943 
3
1944 
q_b24
1945 
-1
1946 
3
1947 
q_b23
1948 
-1
1949 
3
1950 
q_b22
1951 
-1
1952 
3
1953 
q_b21
1954 
-1
1955 
3
1956 
q_b20
1957 
-1
1958 
3
1959 
q_b2
1960 
-1
1961 
3
1962 
q_b19
1963 
-1
1964 
3
1965 
q_b18
1966 
-1
1967 
3
1968 
q_b17
1969 
-1
1970 
3
1971 
q_b16
1972 
-1
1973 
3
1974 
q_b15
1975 
-1
1976 
3
1977 
q_b14
1978 
-1
1979 
3
1980 
q_b13
1981 
-1
1982 
3
1983 
q_b12
1984 
-1
1985 
3
1986 
q_b11
1987 
-1
1988 
3
1989 
q_b10
1990 
-1
1991 
3
1992 
q_b1
1993 
-1
1994 
3
1995 
q_b0
1996 
-1
1997 
3
1998 
data_a9
1999 
-1
2000 
3
2001 
data_a8
2002 
-1
2003 
3
2004 
data_a71
2005 
-1
2006 
3
2007 
data_a70
2008 
-1
2009 
3
2010 
data_a7
2011 
-1
2012 
3
2013 
data_a69
2014 
-1
2015 
3
2016 
data_a68
2017 
-1
2018 
3
2019 
data_a67
2020 
-1
2021 
3
2022 
data_a66
2023 
-1
2024 
3
2025 
data_a65
2026 
-1
2027 
3
2028 
data_a64
2029 
-1
2030 
3
2031 
data_a63
2032 
-1
2033 
3
2034 
data_a62
2035 
-1
2036 
3
2037 
data_a61
2038 
-1
2039 
3
2040 
data_a60
2041 
-1
2042 
3
2043 
data_a6
2044 
-1
2045 
3
2046 
data_a59
2047 
-1
2048 
3
2049 
data_a58
2050 
-1
2051 
3
2052 
data_a57
2053 
-1
2054 
3
2055 
data_a56
2056 
-1
2057 
3
2058 
data_a55
2059 
-1
2060 
3
2061 
data_a54
2062 
-1
2063 
3
2064 
data_a53
2065 
-1
2066 
3
2067 
data_a52
2068 
-1
2069 
3
2070 
data_a51
2071 
-1
2072 
3
2073 
data_a50
2074 
-1
2075 
3
2076 
data_a5
2077 
-1
2078 
3
2079 
data_a49
2080 
-1
2081 
3
2082 
data_a48
2083 
-1
2084 
3
2085 
data_a47
2086 
-1
2087 
3
2088 
data_a46
2089 
-1
2090 
3
2091 
data_a45
2092 
-1
2093 
3
2094 
data_a44
2095 
-1
2096 
3
2097 
data_a43
2098 
-1
2099 
3
2100 
data_a42
2101 
-1
2102 
3
2103 
data_a41
2104 
-1
2105 
3
2106 
data_a40
2107 
-1
2108 
3
2109 
data_a4
2110 
-1
2111 
3
2112 
data_a39
2113 
-1
2114 
3
2115 
data_a38
2116 
-1
2117 
3
2118 
data_a37
2119 
-1
2120 
3
2121 
data_a36
2122 
-1
2123 
3
2124 
data_a35
2125 
-1
2126 
3
2127 
data_a34
2128 
-1
2129 
3
2130 
data_a33
2131 
-1
2132 
3
2133 
data_a32
2134 
-1
2135 
3
2136 
data_a31
2137 
-1
2138 
3
2139 
data_a30
2140 
-1
2141 
3
2142 
data_a3
2143 
-1
2144 
3
2145 
data_a29
2146 
-1
2147 
3
2148 
data_a28
2149 
-1
2150 
3
2151 
data_a27
2152 
-1
2153 
3
2154 
data_a26
2155 
-1
2156 
3
2157 
data_a25
2158 
-1
2159 
3
2160 
data_a24
2161 
-1
2162 
3
2163 
data_a23
2164 
-1
2165 
3
2166 
data_a22
2167 
-1
2168 
3
2169 
data_a21
2170 
-1
2171 
3
2172 
data_a20
2173 
-1
2174 
3
2175 
data_a2
2176 
-1
2177 
3
2178 
data_a19
2179 
-1
2180 
3
2181 
data_a18
2182 
-1
2183 
3
2184 
data_a17
2185 
-1
2186 
3
2187 
data_a16
2188 
-1
2189 
3
2190 
data_a15
2191 
-1
2192 
3
2193 
data_a14
2194 
-1
2195 
3
2196 
data_a13
2197 
-1
2198 
3
2199 
data_a12
2200 
-1
2201 
3
2202 
data_a11
2203 
-1
2204 
3
2205 
data_a10
2206 
-1
2207 
3
2208 
data_a1
2209 
-1
2210 
3
2211 
data_a0
2212 
-1
2213 
3
2214 
clock0
2215 
-1
2216 
3
2217 
address_b7
2218 
-1
2219 
3
2220 
address_b6
2221 
-1
2222 
3
2223 
address_b5
2224 
-1
2225 
3
2226 
address_b4
2227 
-1
2228 
3
2229 
address_b3
2230 
-1
2231 
3
2232 
address_b2
2233 
-1
2234 
3
2235 
address_b1
2236 
-1
2237 
3
2238 
address_b0
2239 
-1
2240 
3
2241 
address_a7
2242 
-1
2243 
3
2244 
address_a6
2245 
-1
2246 
3
2247 
address_a5
2248 
-1
2249 
3
2250 
address_a4
2251 
-1
2252 
3
2253 
address_a3
2254 
-1
2255 
3
2256 
address_a2
2257 
-1
2258 
3
2259 
address_a1
2260 
-1
2261 
3
2262 
address_a0
2263 
-1
2264 
3
2265 
}
2266 
# lmf
2267 
d:|altera|72|quartus|lmf|
2268 
d41d8cd98f0b24e980998ecf8427e
2269 
# macro_sequence
2270 
 
2271 
# end
2272 
# entity
2273 
altsyncram
2274 
# storage
2275 
db|LB.(24).cnf
2276 
db|LB.(24).cnf
2277 
# case_insensitive
2278 
# source_file
2279 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
2280 
1a8e44bce3df5c9cae2128978e887541
2281 
6
2282 
# user_parameter {
2283 
BYTE_SIZE_BLOCK
2284 
8
2285 
PARAMETER_UNKNOWN
2286 
DEF
2287 
AUTO_CARRY_CHAINS
2288 
ON
2289 
AUTO_CARRY
2290 
USR
2291 
IGNORE_CARRY_BUFFERS
2292 
OFF
2293 
IGNORE_CARRY
2294 
USR
2295 
AUTO_CASCADE_CHAINS
2296 
ON
2297 
AUTO_CASCADE
2298 
USR
2299 
IGNORE_CASCADE_BUFFERS
2300 
OFF
2301 
IGNORE_CASCADE
2302 
USR
2303 
WIDTH_BYTEENA
2304 
1
2305 
PARAMETER_UNKNOWN
2306 
DEF
2307 
OPERATION_MODE
2308 
DUAL_PORT
2309 
PARAMETER_UNKNOWN
2310 
USR
2311 
WIDTH_A
2312 
72
2313 
PARAMETER_UNKNOWN
2314 
USR
2315 
WIDTHAD_A
2316 
3
2317 
PARAMETER_UNKNOWN
2318 
USR
2319 
NUMWORDS_A
2320 
8
2321 
PARAMETER_UNKNOWN
2322 
USR
2323 
OUTDATA_REG_A
2324 
UNREGISTERED
2325 
PARAMETER_UNKNOWN
2326 
DEF
2327 
ADDRESS_ACLR_A
2328 
NONE
2329 
PARAMETER_UNKNOWN
2330 
USR
2331 
OUTDATA_ACLR_A
2332 
NONE
2333 
PARAMETER_UNKNOWN
2334 
DEF
2335 
WRCONTROL_ACLR_A
2336 
NONE
2337 
PARAMETER_UNKNOWN
2338 
USR
2339 
INDATA_ACLR_A
2340 
NONE
2341 
PARAMETER_UNKNOWN
2342 
USR
2343 
BYTEENA_ACLR_A
2344 
NONE
2345 
PARAMETER_UNKNOWN
2346 
DEF
2347 
WIDTH_B
2348 
72
2349 
PARAMETER_UNKNOWN
2350 
USR
2351 
WIDTHAD_B
2352 
3
2353 
PARAMETER_UNKNOWN
2354 
USR
2355 
NUMWORDS_B
2356 
8
2357 
PARAMETER_UNKNOWN
2358 
USR
2359 
INDATA_REG_B
2360 
CLOCK1
2361 
PARAMETER_UNKNOWN
2362 
DEF
2363 
WRCONTROL_WRADDRESS_REG_B
2364 
CLOCK1
2365 
PARAMETER_UNKNOWN
2366 
DEF
2367 
RDCONTROL_REG_B
2368 
CLOCK1
2369 
PARAMETER_UNKNOWN
2370 
DEF
2371 
ADDRESS_REG_B
2372 
CLOCK0
2373 
PARAMETER_UNKNOWN
2374 
USR
2375 
OUTDATA_REG_B
2376 
UNREGISTERED
2377 
PARAMETER_UNKNOWN
2378 
USR
2379 
BYTEENA_REG_B
2380 
CLOCK1
2381 
PARAMETER_UNKNOWN
2382 
DEF
2383 
INDATA_ACLR_B
2384 
NONE
2385 
PARAMETER_UNKNOWN
2386 
DEF
2387 
WRCONTROL_ACLR_B
2388 
NONE
2389 
PARAMETER_UNKNOWN
2390 
DEF
2391 
ADDRESS_ACLR_B
2392 
NONE
2393 
PARAMETER_UNKNOWN
2394 
USR
2395 
OUTDATA_ACLR_B
2396 
NONE
2397 
PARAMETER_UNKNOWN
2398 
USR
2399 
RDCONTROL_ACLR_B
2400 
NONE
2401 
PARAMETER_UNKNOWN
2402 
DEF
2403 
BYTEENA_ACLR_B
2404 
NONE
2405 
PARAMETER_UNKNOWN
2406 
DEF
2407 
WIDTH_BYTEENA_A
2408 
1
2409 
PARAMETER_UNKNOWN
2410 
DEF
2411 
WIDTH_BYTEENA_B
2412 
1
2413 
PARAMETER_UNKNOWN
2414 
DEF
2415 
RAM_BLOCK_TYPE
2416 
AUTO
2417 
PARAMETER_UNKNOWN
2418 
USR
2419 
BYTE_SIZE
2420 
8
2421 
PARAMETER_UNKNOWN
2422 
DEF
2423 
READ_DURING_WRITE_MODE_MIXED_PORTS
2424 
OLD_DATA
2425 
PARAMETER_UNKNOWN
2426 
USR
2427 
READ_DURING_WRITE_MODE_PORT_A
2428 
NEW_DATA_NO_NBE_READ
2429 
PARAMETER_UNKNOWN
2430 
DEF
2431 
READ_DURING_WRITE_MODE_PORT_B
2432 
NEW_DATA_NO_NBE_READ
2433 
PARAMETER_UNKNOWN
2434 
DEF
2435 
INIT_FILE
2436 
UNUSED
2437 
PARAMETER_UNKNOWN
2438 
DEF
2439 
INIT_FILE_LAYOUT
2440 
PORT_A
2441 
PARAMETER_UNKNOWN
2442 
DEF
2443 
MAXIMUM_DEPTH
2444 
 
2445 
PARAMETER_UNKNOWN
2446 
DEF
2447 
CLOCK_ENABLE_INPUT_A
2448 
NORMAL
2449 
PARAMETER_UNKNOWN
2450 
DEF
2451 
CLOCK_ENABLE_INPUT_B
2452 
NORMAL
2453 
PARAMETER_UNKNOWN
2454 
DEF
2455 
CLOCK_ENABLE_OUTPUT_A
2456 
NORMAL
2457 
PARAMETER_UNKNOWN
2458 
DEF
2459 
CLOCK_ENABLE_OUTPUT_B
2460 
NORMAL
2461 
PARAMETER_UNKNOWN
2462 
DEF
2463 
CLOCK_ENABLE_CORE_A
2464 
USE_INPUT_CLKEN
2465 
PARAMETER_UNKNOWN
2466 
DEF
2467 
CLOCK_ENABLE_CORE_B
2468 
USE_INPUT_CLKEN
2469 
PARAMETER_UNKNOWN
2470 
DEF
2471 
ENABLE_ECC
2472 
FALSE
2473 
PARAMETER_UNKNOWN
2474 
DEF
2475 
DEVICE_FAMILY
2476 
Stratix II
2477 
PARAMETER_UNKNOWN
2478 
USR
2479 
CBXI_PARAMETER
2480 
altsyncram_dni1
2481 
PARAMETER_UNKNOWN
2482 
USR
2483 
}
2484 
# used_port {
2485 
wren_a
2486 
-1
2487 
3
2488 
q_b9
2489 
-1
2490 
3
2491 
q_b8
2492 
-1
2493 
3
2494 
q_b71
2495 
-1
2496 
3
2497 
q_b70
2498 
-1
2499 
3
2500 
q_b7
2501 
-1
2502 
3
2503 
q_b69
2504 
-1
2505 
3
2506 
q_b68
2507 
-1
2508 
3
2509 
q_b67
2510 
-1
2511 
3
2512 
q_b66
2513 
-1
2514 
3
2515 
q_b65
2516 
-1
2517 
3
2518 
q_b64
2519 
-1
2520 
3
2521 
q_b63
2522 
-1
2523 
3
2524 
q_b62
2525 
-1
2526 
3
2527 
q_b61
2528 
-1
2529 
3
2530 
q_b60
2531 
-1
2532 
3
2533 
q_b6
2534 
-1
2535 
3
2536 
q_b59
2537 
-1
2538 
3
2539 
q_b58
2540 
-1
2541 
3
2542 
q_b57
2543 
-1
2544 
3
2545 
q_b56
2546 
-1
2547 
3
2548 
q_b55
2549 
-1
2550 
3
2551 
q_b54
2552 
-1
2553 
3
2554 
q_b53
2555 
-1
2556 
3
2557 
q_b52
2558 
-1
2559 
3
2560 
q_b51
2561 
-1
2562 
3
2563 
q_b50
2564 
-1
2565 
3
2566 
q_b5
2567 
-1
2568 
3
2569 
q_b49
2570 
-1
2571 
3
2572 
q_b48
2573 
-1
2574 
3
2575 
q_b47
2576 
-1
2577 
3
2578 
q_b46
2579 
-1
2580 
3
2581 
q_b45
2582 
-1
2583 
3
2584 
q_b44
2585 
-1
2586 
3
2587 
q_b43
2588 
-1
2589 
3
2590 
q_b42
2591 
-1
2592 
3
2593 
q_b41
2594 
-1
2595 
3
2596 
q_b40
2597 
-1
2598 
3
2599 
q_b4
2600 
-1
2601 
3
2602 
q_b39
2603 
-1
2604 
3
2605 
q_b38
2606 
-1
2607 
3
2608 
q_b37
2609 
-1
2610 
3
2611 
q_b36
2612 
-1
2613 
3
2614 
q_b35
2615 
-1
2616 
3
2617 
q_b34
2618 
-1
2619 
3
2620 
q_b33
2621 
-1
2622 
3
2623 
q_b32
2624 
-1
2625 
3
2626 
q_b31
2627 
-1
2628 
3
2629 
q_b30
2630 
-1
2631 
3
2632 
q_b3
2633 
-1
2634 
3
2635 
q_b29
2636 
-1
2637 
3
2638 
q_b28
2639 
-1
2640 
3
2641 
q_b27
2642 
-1
2643 
3
2644 
q_b26
2645 
-1
2646 
3
2647 
q_b25
2648 
-1
2649 
3
2650 
q_b24
2651 
-1
2652 
3
2653 
q_b23
2654 
-1
2655 
3
2656 
q_b22
2657 
-1
2658 
3
2659 
q_b21
2660 
-1
2661 
3
2662 
q_b20
2663 
-1
2664 
3
2665 
q_b2
2666 
-1
2667 
3
2668 
q_b19
2669 
-1
2670 
3
2671 
q_b18
2672 
-1
2673 
3
2674 
q_b17
2675 
-1
2676 
3
2677 
q_b16
2678 
-1
2679 
3
2680 
q_b15
2681 
-1
2682 
3
2683 
q_b14
2684 
-1
2685 
3
2686 
q_b13
2687 
-1
2688 
3
2689 
q_b12
2690 
-1
2691 
3
2692 
q_b11
2693 
-1
2694 
3
2695 
q_b10
2696 
-1
2697 
3
2698 
q_b1
2699 
-1
2700 
3
2701 
q_b0
2702 
-1
2703 
3
2704 
data_a9
2705 
-1
2706 
3
2707 
data_a8
2708 
-1
2709 
3
2710 
data_a71
2711 
-1
2712 
3
2713 
data_a70
2714 
-1
2715 
3
2716 
data_a7
2717 
-1
2718 
3
2719 
data_a69
2720 
-1
2721 
3
2722 
data_a68
2723 
-1
2724 
3
2725 
data_a67
2726 
-1
2727 
3
2728 
data_a66
2729 
-1
2730 
3
2731 
data_a65
2732 
-1
2733 
3
2734 
data_a64
2735 
-1
2736 
3
2737 
data_a63
2738 
-1
2739 
3
2740 
data_a62
2741 
-1
2742 
3
2743 
data_a61
2744 
-1
2745 
3
2746 
data_a60
2747 
-1
2748 
3
2749 
data_a6
2750 
-1
2751 
3
2752 
data_a59
2753 
-1
2754 
3
2755 
data_a58
2756 
-1
2757 
3
2758 
data_a57
2759 
-1
2760 
3
2761 
data_a56
2762 
-1
2763 
3
2764 
data_a55
2765 
-1
2766 
3
2767 
data_a54
2768 
-1
2769 
3
2770 
data_a53
2771 
-1
2772 
3
2773 
data_a52
2774 
-1
2775 
3
2776 
data_a51
2777 
-1
2778 
3
2779 
data_a50
2780 
-1
2781 
3
2782 
data_a5
2783 
-1
2784 
3
2785 
data_a49
2786 
-1
2787 
3
2788 
data_a48
2789 
-1
2790 
3
2791 
data_a47
2792 
-1
2793 
3
2794 
data_a46
2795 
-1
2796 
3
2797 
data_a45
2798 
-1
2799 
3
2800 
data_a44
2801 
-1
2802 
3
2803 
data_a43
2804 
-1
2805 
3
2806 
data_a42
2807 
-1
2808 
3
2809 
data_a41
2810 
-1
2811 
3
2812 
data_a40
2813 
-1
2814 
3
2815 
data_a4
2816 
-1
2817 
3
2818 
data_a39
2819 
-1
2820 
3
2821 
data_a38
2822 
-1
2823 
3
2824 
data_a37
2825 
-1
2826 
3
2827 
data_a36
2828 
-1
2829 
3
2830 
data_a35
2831 
-1
2832 
3
2833 
data_a34
2834 
-1
2835 
3
2836 
data_a33
2837 
-1
2838 
3
2839 
data_a32
2840 
-1
2841 
3
2842 
data_a31
2843 
-1
2844 
3
2845 
data_a30
2846 
-1
2847 
3
2848 
data_a3
2849 
-1
2850 
3
2851 
data_a29
2852 
-1
2853 
3
2854 
data_a28
2855 
-1
2856 
3
2857 
data_a27
2858 
-1
2859 
3
2860 
data_a26
2861 
-1
2862 
3
2863 
data_a25
2864 
-1
2865 
3
2866 
data_a24
2867 
-1
2868 
3
2869 
data_a23
2870 
-1
2871 
3
2872 
data_a22
2873 
-1
2874 
3
2875 
data_a21
2876 
-1
2877 
3
2878 
data_a20
2879 
-1
2880 
3
2881 
data_a2
2882 
-1
2883 
3
2884 
data_a19
2885 
-1
2886 
3
2887 
data_a18
2888 
-1
2889 
3
2890 
data_a17
2891 
-1
2892 
3
2893 
data_a16
2894 
-1
2895 
3
2896 
data_a15
2897 
-1
2898 
3
2899 
data_a14
2900 
-1
2901 
3
2902 
data_a13
2903 
-1
2904 
3
2905 
data_a12
2906 
-1
2907 
3
2908 
data_a11
2909 
-1
2910 
3
2911 
data_a10
2912 
-1
2913 
3
2914 
data_a1
2915 
-1
2916 
3
2917 
data_a0
2918 
-1
2919 
3
2920 
clock0
2921 
-1
2922 
3
2923 
address_b2
2924 
-1
2925 
3
2926 
address_b1
2927 
-1
2928 
3
2929 
address_b0
2930 
-1
2931 
3
2932 
address_a2
2933 
-1
2934 
3
2935 
address_a1
2936 
-1
2937 
3
2938 
address_a0
2939 
-1
2940 
3
2941 
}
2942 
# include_file {
2943 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
2944 
c22bfd353214c01495b560fc34e47d79
2945 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
2946 
2263a3bdfffeb150af977ee13902f70
2947 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
2948 
bd0e2f5e01c1bd360461dceb53d48
2949 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
2950 
f39123b8592ab2dac019716e56b3ec18
2951 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
2952 
60d229340bc3c24acb0a137b4849830
2953 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
2954 
d4e3a69a331d3a99d3281790d99a1ebd
2955 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
2956 
e66a83eccf6717bed97c99d891ad085
2957 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
2958 
99d442b5b66c88db4daf94d99c6e4e77
2959 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
2960 
74e08939f96a7ea8e7a4d59a5b01fe7
2961 
}
2962 
# lmf
2963 
d:|altera|72|quartus|lmf|
2964 
d41d8cd98f0b24e980998ecf8427e
2965 
# macro_sequence
2966 
 
2967 
# end
2968 
# entity
2969 
altsyncram_dni1
2970 
# storage
2971 
db|LB.(25).cnf
2972 
db|LB.(25).cnf
2973 
# case_insensitive
2974 
# source_file
2975 
db|altsyncram_dni1.tdf
2976 
37e761c3cc7b8cf9ed6432dffe3e2f8c
2977 
6
2978 
# used_port {
2979 
wren_a
2980 
-1
2981 
3
2982 
q_b9
2983 
-1
2984 
3
2985 
q_b8
2986 
-1
2987 
3
2988 
q_b71
2989 
-1
2990 
3
2991 
q_b70
2992 
-1
2993 
3
2994 
q_b7
2995 
-1
2996 
3
2997 
q_b69
2998 
-1
2999 
3
3000 
q_b68
3001 
-1
3002 
3
3003 
q_b67
3004 
-1
3005 
3
3006 
q_b66
3007 
-1
3008 
3
3009 
q_b65
3010 
-1
3011 
3
3012 
q_b64
3013 
-1
3014 
3
3015 
q_b63
3016 
-1
3017 
3
3018 
q_b62
3019 
-1
3020 
3
3021 
q_b61
3022 
-1
3023 
3
3024 
q_b60
3025 
-1
3026 
3
3027 
q_b6
3028 
-1
3029 
3
3030 
q_b59
3031 
-1
3032 
3
3033 
q_b58
3034 
-1
3035 
3
3036 
q_b57
3037 
-1
3038 
3
3039 
q_b56
3040 
-1
3041 
3
3042 
q_b55
3043 
-1
3044 
3
3045 
q_b54
3046 
-1
3047 
3
3048 
q_b53
3049 
-1
3050 
3
3051 
q_b52
3052 
-1
3053 
3
3054 
q_b51
3055 
-1
3056 
3
3057 
q_b50
3058 
-1
3059 
3
3060 
q_b5
3061 
-1
3062 
3
3063 
q_b49
3064 
-1
3065 
3
3066 
q_b48
3067 
-1
3068 
3
3069 
q_b47
3070 
-1
3071 
3
3072 
q_b46
3073 
-1
3074 
3
3075 
q_b45
3076 
-1
3077 
3
3078 
q_b44
3079 
-1
3080 
3
3081 
q_b43
3082 
-1
3083 
3
3084 
q_b42
3085 
-1
3086 
3
3087 
q_b41
3088 
-1
3089 
3
3090 
q_b40
3091 
-1
3092 
3
3093 
q_b4
3094 
-1
3095 
3
3096 
q_b39
3097 
-1
3098 
3
3099 
q_b38
3100 
-1
3101 
3
3102 
q_b37
3103 
-1
3104 
3
3105 
q_b36
3106 
-1
3107 
3
3108 
q_b35
3109 
-1
3110 
3
3111 
q_b34
3112 
-1
3113 
3
3114 
q_b33
3115 
-1
3116 
3
3117 
q_b32
3118 
-1
3119 
3
3120 
q_b31
3121 
-1
3122 
3
3123 
q_b30
3124 
-1
3125 
3
3126 
q_b3
3127 
-1
3128 
3
3129 
q_b29
3130 
-1
3131 
3
3132 
q_b28
3133 
-1
3134 
3
3135 
q_b27
3136 
-1
3137 
3
3138 
q_b26
3139 
-1
3140 
3
3141 
q_b25
3142 
-1
3143 
3
3144 
q_b24
3145 
-1
3146 
3
3147 
q_b23
3148 
-1
3149 
3
3150 
q_b22
3151 
-1
3152 
3
3153 
q_b21
3154 
-1
3155 
3
3156 
q_b20
3157 
-1
3158 
3
3159 
q_b2
3160 
-1
3161 
3
3162 
q_b19
3163 
-1
3164 
3
3165 
q_b18
3166 
-1
3167 
3
3168 
q_b17
3169 
-1
3170 
3
3171 
q_b16
3172 
-1
3173 
3
3174 
q_b15
3175 
-1
3176 
3
3177 
q_b14
3178 
-1
3179 
3
3180 
q_b13
3181 
-1
3182 
3
3183 
q_b12
3184 
-1
3185 
3
3186 
q_b11
3187 
-1
3188 
3
3189 
q_b10
3190 
-1
3191 
3
3192 
q_b1
3193 
-1
3194 
3
3195 
q_b0
3196 
-1
3197 
3
3198 
data_a9
3199 
-1
3200 
3
3201 
data_a8
3202 
-1
3203 
3
3204 
data_a71
3205 
-1
3206 
3
3207 
data_a70
3208 
-1
3209 
3
3210 
data_a7
3211 
-1
3212 
3
3213 
data_a69
3214 
-1
3215 
3
3216 
data_a68
3217 
-1
3218 
3
3219 
data_a67
3220 
-1
3221 
3
3222 
data_a66
3223 
-1
3224 
3
3225 
data_a65
3226 
-1
3227 
3
3228 
data_a64
3229 
-1
3230 
3
3231 
data_a63
3232 
-1
3233 
3
3234 
data_a62
3235 
-1
3236 
3
3237 
data_a61
3238 
-1
3239 
3
3240 
data_a60
3241 
-1
3242 
3
3243 
data_a6
3244 
-1
3245 
3
3246 
data_a59
3247 
-1
3248 
3
3249 
data_a58
3250 
-1
3251 
3
3252 
data_a57
3253 
-1
3254 
3
3255 
data_a56
3256 
-1
3257 
3
3258 
data_a55
3259 
-1
3260 
3
3261 
data_a54
3262 
-1
3263 
3
3264 
data_a53
3265 
-1
3266 
3
3267 
data_a52
3268 
-1
3269 
3
3270 
data_a51
3271 
-1
3272 
3
3273 
data_a50
3274 
-1
3275 
3
3276 
data_a5
3277 
-1
3278 
3
3279 
data_a49
3280 
-1
3281 
3
3282 
data_a48
3283 
-1
3284 
3
3285 
data_a47
3286 
-1
3287 
3
3288 
data_a46
3289 
-1
3290 
3
3291 
data_a45
3292 
-1
3293 
3
3294 
data_a44
3295 
-1
3296 
3
3297 
data_a43
3298 
-1
3299 
3
3300 
data_a42
3301 
-1
3302 
3
3303 
data_a41
3304 
-1
3305 
3
3306 
data_a40
3307 
-1
3308 
3
3309 
data_a4
3310 
-1
3311 
3
3312 
data_a39
3313 
-1
3314 
3
3315 
data_a38
3316 
-1
3317 
3
3318 
data_a37
3319 
-1
3320 
3
3321 
data_a36
3322 
-1
3323 
3
3324 
data_a35
3325 
-1
3326 
3
3327 
data_a34
3328 
-1
3329 
3
3330 
data_a33
3331 
-1
3332 
3
3333 
data_a32
3334 
-1
3335 
3
3336 
data_a31
3337 
-1
3338 
3
3339 
data_a30
3340 
-1
3341 
3
3342 
data_a3
3343 
-1
3344 
3
3345 
data_a29
3346 
-1
3347 
3
3348 
data_a28
3349 
-1
3350 
3
3351 
data_a27
3352 
-1
3353 
3
3354 
data_a26
3355 
-1
3356 
3
3357 
data_a25
3358 
-1
3359 
3
3360 
data_a24
3361 
-1
3362 
3
3363 
data_a23
3364 
-1
3365 
3
3366 
data_a22
3367 
-1
3368 
3
3369 
data_a21
3370 
-1
3371 
3
3372 
data_a20
3373 
-1
3374 
3
3375 
data_a2
3376 
-1
3377 
3
3378 
data_a19
3379 
-1
3380 
3
3381 
data_a18
3382 
-1
3383 
3
3384 
data_a17
3385 
-1
3386 
3
3387 
data_a16
3388 
-1
3389 
3
3390 
data_a15
3391 
-1
3392 
3
3393 
data_a14
3394 
-1
3395 
3
3396 
data_a13
3397 
-1
3398 
3
3399 
data_a12
3400 
-1
3401 
3
3402 
data_a11
3403 
-1
3404 
3
3405 
data_a10
3406 
-1
3407 
3
3408 
data_a1
3409 
-1
3410 
3
3411 
data_a0
3412 
-1
3413 
3
3414 
clock0
3415 
-1
3416 
3
3417 
address_b2
3418 
-1
3419 
3
3420 
address_b1
3421 
-1
3422 
3
3423 
address_b0
3424 
-1
3425 
3
3426 
address_a2
3427 
-1
3428 
3
3429 
address_a1
3430 
-1
3431 
3
3432 
address_a0
3433 
-1
3434 
3
3435 
}
3436 
# lmf
3437 
d:|altera|72|quartus|lmf|
3438 
d41d8cd98f0b24e980998ecf8427e
3439 
# macro_sequence
3440 
 
3441 
# end
3442 
# entity
3443 
altsyncram
3444 
# storage
3445 
db|LB.(26).cnf
3446 
db|LB.(26).cnf
3447 
# case_insensitive
3448 
# source_file
3449 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
3450 
1a8e44bce3df5c9cae2128978e887541
3451 
6
3452 
# user_parameter {
3453 
BYTE_SIZE_BLOCK
3454 
8
3455 
PARAMETER_UNKNOWN
3456 
DEF
3457 
AUTO_CARRY_CHAINS
3458 
ON
3459 
AUTO_CARRY
3460 
USR
3461 
IGNORE_CARRY_BUFFERS
3462 
OFF
3463 
IGNORE_CARRY
3464 
USR
3465 
AUTO_CASCADE_CHAINS
3466 
ON
3467 
AUTO_CASCADE
3468 
USR
3469 
IGNORE_CASCADE_BUFFERS
3470 
OFF
3471 
IGNORE_CASCADE
3472 
USR
3473 
WIDTH_BYTEENA
3474 
1
3475 
PARAMETER_UNKNOWN
3476 
DEF
3477 
OPERATION_MODE
3478 
DUAL_PORT
3479 
PARAMETER_UNKNOWN
3480 
USR
3481 
WIDTH_A
3482 
72
3483 
PARAMETER_UNKNOWN
3484 
USR
3485 
WIDTHAD_A
3486 
5
3487 
PARAMETER_UNKNOWN
3488 
USR
3489 
NUMWORDS_A
3490 
32
3491 
PARAMETER_UNKNOWN
3492 
USR
3493 
OUTDATA_REG_A
3494 
UNREGISTERED
3495 
PARAMETER_UNKNOWN
3496 
DEF
3497 
ADDRESS_ACLR_A
3498 
NONE
3499 
PARAMETER_UNKNOWN
3500 
USR
3501 
OUTDATA_ACLR_A
3502 
NONE
3503 
PARAMETER_UNKNOWN
3504 
DEF
3505 
WRCONTROL_ACLR_A
3506 
NONE
3507 
PARAMETER_UNKNOWN
3508 
USR
3509 
INDATA_ACLR_A
3510 
NONE
3511 
PARAMETER_UNKNOWN
3512 
USR
3513 
BYTEENA_ACLR_A
3514 
NONE
3515 
PARAMETER_UNKNOWN
3516 
DEF
3517 
WIDTH_B
3518 
72
3519 
PARAMETER_UNKNOWN
3520 
USR
3521 
WIDTHAD_B
3522 
5
3523 
PARAMETER_UNKNOWN
3524 
USR
3525 
NUMWORDS_B
3526 
32
3527 
PARAMETER_UNKNOWN
3528 
USR
3529 
INDATA_REG_B
3530 
CLOCK1
3531 
PARAMETER_UNKNOWN
3532 
DEF
3533 
WRCONTROL_WRADDRESS_REG_B
3534 
CLOCK1
3535 
PARAMETER_UNKNOWN
3536 
DEF
3537 
RDCONTROL_REG_B
3538 
CLOCK1
3539 
PARAMETER_UNKNOWN
3540 
DEF
3541 
ADDRESS_REG_B
3542 
CLOCK0
3543 
PARAMETER_UNKNOWN
3544 
USR
3545 
OUTDATA_REG_B
3546 
UNREGISTERED
3547 
PARAMETER_UNKNOWN
3548 
USR
3549 
BYTEENA_REG_B
3550 
CLOCK1
3551 
PARAMETER_UNKNOWN
3552 
DEF
3553 
INDATA_ACLR_B
3554 
NONE
3555 
PARAMETER_UNKNOWN
3556 
DEF
3557 
WRCONTROL_ACLR_B
3558 
NONE
3559 
PARAMETER_UNKNOWN
3560 
DEF
3561 
ADDRESS_ACLR_B
3562 
NONE
3563 
PARAMETER_UNKNOWN
3564 
USR
3565 
OUTDATA_ACLR_B
3566 
NONE
3567 
PARAMETER_UNKNOWN
3568 
USR
3569 
RDCONTROL_ACLR_B
3570 
NONE
3571 
PARAMETER_UNKNOWN
3572 
DEF
3573 
BYTEENA_ACLR_B
3574 
NONE
3575 
PARAMETER_UNKNOWN
3576 
DEF
3577 
WIDTH_BYTEENA_A
3578 
1
3579 
PARAMETER_UNKNOWN
3580 
DEF
3581 
WIDTH_BYTEENA_B
3582 
1
3583 
PARAMETER_UNKNOWN
3584 
DEF
3585 
RAM_BLOCK_TYPE
3586 
AUTO
3587 
PARAMETER_UNKNOWN
3588 
USR
3589 
BYTE_SIZE
3590 
8
3591 
PARAMETER_UNKNOWN
3592 
DEF
3593 
READ_DURING_WRITE_MODE_MIXED_PORTS
3594 
OLD_DATA
3595 
PARAMETER_UNKNOWN
3596 
USR
3597 
READ_DURING_WRITE_MODE_PORT_A
3598 
NEW_DATA_NO_NBE_READ
3599 
PARAMETER_UNKNOWN
3600 
DEF
3601 
READ_DURING_WRITE_MODE_PORT_B
3602 
NEW_DATA_NO_NBE_READ
3603 
PARAMETER_UNKNOWN
3604 
DEF
3605 
INIT_FILE
3606 
UNUSED
3607 
PARAMETER_UNKNOWN
3608 
DEF
3609 
INIT_FILE_LAYOUT
3610 
PORT_A
3611 
PARAMETER_UNKNOWN
3612 
DEF
3613 
MAXIMUM_DEPTH
3614 
 
3615 
PARAMETER_UNKNOWN
3616 
DEF
3617 
CLOCK_ENABLE_INPUT_A
3618 
NORMAL
3619 
PARAMETER_UNKNOWN
3620 
DEF
3621 
CLOCK_ENABLE_INPUT_B
3622 
NORMAL
3623 
PARAMETER_UNKNOWN
3624 
DEF
3625 
CLOCK_ENABLE_OUTPUT_A
3626 
NORMAL
3627 
PARAMETER_UNKNOWN
3628 
DEF
3629 
CLOCK_ENABLE_OUTPUT_B
3630 
NORMAL
3631 
PARAMETER_UNKNOWN
3632 
DEF
3633 
CLOCK_ENABLE_CORE_A
3634 
USE_INPUT_CLKEN
3635 
PARAMETER_UNKNOWN
3636 
DEF
3637 
CLOCK_ENABLE_CORE_B
3638 
USE_INPUT_CLKEN
3639 
PARAMETER_UNKNOWN
3640 
DEF
3641 
ENABLE_ECC
3642 
FALSE
3643 
PARAMETER_UNKNOWN
3644 
DEF
3645 
DEVICE_FAMILY
3646 
Stratix II
3647 
PARAMETER_UNKNOWN
3648 
USR
3649 
CBXI_PARAMETER
3650 
altsyncram_bqi1
3651 
PARAMETER_UNKNOWN
3652 
USR
3653 
}
3654 
# used_port {
3655 
wren_a
3656 
-1
3657 
3
3658 
q_b9
3659 
-1
3660 
3
3661 
q_b8
3662 
-1
3663 
3
3664 
q_b71
3665 
-1
3666 
3
3667 
q_b70
3668 
-1
3669 
3
3670 
q_b7
3671 
-1
3672 
3
3673 
q_b69
3674 
-1
3675 
3
3676 
q_b68
3677 
-1
3678 
3
3679 
q_b67
3680 
-1
3681 
3
3682 
q_b66
3683 
-1
3684 
3
3685 
q_b65
3686 
-1
3687 
3
3688 
q_b64
3689 
-1
3690 
3
3691 
q_b63
3692 
-1
3693 
3
3694 
q_b62
3695 
-1
3696 
3
3697 
q_b61
3698 
-1
3699 
3
3700 
q_b60
3701 
-1
3702 
3
3703 
q_b6
3704 
-1
3705 
3
3706 
q_b59
3707 
-1
3708 
3
3709 
q_b58
3710 
-1
3711 
3
3712 
q_b57
3713 
-1
3714 
3
3715 
q_b56
3716 
-1
3717 
3
3718 
q_b55
3719 
-1
3720 
3
3721 
q_b54
3722 
-1
3723 
3
3724 
q_b53
3725 
-1
3726 
3
3727 
q_b52
3728 
-1
3729 
3
3730 
q_b51
3731 
-1
3732 
3
3733 
q_b50
3734 
-1
3735 
3
3736 
q_b5
3737 
-1
3738 
3
3739 
q_b49
3740 
-1
3741 
3
3742 
q_b48
3743 
-1
3744 
3
3745 
q_b47
3746 
-1
3747 
3
3748 
q_b46
3749 
-1
3750 
3
3751 
q_b45
3752 
-1
3753 
3
3754 
q_b44
3755 
-1
3756 
3
3757 
q_b43
3758 
-1
3759 
3
3760 
q_b42
3761 
-1
3762 
3
3763 
q_b41
3764 
-1
3765 
3
3766 
q_b40
3767 
-1
3768 
3
3769 
q_b4
3770 
-1
3771 
3
3772 
q_b39
3773 
-1
3774 
3
3775 
q_b38
3776 
-1
3777 
3
3778 
q_b37
3779 
-1
3780 
3
3781 
q_b36
3782 
-1
3783 
3
3784 
q_b35
3785 
-1
3786 
3
3787 
q_b34
3788 
-1
3789 
3
3790 
q_b33
3791 
-1
3792 
3
3793 
q_b32
3794 
-1
3795 
3
3796 
q_b31
3797 
-1
3798 
3
3799 
q_b30
3800 
-1
3801 
3
3802 
q_b3
3803 
-1
3804 
3
3805 
q_b29
3806 
-1
3807 
3
3808 
q_b28
3809 
-1
3810 
3
3811 
q_b27
3812 
-1
3813 
3
3814 
q_b26
3815 
-1
3816 
3
3817 
q_b25
3818 
-1
3819 
3
3820 
q_b24
3821 
-1
3822 
3
3823 
q_b23
3824 
-1
3825 
3
3826 
q_b22
3827 
-1
3828 
3
3829 
q_b21
3830 
-1
3831 
3
3832 
q_b20
3833 
-1
3834 
3
3835 
q_b2
3836 
-1
3837 
3
3838 
q_b19
3839 
-1
3840 
3
3841 
q_b18
3842 
-1
3843 
3
3844 
q_b17
3845 
-1
3846 
3
3847 
q_b16
3848 
-1
3849 
3
3850 
q_b15
3851 
-1
3852 
3
3853 
q_b14
3854 
-1
3855 
3
3856 
q_b13
3857 
-1
3858 
3
3859 
q_b12
3860 
-1
3861 
3
3862 
q_b11
3863 
-1
3864 
3
3865 
q_b10
3866 
-1
3867 
3
3868 
q_b1
3869 
-1
3870 
3
3871 
q_b0
3872 
-1
3873 
3
3874 
data_a9
3875 
-1
3876 
3
3877 
data_a8
3878 
-1
3879 
3
3880 
data_a71
3881 
-1
3882 
3
3883 
data_a70
3884 
-1
3885 
3
3886 
data_a7
3887 
-1
3888 
3
3889 
data_a69
3890 
-1
3891 
3
3892 
data_a68
3893 
-1
3894 
3
3895 
data_a67
3896 
-1
3897 
3
3898 
data_a66
3899 
-1
3900 
3
3901 
data_a65
3902 
-1
3903 
3
3904 
data_a64
3905 
-1
3906 
3
3907 
data_a63
3908 
-1
3909 
3
3910 
data_a62
3911 
-1
3912 
3
3913 
data_a61
3914 
-1
3915 
3
3916 
data_a60
3917 
-1
3918 
3
3919 
data_a6
3920 
-1
3921 
3
3922 
data_a59
3923 
-1
3924 
3
3925 
data_a58
3926 
-1
3927 
3
3928 
data_a57
3929 
-1
3930 
3
3931 
data_a56
3932 
-1
3933 
3
3934 
data_a55
3935 
-1
3936 
3
3937 
data_a54
3938 
-1
3939 
3
3940 
data_a53
3941 
-1
3942 
3
3943 
data_a52
3944 
-1
3945 
3
3946 
data_a51
3947 
-1
3948 
3
3949 
data_a50
3950 
-1
3951 
3
3952 
data_a5
3953 
-1
3954 
3
3955 
data_a49
3956 
-1
3957 
3
3958 
data_a48
3959 
-1
3960 
3
3961 
data_a47
3962 
-1
3963 
3
3964 
data_a46
3965 
-1
3966 
3
3967 
data_a45
3968 
-1
3969 
3
3970 
data_a44
3971 
-1
3972 
3
3973 
data_a43
3974 
-1
3975 
3
3976 
data_a42
3977 
-1
3978 
3
3979 
data_a41
3980 
-1
3981 
3
3982 
data_a40
3983 
-1
3984 
3
3985 
data_a4
3986 
-1
3987 
3
3988 
data_a39
3989 
-1
3990 
3
3991 
data_a38
3992 
-1
3993 
3
3994 
data_a37
3995 
-1
3996 
3
3997 
data_a36
3998 
-1
3999 
3
4000 
data_a35
4001 
-1
4002 
3
4003 
data_a34
4004 
-1
4005 
3
4006 
data_a33
4007 
-1
4008 
3
4009 
data_a32
4010 
-1
4011 
3
4012 
data_a31
4013 
-1
4014 
3
4015 
data_a30
4016 
-1
4017 
3
4018 
data_a3
4019 
-1
4020 
3
4021 
data_a29
4022 
-1
4023 
3
4024 
data_a28
4025 
-1
4026 
3
4027 
data_a27
4028 
-1
4029 
3
4030 
data_a26
4031 
-1
4032 
3
4033 
data_a25
4034 
-1
4035 
3
4036 
data_a24
4037 
-1
4038 
3
4039 
data_a23
4040 
-1
4041 
3
4042 
data_a22
4043 
-1
4044 
3
4045 
data_a21
4046 
-1
4047 
3
4048 
data_a20
4049 
-1
4050 
3
4051 
data_a2
4052 
-1
4053 
3
4054 
data_a19
4055 
-1
4056 
3
4057 
data_a18
4058 
-1
4059 
3
4060 
data_a17
4061 
-1
4062 
3
4063 
data_a16
4064 
-1
4065 
3
4066 
data_a15
4067 
-1
4068 
3
4069 
data_a14
4070 
-1
4071 
3
4072 
data_a13
4073 
-1
4074 
3
4075 
data_a12
4076 
-1
4077 
3
4078 
data_a11
4079 
-1
4080 
3
4081 
data_a10
4082 
-1
4083 
3
4084 
data_a1
4085 
-1
4086 
3
4087 
data_a0
4088 
-1
4089 
3
4090 
clock0
4091 
-1
4092 
3
4093 
address_b4
4094 
-1
4095 
3
4096 
address_b3
4097 
-1
4098 
3
4099 
address_b2
4100 
-1
4101 
3
4102 
address_b1
4103 
-1
4104 
3
4105 
address_b0
4106 
-1
4107 
3
4108 
address_a4
4109 
-1
4110 
3
4111 
address_a3
4112 
-1
4113 
3
4114 
address_a2
4115 
-1
4116 
3
4117 
address_a1
4118 
-1
4119 
3
4120 
address_a0
4121 
-1
4122 
3
4123 
}
4124 
# include_file {
4125 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
4126 
c22bfd353214c01495b560fc34e47d79
4127 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
4128 
2263a3bdfffeb150af977ee13902f70
4129 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
4130 
bd0e2f5e01c1bd360461dceb53d48
4131 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
4132 
f39123b8592ab2dac019716e56b3ec18
4133 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
4134 
60d229340bc3c24acb0a137b4849830
4135 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
4136 
d4e3a69a331d3a99d3281790d99a1ebd
4137 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
4138 
e66a83eccf6717bed97c99d891ad085
4139 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
4140 
99d442b5b66c88db4daf94d99c6e4e77
4141 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
4142 
74e08939f96a7ea8e7a4d59a5b01fe7
4143 
}
4144 
# lmf
4145 
d:|altera|72|quartus|lmf|
4146 
d41d8cd98f0b24e980998ecf8427e
4147 
# macro_sequence
4148 
 
4149 
# end
4150 
# entity
4151 
altsyncram_bqi1
4152 
# storage
4153 
db|LB.(27).cnf
4154 
db|LB.(27).cnf
4155 
# case_insensitive
4156 
# source_file
4157 
db|altsyncram_bqi1.tdf
4158 
d3ef486a3ef024e4c0f6d67f53bf229
4159 
6
4160 
# used_port {
4161 
wren_a
4162 
-1
4163 
3
4164 
q_b9
4165 
-1
4166 
3
4167 
q_b8
4168 
-1
4169 
3
4170 
q_b71
4171 
-1
4172 
3
4173 
q_b70
4174 
-1
4175 
3
4176 
q_b7
4177 
-1
4178 
3
4179 
q_b69
4180 
-1
4181 
3
4182 
q_b68
4183 
-1
4184 
3
4185 
q_b67
4186 
-1
4187 
3
4188 
q_b66
4189 
-1
4190 
3
4191 
q_b65
4192 
-1
4193 
3
4194 
q_b64
4195 
-1
4196 
3
4197 
q_b63
4198 
-1
4199 
3
4200 
q_b62
4201 
-1
4202 
3
4203 
q_b61
4204 
-1
4205 
3
4206 
q_b60
4207 
-1
4208 
3
4209 
q_b6
4210 
-1
4211 
3
4212 
q_b59
4213 
-1
4214 
3
4215 
q_b58
4216 
-1
4217 
3
4218 
q_b57
4219 
-1
4220 
3
4221 
q_b56
4222 
-1
4223 
3
4224 
q_b55
4225 
-1
4226 
3
4227 
q_b54
4228 
-1
4229 
3
4230 
q_b53
4231 
-1
4232 
3
4233 
q_b52
4234 
-1
4235 
3
4236 
q_b51
4237 
-1
4238 
3
4239 
q_b50
4240 
-1
4241 
3
4242 
q_b5
4243 
-1
4244 
3
4245 
q_b49
4246 
-1
4247 
3
4248 
q_b48
4249 
-1
4250 
3
4251 
q_b47
4252 
-1
4253 
3
4254 
q_b46
4255 
-1
4256 
3
4257 
q_b45
4258 
-1
4259 
3
4260 
q_b44
4261 
-1
4262 
3
4263 
q_b43
4264 
-1
4265 
3
4266 
q_b42
4267 
-1
4268 
3
4269 
q_b41
4270 
-1
4271 
3
4272 
q_b40
4273 
-1
4274 
3
4275 
q_b4
4276 
-1
4277 
3
4278 
q_b39
4279 
-1
4280 
3
4281 
q_b38
4282 
-1
4283 
3
4284 
q_b37
4285 
-1
4286 
3
4287 
q_b36
4288 
-1
4289 
3
4290 
q_b35
4291 
-1
4292 
3
4293 
q_b34
4294 
-1
4295 
3
4296 
q_b33
4297 
-1
4298 
3
4299 
q_b32
4300 
-1
4301 
3
4302 
q_b31
4303 
-1
4304 
3
4305 
q_b30
4306 
-1
4307 
3
4308 
q_b3
4309 
-1
4310 
3
4311 
q_b29
4312 
-1
4313 
3
4314 
q_b28
4315 
-1
4316 
3
4317 
q_b27
4318 
-1
4319 
3
4320 
q_b26
4321 
-1
4322 
3
4323 
q_b25
4324 
-1
4325 
3
4326 
q_b24
4327 
-1
4328 
3
4329 
q_b23
4330 
-1
4331 
3
4332 
q_b22
4333 
-1
4334 
3
4335 
q_b21
4336 
-1
4337 
3
4338 
q_b20
4339 
-1
4340 
3
4341 
q_b2
4342 
-1
4343 
3
4344 
q_b19
4345 
-1
4346 
3
4347 
q_b18
4348 
-1
4349 
3
4350 
q_b17
4351 
-1
4352 
3
4353 
q_b16
4354 
-1
4355 
3
4356 
q_b15
4357 
-1
4358 
3
4359 
q_b14
4360 
-1
4361 
3
4362 
q_b13
4363 
-1
4364 
3
4365 
q_b12
4366 
-1
4367 
3
4368 
q_b11
4369 
-1
4370 
3
4371 
q_b10
4372 
-1
4373 
3
4374 
q_b1
4375 
-1
4376 
3
4377 
q_b0
4378 
-1
4379 
3
4380 
data_a9
4381 
-1
4382 
3
4383 
data_a8
4384 
-1
4385 
3
4386 
data_a71
4387 
-1
4388 
3
4389 
data_a70
4390 
-1
4391 
3
4392 
data_a7
4393 
-1
4394 
3
4395 
data_a69
4396 
-1
4397 
3
4398 
data_a68
4399 
-1
4400 
3
4401 
data_a67
4402 
-1
4403 
3
4404 
data_a66
4405 
-1
4406 
3
4407 
data_a65
4408 
-1
4409 
3
4410 
data_a64
4411 
-1
4412 
3
4413 
data_a63
4414 
-1
4415 
3
4416 
data_a62
4417 
-1
4418 
3
4419 
data_a61
4420 
-1
4421 
3
4422 
data_a60
4423 
-1
4424 
3
4425 
data_a6
4426 
-1
4427 
3
4428 
data_a59
4429 
-1
4430 
3
4431 
data_a58
4432 
-1
4433 
3
4434 
data_a57
4435 
-1
4436 
3
4437 
data_a56
4438 
-1
4439 
3
4440 
data_a55
4441 
-1
4442 
3
4443 
data_a54
4444 
-1
4445 
3
4446 
data_a53
4447 
-1
4448 
3
4449 
data_a52
4450 
-1
4451 
3
4452 
data_a51
4453 
-1
4454 
3
4455 
data_a50
4456 
-1
4457 
3
4458 
data_a5
4459 
-1
4460 
3
4461 
data_a49
4462 
-1
4463 
3
4464 
data_a48
4465 
-1
4466 
3
4467 
data_a47
4468 
-1
4469 
3
4470 
data_a46
4471 
-1
4472 
3
4473 
data_a45
4474 
-1
4475 
3
4476 
data_a44
4477 
-1
4478 
3
4479 
data_a43
4480 
-1
4481 
3
4482 
data_a42
4483 
-1
4484 
3
4485 
data_a41
4486 
-1
4487 
3
4488 
data_a40
4489 
-1
4490 
3
4491 
data_a4
4492 
-1
4493 
3
4494 
data_a39
4495 
-1
4496 
3
4497 
data_a38
4498 
-1
4499 
3
4500 
data_a37
4501 
-1
4502 
3
4503 
data_a36
4504 
-1
4505 
3
4506 
data_a35
4507 
-1
4508 
3
4509 
data_a34
4510 
-1
4511 
3
4512 
data_a33
4513 
-1
4514 
3
4515 
data_a32
4516 
-1
4517 
3
4518 
data_a31
4519 
-1
4520 
3
4521 
data_a30
4522 
-1
4523 
3
4524 
data_a3
4525 
-1
4526 
3
4527 
data_a29
4528 
-1
4529 
3
4530 
data_a28
4531 
-1
4532 
3
4533 
data_a27
4534 
-1
4535 
3
4536 
data_a26
4537 
-1
4538 
3
4539 
data_a25
4540 
-1
4541 
3
4542 
data_a24
4543 
-1
4544 
3
4545 
data_a23
4546 
-1
4547 
3
4548 
data_a22
4549 
-1
4550 
3
4551 
data_a21
4552 
-1
4553 
3
4554 
data_a20
4555 
-1
4556 
3
4557 
data_a2
4558 
-1
4559 
3
4560 
data_a19
4561 
-1
4562 
3
4563 
data_a18
4564 
-1
4565 
3
4566 
data_a17
4567 
-1
4568 
3
4569 
data_a16
4570 
-1
4571 
3
4572 
data_a15
4573 
-1
4574 
3
4575 
data_a14
4576 
-1
4577 
3
4578 
data_a13
4579 
-1
4580 
3
4581 
data_a12
4582 
-1
4583 
3
4584 
data_a11
4585 
-1
4586 
3
4587 
data_a10
4588 
-1
4589 
3
4590 
data_a1
4591 
-1
4592 
3
4593 
data_a0
4594 
-1
4595 
3
4596 
clock0
4597 
-1
4598 
3
4599 
address_b4
4600 
-1
4601 
3
4602 
address_b3
4603 
-1
4604 
3
4605 
address_b2
4606 
-1
4607 
3
4608 
address_b1
4609 
-1
4610 
3
4611 
address_b0
4612 
-1
4613 
3
4614 
address_a4
4615 
-1
4616 
3
4617 
address_a3
4618 
-1
4619 
3
4620 
address_a2
4621 
-1
4622 
3
4623 
address_a1
4624 
-1
4625 
3
4626 
address_a0
4627 
-1
4628 
3
4629 
}
4630 
# lmf
4631 
d:|altera|72|quartus|lmf|
4632 
d41d8cd98f0b24e980998ecf8427e
4633 
# macro_sequence
4634 
 
4635 
# end
4636 
# entity
4637 
altsyncram
4638 
# storage
4639 
db|LB.(28).cnf
4640 
db|LB.(28).cnf
4641 
# case_insensitive
4642 
# source_file
4643 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
4644 
1a8e44bce3df5c9cae2128978e887541
4645 
6
4646 
# user_parameter {
4647 
BYTE_SIZE_BLOCK
4648 
8
4649 
PARAMETER_UNKNOWN
4650 
DEF
4651 
AUTO_CARRY_CHAINS
4652 
ON
4653 
AUTO_CARRY
4654 
USR
4655 
IGNORE_CARRY_BUFFERS
4656 
OFF
4657 
IGNORE_CARRY
4658 
USR
4659 
AUTO_CASCADE_CHAINS
4660 
ON
4661 
AUTO_CASCADE
4662 
USR
4663 
IGNORE_CASCADE_BUFFERS
4664 
OFF
4665 
IGNORE_CASCADE
4666 
USR
4667 
WIDTH_BYTEENA
4668 
1
4669 
PARAMETER_UNKNOWN
4670 
DEF
4671 
OPERATION_MODE
4672 
DUAL_PORT
4673 
PARAMETER_UNKNOWN
4674 
USR
4675 
WIDTH_A
4676 
5
4677 
PARAMETER_UNKNOWN
4678 
USR
4679 
WIDTHAD_A
4680 
5
4681 
PARAMETER_UNKNOWN
4682 
USR
4683 
NUMWORDS_A
4684 
32
4685 
PARAMETER_UNKNOWN
4686 
USR
4687 
OUTDATA_REG_A
4688 
UNREGISTERED
4689 
PARAMETER_UNKNOWN
4690 
DEF
4691 
ADDRESS_ACLR_A
4692 
NONE
4693 
PARAMETER_UNKNOWN
4694 
USR
4695 
OUTDATA_ACLR_A
4696 
NONE
4697 
PARAMETER_UNKNOWN
4698 
DEF
4699 
WRCONTROL_ACLR_A
4700 
NONE
4701 
PARAMETER_UNKNOWN
4702 
USR
4703 
INDATA_ACLR_A
4704 
NONE
4705 
PARAMETER_UNKNOWN
4706 
USR
4707 
BYTEENA_ACLR_A
4708 
NONE
4709 
PARAMETER_UNKNOWN
4710 
DEF
4711 
WIDTH_B
4712 
5
4713 
PARAMETER_UNKNOWN
4714 
USR
4715 
WIDTHAD_B
4716 
5
4717 
PARAMETER_UNKNOWN
4718 
USR
4719 
NUMWORDS_B
4720 
32
4721 
PARAMETER_UNKNOWN
4722 
USR
4723 
INDATA_REG_B
4724 
CLOCK1
4725 
PARAMETER_UNKNOWN
4726 
DEF
4727 
WRCONTROL_WRADDRESS_REG_B
4728 
CLOCK1
4729 
PARAMETER_UNKNOWN
4730 
DEF
4731 
RDCONTROL_REG_B
4732 
CLOCK1
4733 
PARAMETER_UNKNOWN
4734 
DEF
4735 
ADDRESS_REG_B
4736 
CLOCK0
4737 
PARAMETER_UNKNOWN
4738 
USR
4739 
OUTDATA_REG_B
4740 
UNREGISTERED
4741 
PARAMETER_UNKNOWN
4742 
USR
4743 
BYTEENA_REG_B
4744 
CLOCK1
4745 
PARAMETER_UNKNOWN
4746 
DEF
4747 
INDATA_ACLR_B
4748 
NONE
4749 
PARAMETER_UNKNOWN
4750 
DEF
4751 
WRCONTROL_ACLR_B
4752 
NONE
4753 
PARAMETER_UNKNOWN
4754 
DEF
4755 
ADDRESS_ACLR_B
4756 
NONE
4757 
PARAMETER_UNKNOWN
4758 
USR
4759 
OUTDATA_ACLR_B
4760 
NONE
4761 
PARAMETER_UNKNOWN
4762 
USR
4763 
RDCONTROL_ACLR_B
4764 
NONE
4765 
PARAMETER_UNKNOWN
4766 
DEF
4767 
BYTEENA_ACLR_B
4768 
NONE
4769 
PARAMETER_UNKNOWN
4770 
DEF
4771 
WIDTH_BYTEENA_A
4772 
1
4773 
PARAMETER_UNKNOWN
4774 
DEF
4775 
WIDTH_BYTEENA_B
4776 
1
4777 
PARAMETER_UNKNOWN
4778 
DEF
4779 
RAM_BLOCK_TYPE
4780 
AUTO
4781 
PARAMETER_UNKNOWN
4782 
USR
4783 
BYTE_SIZE
4784 
8
4785 
PARAMETER_UNKNOWN
4786 
DEF
4787 
READ_DURING_WRITE_MODE_MIXED_PORTS
4788 
OLD_DATA
4789 
PARAMETER_UNKNOWN
4790 
USR
4791 
READ_DURING_WRITE_MODE_PORT_A
4792 
NEW_DATA_NO_NBE_READ
4793 
PARAMETER_UNKNOWN
4794 
DEF
4795 
READ_DURING_WRITE_MODE_PORT_B
4796 
NEW_DATA_NO_NBE_READ
4797 
PARAMETER_UNKNOWN
4798 
DEF
4799 
INIT_FILE
4800 
UNUSED
4801 
PARAMETER_UNKNOWN
4802 
DEF
4803 
INIT_FILE_LAYOUT
4804 
PORT_A
4805 
PARAMETER_UNKNOWN
4806 
DEF
4807 
MAXIMUM_DEPTH
4808 
 
4809 
PARAMETER_UNKNOWN
4810 
DEF
4811 
CLOCK_ENABLE_INPUT_A
4812 
NORMAL
4813 
PARAMETER_UNKNOWN
4814 
DEF
4815 
CLOCK_ENABLE_INPUT_B
4816 
NORMAL
4817 
PARAMETER_UNKNOWN
4818 
DEF
4819 
CLOCK_ENABLE_OUTPUT_A
4820 
NORMAL
4821 
PARAMETER_UNKNOWN
4822 
DEF
4823 
CLOCK_ENABLE_OUTPUT_B
4824 
NORMAL
4825 
PARAMETER_UNKNOWN
4826 
DEF
4827 
CLOCK_ENABLE_CORE_A
4828 
USE_INPUT_CLKEN
4829 
PARAMETER_UNKNOWN
4830 
DEF
4831 
CLOCK_ENABLE_CORE_B
4832 
USE_INPUT_CLKEN
4833 
PARAMETER_UNKNOWN
4834 
DEF
4835 
ENABLE_ECC
4836 
FALSE
4837 
PARAMETER_UNKNOWN
4838 
DEF
4839 
DEVICE_FAMILY
4840 
Stratix II
4841 
PARAMETER_UNKNOWN
4842 
USR
4843 
CBXI_PARAMETER
4844 
altsyncram_3ni1
4845 
PARAMETER_UNKNOWN
4846 
USR
4847 
}
4848 
# used_port {
4849 
wren_a
4850 
-1
4851 
3
4852 
q_b4
4853 
-1
4854 
3
4855 
q_b3
4856 
-1
4857 
3
4858 
q_b2
4859 
-1
4860 
3
4861 
q_b1
4862 
-1
4863 
3
4864 
q_b0
4865 
-1
4866 
3
4867 
data_a4
4868 
-1
4869 
3
4870 
data_a3
4871 
-1
4872 
3
4873 
data_a2
4874 
-1
4875 
3
4876 
data_a1
4877 
-1
4878 
3
4879 
data_a0
4880 
-1
4881 
3
4882 
clock0
4883 
-1
4884 
3
4885 
address_b4
4886 
-1
4887 
3
4888 
address_b3
4889 
-1
4890 
3
4891 
address_b2
4892 
-1
4893 
3
4894 
address_b1
4895 
-1
4896 
3
4897 
address_b0
4898 
-1
4899 
3
4900 
address_a4
4901 
-1
4902 
3
4903 
address_a3
4904 
-1
4905 
3
4906 
address_a2
4907 
-1
4908 
3
4909 
address_a1
4910 
-1
4911 
3
4912 
address_a0
4913 
-1
4914 
3
4915 
}
4916 
# include_file {
4917 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
4918 
c22bfd353214c01495b560fc34e47d79
4919 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
4920 
2263a3bdfffeb150af977ee13902f70
4921 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
4922 
bd0e2f5e01c1bd360461dceb53d48
4923 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
4924 
f39123b8592ab2dac019716e56b3ec18
4925 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
4926 
60d229340bc3c24acb0a137b4849830
4927 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
4928 
d4e3a69a331d3a99d3281790d99a1ebd
4929 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
4930 
e66a83eccf6717bed97c99d891ad085
4931 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
4932 
99d442b5b66c88db4daf94d99c6e4e77
4933 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
4934 
74e08939f96a7ea8e7a4d59a5b01fe7
4935 
}
4936 
# lmf
4937 
d:|altera|72|quartus|lmf|
4938 
d41d8cd98f0b24e980998ecf8427e
4939 
# macro_sequence
4940 
 
4941 
# end
4942 
# entity
4943 
altsyncram_3ni1
4944 
# storage
4945 
db|LB.(29).cnf
4946 
db|LB.(29).cnf
4947 
# case_insensitive
4948 
# source_file
4949 
db|altsyncram_3ni1.tdf
4950 
71ead283c4d09765cfa93f5e2ff5e8b
4951 
6
4952 
# used_port {
4953 
wren_a
4954 
-1
4955 
3
4956 
q_b4
4957 
-1
4958 
3
4959 
q_b3
4960 
-1
4961 
3
4962 
q_b2
4963 
-1
4964 
3
4965 
q_b1
4966 
-1
4967 
3
4968 
q_b0
4969 
-1
4970 
3
4971 
data_a4
4972 
-1
4973 
3
4974 
data_a3
4975 
-1
4976 
3
4977 
data_a2
4978 
-1
4979 
3
4980 
data_a1
4981 
-1
4982 
3
4983 
data_a0
4984 
-1
4985 
3
4986 
clock0
4987 
-1
4988 
3
4989 
address_b4
4990 
-1
4991 
3
4992 
address_b3
4993 
-1
4994 
3
4995 
address_b2
4996 
-1
4997 
3
4998 
address_b1
4999 
-1
5000 
3
5001 
address_b0
5002 
-1
5003 
3
5004 
address_a4
5005 
-1
5006 
3
5007 
address_a3
5008 
-1
5009 
3
5010 
address_a2
5011 
-1
5012 
3
5013 
address_a1
5014 
-1
5015 
3
5016 
address_a0
5017 
-1
5018 
3
5019 
}
5020 
# lmf
5021 
d:|altera|72|quartus|lmf|
5022 
d41d8cd98f0b24e980998ecf8427e
5023 
# macro_sequence
5024 
 
5025 
# end
5026 
# entity
5027 
classifier
5028 
# storage
5029 
db|LB.(2).cnf
5030 
db|LB.(2).cnf
5031 
# logic_option {
5032 
AUTO_RAM_RECOGNITION
5033 
ON
5034 
}
5035 
# case_insensitive
5036 
# source_file
5037 
Classfier|classifier.vhd
5038 
7968e27161fcb825eccbdbc81552a080
5039 
4
5040 
# internal_option {
5041 
HDL_INITIAL_FANOUT_LIMIT
5042 
OFF
5043 
AUTO_RESOURCE_SHARING
5044 
OFF
5045 
AUTO_RAM_RECOGNITION
5046 
ON
5047 
AUTO_ROM_RECOGNITION
5048 
ON
5049 
}
5050 
# user_parameter {
5051 
data_width
5052 
64
5053 
PARAMETER_SIGNED_DEC
5054 
USR
5055 
ctrl_width
5056 
8
5057 
PARAMETER_SIGNED_DEC
5058 
USR
5059 
 constraint(in_data)
5060 
63 downto 0
5061 
PARAMETER_STRING
5062 
USR
5063 
 constraint(in_ctrl)
5064 
7 downto 0
5065 
PARAMETER_STRING
5066 
USR
5067 
 constraint(out_data)
5068 
63 downto 0
5069 
PARAMETER_STRING
5070 
USR
5071 
 constraint(out_ctrl)
5072 
7 downto 0
5073 
PARAMETER_STRING
5074 
USR
5075 
 constraint(dest)
5076 
7 downto 0
5077 
PARAMETER_STRING
5078 
USR
5079 
}
5080 
# lmf
5081 
d:|altera|72|quartus|lmf|maxplus2.lmf
5082 
9a59d39b0706640b4b2718e8a1ff1f
5083 
# macro_sequence
5084 
 
5085 
# end
5086 
# entity
5087 
altsyncram
5088 
# storage
5089 
db|LB.(30).cnf
5090 
db|LB.(30).cnf
5091 
# case_insensitive
5092 
# source_file
5093 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
5094 
1a8e44bce3df5c9cae2128978e887541
5095 
6
5096 
# user_parameter {
5097 
BYTE_SIZE_BLOCK
5098 
8
5099 
PARAMETER_UNKNOWN
5100 
DEF
5101 
AUTO_CARRY_CHAINS
5102 
ON
5103 
AUTO_CARRY
5104 
USR
5105 
IGNORE_CARRY_BUFFERS
5106 
OFF
5107 
IGNORE_CARRY
5108 
USR
5109 
AUTO_CASCADE_CHAINS
5110 
ON
5111 
AUTO_CASCADE
5112 
USR
5113 
IGNORE_CASCADE_BUFFERS
5114 
OFF
5115 
IGNORE_CASCADE
5116 
USR
5117 
WIDTH_BYTEENA
5118 
1
5119 
PARAMETER_UNKNOWN
5120 
DEF
5121 
OPERATION_MODE
5122 
DUAL_PORT
5123 
PARAMETER_UNKNOWN
5124 
USR
5125 
WIDTH_A
5126 
6
5127 
PARAMETER_UNKNOWN
5128 
USR
5129 
WIDTHAD_A
5130 
5
5131 
PARAMETER_UNKNOWN
5132 
USR
5133 
NUMWORDS_A
5134 
32
5135 
PARAMETER_UNKNOWN
5136 
USR
5137 
OUTDATA_REG_A
5138 
UNREGISTERED
5139 
PARAMETER_UNKNOWN
5140 
DEF
5141 
ADDRESS_ACLR_A
5142 
NONE
5143 
PARAMETER_UNKNOWN
5144 
USR
5145 
OUTDATA_ACLR_A
5146 
NONE
5147 
PARAMETER_UNKNOWN
5148 
DEF
5149 
WRCONTROL_ACLR_A
5150 
NONE
5151 
PARAMETER_UNKNOWN
5152 
USR
5153 
INDATA_ACLR_A
5154 
NONE
5155 
PARAMETER_UNKNOWN
5156 
USR
5157 
BYTEENA_ACLR_A
5158 
NONE
5159 
PARAMETER_UNKNOWN
5160 
DEF
5161 
WIDTH_B
5162 
6
5163 
PARAMETER_UNKNOWN
5164 
USR
5165 
WIDTHAD_B
5166 
5
5167 
PARAMETER_UNKNOWN
5168 
USR
5169 
NUMWORDS_B
5170 
32
5171 
PARAMETER_UNKNOWN
5172 
USR
5173 
INDATA_REG_B
5174 
CLOCK1
5175 
PARAMETER_UNKNOWN
5176 
DEF
5177 
WRCONTROL_WRADDRESS_REG_B
5178 
CLOCK1
5179 
PARAMETER_UNKNOWN
5180 
DEF
5181 
RDCONTROL_REG_B
5182 
CLOCK1
5183 
PARAMETER_UNKNOWN
5184 
DEF
5185 
ADDRESS_REG_B
5186 
CLOCK0
5187 
PARAMETER_UNKNOWN
5188 
USR
5189 
OUTDATA_REG_B
5190 
UNREGISTERED
5191 
PARAMETER_UNKNOWN
5192 
USR
5193 
BYTEENA_REG_B
5194 
CLOCK1
5195 
PARAMETER_UNKNOWN
5196 
DEF
5197 
INDATA_ACLR_B
5198 
NONE
5199 
PARAMETER_UNKNOWN
5200 
DEF
5201 
WRCONTROL_ACLR_B
5202 
NONE
5203 
PARAMETER_UNKNOWN
5204 
DEF
5205 
ADDRESS_ACLR_B
5206 
NONE
5207 
PARAMETER_UNKNOWN
5208 
USR
5209 
OUTDATA_ACLR_B
5210 
NONE
5211 
PARAMETER_UNKNOWN
5212 
USR
5213 
RDCONTROL_ACLR_B
5214 
NONE
5215 
PARAMETER_UNKNOWN
5216 
DEF
5217 
BYTEENA_ACLR_B
5218 
NONE
5219 
PARAMETER_UNKNOWN
5220 
DEF
5221 
WIDTH_BYTEENA_A
5222 
1
5223 
PARAMETER_UNKNOWN
5224 
DEF
5225 
WIDTH_BYTEENA_B
5226 
1
5227 
PARAMETER_UNKNOWN
5228 
DEF
5229 
RAM_BLOCK_TYPE
5230 
AUTO
5231 
PARAMETER_UNKNOWN
5232 
USR
5233 
BYTE_SIZE
5234 
8
5235 
PARAMETER_UNKNOWN
5236 
DEF
5237 
READ_DURING_WRITE_MODE_MIXED_PORTS
5238 
OLD_DATA
5239 
PARAMETER_UNKNOWN
5240 
USR
5241 
READ_DURING_WRITE_MODE_PORT_A
5242 
NEW_DATA_NO_NBE_READ
5243 
PARAMETER_UNKNOWN
5244 
DEF
5245 
READ_DURING_WRITE_MODE_PORT_B
5246 
NEW_DATA_NO_NBE_READ
5247 
PARAMETER_UNKNOWN
5248 
DEF
5249 
INIT_FILE
5250 
UNUSED
5251 
PARAMETER_UNKNOWN
5252 
DEF
5253 
INIT_FILE_LAYOUT
5254 
PORT_A
5255 
PARAMETER_UNKNOWN
5256 
DEF
5257 
MAXIMUM_DEPTH
5258 
 
5259 
PARAMETER_UNKNOWN
5260 
DEF
5261 
CLOCK_ENABLE_INPUT_A
5262 
NORMAL
5263 
PARAMETER_UNKNOWN
5264 
DEF
5265 
CLOCK_ENABLE_INPUT_B
5266 
NORMAL
5267 
PARAMETER_UNKNOWN
5268 
DEF
5269 
CLOCK_ENABLE_OUTPUT_A
5270 
NORMAL
5271 
PARAMETER_UNKNOWN
5272 
DEF
5273 
CLOCK_ENABLE_OUTPUT_B
5274 
NORMAL
5275 
PARAMETER_UNKNOWN
5276 
DEF
5277 
CLOCK_ENABLE_CORE_A
5278 
USE_INPUT_CLKEN
5279 
PARAMETER_UNKNOWN
5280 
DEF
5281 
CLOCK_ENABLE_CORE_B
5282 
USE_INPUT_CLKEN
5283 
PARAMETER_UNKNOWN
5284 
DEF
5285 
ENABLE_ECC
5286 
FALSE
5287 
PARAMETER_UNKNOWN
5288 
DEF
5289 
DEVICE_FAMILY
5290 
Stratix II
5291 
PARAMETER_UNKNOWN
5292 
USR
5293 
CBXI_PARAMETER
5294 
altsyncram_5ni1
5295 
PARAMETER_UNKNOWN
5296 
USR
5297 
}
5298 
# used_port {
5299 
wren_a
5300 
-1
5301 
3
5302 
q_b5
5303 
-1
5304 
3
5305 
q_b4
5306 
-1
5307 
3
5308 
q_b3
5309 
-1
5310 
3
5311 
q_b2
5312 
-1
5313 
3
5314 
q_b1
5315 
-1
5316 
3
5317 
q_b0
5318 
-1
5319 
3
5320 
data_a5
5321 
-1
5322 
3
5323 
data_a4
5324 
-1
5325 
3
5326 
data_a3
5327 
-1
5328 
3
5329 
data_a2
5330 
-1
5331 
3
5332 
data_a1
5333 
-1
5334 
3
5335 
data_a0
5336 
-1
5337 
3
5338 
clock0
5339 
-1
5340 
3
5341 
address_b4
5342 
-1
5343 
3
5344 
address_b3
5345 
-1
5346 
3
5347 
address_b2
5348 
-1
5349 
3
5350 
address_b1
5351 
-1
5352 
3
5353 
address_b0
5354 
-1
5355 
3
5356 
address_a4
5357 
-1
5358 
3
5359 
address_a3
5360 
-1
5361 
3
5362 
address_a2
5363 
-1
5364 
3
5365 
address_a1
5366 
-1
5367 
3
5368 
address_a0
5369 
-1
5370 
3
5371 
}
5372 
# include_file {
5373 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
5374 
c22bfd353214c01495b560fc34e47d79
5375 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
5376 
2263a3bdfffeb150af977ee13902f70
5377 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
5378 
bd0e2f5e01c1bd360461dceb53d48
5379 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
5380 
f39123b8592ab2dac019716e56b3ec18
5381 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
5382 
60d229340bc3c24acb0a137b4849830
5383 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
5384 
d4e3a69a331d3a99d3281790d99a1ebd
5385 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
5386 
e66a83eccf6717bed97c99d891ad085
5387 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
5388 
99d442b5b66c88db4daf94d99c6e4e77
5389 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
5390 
74e08939f96a7ea8e7a4d59a5b01fe7
5391 
}
5392 
# lmf
5393 
d:|altera|72|quartus|lmf|
5394 
d41d8cd98f0b24e980998ecf8427e
5395 
# macro_sequence
5396 
 
5397 
# end
5398 
# entity
5399 
altsyncram_5ni1
5400 
# storage
5401 
db|LB.(31).cnf
5402 
db|LB.(31).cnf
5403 
# case_insensitive
5404 
# source_file
5405 
db|altsyncram_5ni1.tdf
5406 
b1147fcd528ef7d16c93314ba46db1d
5407 
6
5408 
# used_port {
5409 
wren_a
5410 
-1
5411 
3
5412 
q_b5
5413 
-1
5414 
3
5415 
q_b4
5416 
-1
5417 
3
5418 
q_b3
5419 
-1
5420 
3
5421 
q_b2
5422 
-1
5423 
3
5424 
q_b1
5425 
-1
5426 
3
5427 
q_b0
5428 
-1
5429 
3
5430 
data_a5
5431 
-1
5432 
3
5433 
data_a4
5434 
-1
5435 
3
5436 
data_a3
5437 
-1
5438 
3
5439 
data_a2
5440 
-1
5441 
3
5442 
data_a1
5443 
-1
5444 
3
5445 
data_a0
5446 
-1
5447 
3
5448 
clock0
5449 
-1
5450 
3
5451 
address_b4
5452 
-1
5453 
3
5454 
address_b3
5455 
-1
5456 
3
5457 
address_b2
5458 
-1
5459 
3
5460 
address_b1
5461 
-1
5462 
3
5463 
address_b0
5464 
-1
5465 
3
5466 
address_a4
5467 
-1
5468 
3
5469 
address_a3
5470 
-1
5471 
3
5472 
address_a2
5473 
-1
5474 
3
5475 
address_a1
5476 
-1
5477 
3
5478 
address_a0
5479 
-1
5480 
3
5481 
}
5482 
# lmf
5483 
d:|altera|72|quartus|lmf|
5484 
d41d8cd98f0b24e980998ecf8427e
5485 
# macro_sequence
5486 
 
5487 
# end
5488 
# entity
5489 
altsyncram
5490 
# storage
5491 
db|LB.(32).cnf
5492 
db|LB.(32).cnf
5493 
# case_insensitive
5494 
# source_file
5495 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
5496 
1a8e44bce3df5c9cae2128978e887541
5497 
6
5498 
# user_parameter {
5499 
BYTE_SIZE_BLOCK
5500 
8
5501 
PARAMETER_UNKNOWN
5502 
DEF
5503 
AUTO_CARRY_CHAINS
5504 
ON
5505 
AUTO_CARRY
5506 
USR
5507 
IGNORE_CARRY_BUFFERS
5508 
OFF
5509 
IGNORE_CARRY
5510 
USR
5511 
AUTO_CASCADE_CHAINS
5512 
ON
5513 
AUTO_CASCADE
5514 
USR
5515 
IGNORE_CASCADE_BUFFERS
5516 
OFF
5517 
IGNORE_CASCADE
5518 
USR
5519 
WIDTH_BYTEENA
5520 
1
5521 
PARAMETER_UNKNOWN
5522 
DEF
5523 
OPERATION_MODE
5524 
DUAL_PORT
5525 
PARAMETER_UNKNOWN
5526 
USR
5527 
WIDTH_A
5528 
6
5529 
PARAMETER_UNKNOWN
5530 
USR
5531 
WIDTHAD_A
5532 
8
5533 
PARAMETER_UNKNOWN
5534 
USR
5535 
NUMWORDS_A
5536 
256
5537 
PARAMETER_UNKNOWN
5538 
USR
5539 
OUTDATA_REG_A
5540 
UNREGISTERED
5541 
PARAMETER_UNKNOWN
5542 
DEF
5543 
ADDRESS_ACLR_A
5544 
NONE
5545 
PARAMETER_UNKNOWN
5546 
USR
5547 
OUTDATA_ACLR_A
5548 
NONE
5549 
PARAMETER_UNKNOWN
5550 
DEF
5551 
WRCONTROL_ACLR_A
5552 
NONE
5553 
PARAMETER_UNKNOWN
5554 
USR
5555 
INDATA_ACLR_A
5556 
NONE
5557 
PARAMETER_UNKNOWN
5558 
USR
5559 
BYTEENA_ACLR_A
5560 
NONE
5561 
PARAMETER_UNKNOWN
5562 
DEF
5563 
WIDTH_B
5564 
6
5565 
PARAMETER_UNKNOWN
5566 
USR
5567 
WIDTHAD_B
5568 
8
5569 
PARAMETER_UNKNOWN
5570 
USR
5571 
NUMWORDS_B
5572 
256
5573 
PARAMETER_UNKNOWN
5574 
USR
5575 
INDATA_REG_B
5576 
CLOCK1
5577 
PARAMETER_UNKNOWN
5578 
DEF
5579 
WRCONTROL_WRADDRESS_REG_B
5580 
CLOCK1
5581 
PARAMETER_UNKNOWN
5582 
DEF
5583 
RDCONTROL_REG_B
5584 
CLOCK1
5585 
PARAMETER_UNKNOWN
5586 
DEF
5587 
ADDRESS_REG_B
5588 
CLOCK0
5589 
PARAMETER_UNKNOWN
5590 
USR
5591 
OUTDATA_REG_B
5592 
UNREGISTERED
5593 
PARAMETER_UNKNOWN
5594 
USR
5595 
BYTEENA_REG_B
5596 
CLOCK1
5597 
PARAMETER_UNKNOWN
5598 
DEF
5599 
INDATA_ACLR_B
5600 
NONE
5601 
PARAMETER_UNKNOWN
5602 
DEF
5603 
WRCONTROL_ACLR_B
5604 
NONE
5605 
PARAMETER_UNKNOWN
5606 
DEF
5607 
ADDRESS_ACLR_B
5608 
NONE
5609 
PARAMETER_UNKNOWN
5610 
USR
5611 
OUTDATA_ACLR_B
5612 
NONE
5613 
PARAMETER_UNKNOWN
5614 
USR
5615 
RDCONTROL_ACLR_B
5616 
NONE
5617 
PARAMETER_UNKNOWN
5618 
DEF
5619 
BYTEENA_ACLR_B
5620 
NONE
5621 
PARAMETER_UNKNOWN
5622 
DEF
5623 
WIDTH_BYTEENA_A
5624 
1
5625 
PARAMETER_UNKNOWN
5626 
DEF
5627 
WIDTH_BYTEENA_B
5628 
1
5629 
PARAMETER_UNKNOWN
5630 
DEF
5631 
RAM_BLOCK_TYPE
5632 
AUTO
5633 
PARAMETER_UNKNOWN
5634 
USR
5635 
BYTE_SIZE
5636 
8
5637 
PARAMETER_UNKNOWN
5638 
DEF
5639 
READ_DURING_WRITE_MODE_MIXED_PORTS
5640 
OLD_DATA
5641 
PARAMETER_UNKNOWN
5642 
USR
5643 
READ_DURING_WRITE_MODE_PORT_A
5644 
NEW_DATA_NO_NBE_READ
5645 
PARAMETER_UNKNOWN
5646 
DEF
5647 
READ_DURING_WRITE_MODE_PORT_B
5648 
NEW_DATA_NO_NBE_READ
5649 
PARAMETER_UNKNOWN
5650 
DEF
5651 
INIT_FILE
5652 
UNUSED
5653 
PARAMETER_UNKNOWN
5654 
DEF
5655 
INIT_FILE_LAYOUT
5656 
PORT_A
5657 
PARAMETER_UNKNOWN
5658 
DEF
5659 
MAXIMUM_DEPTH
5660 
 
5661 
PARAMETER_UNKNOWN
5662 
DEF
5663 
CLOCK_ENABLE_INPUT_A
5664 
NORMAL
5665 
PARAMETER_UNKNOWN
5666 
DEF
5667 
CLOCK_ENABLE_INPUT_B
5668 
NORMAL
5669 
PARAMETER_UNKNOWN
5670 
DEF
5671 
CLOCK_ENABLE_OUTPUT_A
5672 
NORMAL
5673 
PARAMETER_UNKNOWN
5674 
DEF
5675 
CLOCK_ENABLE_OUTPUT_B
5676 
NORMAL
5677 
PARAMETER_UNKNOWN
5678 
DEF
5679 
CLOCK_ENABLE_CORE_A
5680 
USE_INPUT_CLKEN
5681 
PARAMETER_UNKNOWN
5682 
DEF
5683 
CLOCK_ENABLE_CORE_B
5684 
USE_INPUT_CLKEN
5685 
PARAMETER_UNKNOWN
5686 
DEF
5687 
ENABLE_ECC
5688 
FALSE
5689 
PARAMETER_UNKNOWN
5690 
DEF
5691 
DEVICE_FAMILY
5692 
Stratix II
5693 
PARAMETER_UNKNOWN
5694 
USR
5695 
CBXI_PARAMETER
5696 
altsyncram_rqi1
5697 
PARAMETER_UNKNOWN
5698 
USR
5699 
}
5700 
# used_port {
5701 
wren_a
5702 
-1
5703 
3
5704 
q_b5
5705 
-1
5706 
3
5707 
q_b4
5708 
-1
5709 
3
5710 
q_b3
5711 
-1
5712 
3
5713 
q_b2
5714 
-1
5715 
3
5716 
q_b1
5717 
-1
5718 
3
5719 
q_b0
5720 
-1
5721 
3
5722 
data_a5
5723 
-1
5724 
3
5725 
data_a4
5726 
-1
5727 
3
5728 
data_a3
5729 
-1
5730 
3
5731 
data_a2
5732 
-1
5733 
3
5734 
data_a1
5735 
-1
5736 
3
5737 
data_a0
5738 
-1
5739 
3
5740 
clock0
5741 
-1
5742 
3
5743 
address_b7
5744 
-1
5745 
3
5746 
address_b6
5747 
-1
5748 
3
5749 
address_b5
5750 
-1
5751 
3
5752 
address_b4
5753 
-1
5754 
3
5755 
address_b3
5756 
-1
5757 
3
5758 
address_b2
5759 
-1
5760 
3
5761 
address_b1
5762 
-1
5763 
3
5764 
address_b0
5765 
-1
5766 
3
5767 
address_a7
5768 
-1
5769 
3
5770 
address_a6
5771 
-1
5772 
3
5773 
address_a5
5774 
-1
5775 
3
5776 
address_a4
5777 
-1
5778 
3
5779 
address_a3
5780 
-1
5781 
3
5782 
address_a2
5783 
-1
5784 
3
5785 
address_a1
5786 
-1
5787 
3
5788 
address_a0
5789 
-1
5790 
3
5791 
}
5792 
# include_file {
5793 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
5794 
c22bfd353214c01495b560fc34e47d79
5795 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
5796 
2263a3bdfffeb150af977ee13902f70
5797 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
5798 
bd0e2f5e01c1bd360461dceb53d48
5799 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
5800 
f39123b8592ab2dac019716e56b3ec18
5801 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
5802 
60d229340bc3c24acb0a137b4849830
5803 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
5804 
d4e3a69a331d3a99d3281790d99a1ebd
5805 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
5806 
e66a83eccf6717bed97c99d891ad085
5807 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
5808 
99d442b5b66c88db4daf94d99c6e4e77
5809 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
5810 
74e08939f96a7ea8e7a4d59a5b01fe7
5811 
}
5812 
# lmf
5813 
d:|altera|72|quartus|lmf|
5814 
d41d8cd98f0b24e980998ecf8427e
5815 
# macro_sequence
5816 
 
5817 
# end
5818 
# entity
5819 
altsyncram_rqi1
5820 
# storage
5821 
db|LB.(33).cnf
5822 
db|LB.(33).cnf
5823 
# case_insensitive
5824 
# source_file
5825 
db|altsyncram_rqi1.tdf
5826 
bad8cf1d924b44364ac2cd905991
5827 
6
5828 
# used_port {
5829 
wren_a
5830 
-1
5831 
3
5832 
q_b5
5833 
-1
5834 
3
5835 
q_b4
5836 
-1
5837 
3
5838 
q_b3
5839 
-1
5840 
3
5841 
q_b2
5842 
-1
5843 
3
5844 
q_b1
5845 
-1
5846 
3
5847 
q_b0
5848 
-1
5849 
3
5850 
data_a5
5851 
-1
5852 
3
5853 
data_a4
5854 
-1
5855 
3
5856 
data_a3
5857 
-1
5858 
3
5859 
data_a2
5860 
-1
5861 
3
5862 
data_a1
5863 
-1
5864 
3
5865 
data_a0
5866 
-1
5867 
3
5868 
clock0
5869 
-1
5870 
3
5871 
address_b7
5872 
-1
5873 
3
5874 
address_b6
5875 
-1
5876 
3
5877 
address_b5
5878 
-1
5879 
3
5880 
address_b4
5881 
-1
5882 
3
5883 
address_b3
5884 
-1
5885 
3
5886 
address_b2
5887 
-1
5888 
3
5889 
address_b1
5890 
-1
5891 
3
5892 
address_b0
5893 
-1
5894 
3
5895 
address_a7
5896 
-1
5897 
3
5898 
address_a6
5899 
-1
5900 
3
5901 
address_a5
5902 
-1
5903 
3
5904 
address_a4
5905 
-1
5906 
3
5907 
address_a3
5908 
-1
5909 
3
5910 
address_a2
5911 
-1
5912 
3
5913 
address_a1
5914 
-1
5915 
3
5916 
address_a0
5917 
-1
5918 
3
5919 
}
5920 
# lmf
5921 
d:|altera|72|quartus|lmf|
5922 
d41d8cd98f0b24e980998ecf8427e
5923 
# macro_sequence
5924 
 
5925 
# end
5926 
# entity
5927 
altsyncram
5928 
# storage
5929 
db|LB.(34).cnf
5930 
db|LB.(34).cnf
5931 
# case_insensitive
5932 
# source_file
5933 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
5934 
1a8e44bce3df5c9cae2128978e887541
5935 
6
5936 
# user_parameter {
5937 
BYTE_SIZE_BLOCK
5938 
8
5939 
PARAMETER_UNKNOWN
5940 
DEF
5941 
AUTO_CARRY_CHAINS
5942 
ON
5943 
AUTO_CARRY
5944 
USR
5945 
IGNORE_CARRY_BUFFERS
5946 
OFF
5947 
IGNORE_CARRY
5948 
USR
5949 
AUTO_CASCADE_CHAINS
5950 
ON
5951 
AUTO_CASCADE
5952 
USR
5953 
IGNORE_CASCADE_BUFFERS
5954 
OFF
5955 
IGNORE_CASCADE
5956 
USR
5957 
WIDTH_BYTEENA
5958 
1
5959 
PARAMETER_UNKNOWN
5960 
DEF
5961 
OPERATION_MODE
5962 
DUAL_PORT
5963 
PARAMETER_UNKNOWN
5964 
USR
5965 
WIDTH_A
5966 
1
5967 
PARAMETER_UNKNOWN
5968 
USR
5969 
WIDTHAD_A
5970 
8
5971 
PARAMETER_UNKNOWN
5972 
USR
5973 
NUMWORDS_A
5974 
256
5975 
PARAMETER_UNKNOWN
5976 
USR
5977 
OUTDATA_REG_A
5978 
UNREGISTERED
5979 
PARAMETER_UNKNOWN
5980 
DEF
5981 
ADDRESS_ACLR_A
5982 
NONE
5983 
PARAMETER_UNKNOWN
5984 
USR
5985 
OUTDATA_ACLR_A
5986 
NONE
5987 
PARAMETER_UNKNOWN
5988 
DEF
5989 
WRCONTROL_ACLR_A
5990 
NONE
5991 
PARAMETER_UNKNOWN
5992 
USR
5993 
INDATA_ACLR_A
5994 
NONE
5995 
PARAMETER_UNKNOWN
5996 
USR
5997 
BYTEENA_ACLR_A
5998 
NONE
5999 
PARAMETER_UNKNOWN
6000 
DEF
6001 
WIDTH_B
6002 
1
6003 
PARAMETER_UNKNOWN
6004 
USR
6005 
WIDTHAD_B
6006 
8
6007 
PARAMETER_UNKNOWN
6008 
USR
6009 
NUMWORDS_B
6010 
256
6011 
PARAMETER_UNKNOWN
6012 
USR
6013 
INDATA_REG_B
6014 
CLOCK1
6015 
PARAMETER_UNKNOWN
6016 
DEF
6017 
WRCONTROL_WRADDRESS_REG_B
6018 
CLOCK1
6019 
PARAMETER_UNKNOWN
6020 
DEF
6021 
RDCONTROL_REG_B
6022 
CLOCK1
6023 
PARAMETER_UNKNOWN
6024 
DEF
6025 
ADDRESS_REG_B
6026 
CLOCK0
6027 
PARAMETER_UNKNOWN
6028 
USR
6029 
OUTDATA_REG_B
6030 
UNREGISTERED
6031 
PARAMETER_UNKNOWN
6032 
USR
6033 
BYTEENA_REG_B
6034 
CLOCK1
6035 
PARAMETER_UNKNOWN
6036 
DEF
6037 
INDATA_ACLR_B
6038 
NONE
6039 
PARAMETER_UNKNOWN
6040 
DEF
6041 
WRCONTROL_ACLR_B
6042 
NONE
6043 
PARAMETER_UNKNOWN
6044 
DEF
6045 
ADDRESS_ACLR_B
6046 
NONE
6047 
PARAMETER_UNKNOWN
6048 
USR
6049 
OUTDATA_ACLR_B
6050 
NONE
6051 
PARAMETER_UNKNOWN
6052 
USR
6053 
RDCONTROL_ACLR_B
6054 
NONE
6055 
PARAMETER_UNKNOWN
6056 
DEF
6057 
BYTEENA_ACLR_B
6058 
NONE
6059 
PARAMETER_UNKNOWN
6060 
DEF
6061 
WIDTH_BYTEENA_A
6062 
1
6063 
PARAMETER_UNKNOWN
6064 
DEF
6065 
WIDTH_BYTEENA_B
6066 
1
6067 
PARAMETER_UNKNOWN
6068 
DEF
6069 
RAM_BLOCK_TYPE
6070 
AUTO
6071 
PARAMETER_UNKNOWN
6072 
USR
6073 
BYTE_SIZE
6074 
8
6075 
PARAMETER_UNKNOWN
6076 
DEF
6077 
READ_DURING_WRITE_MODE_MIXED_PORTS
6078 
OLD_DATA
6079 
PARAMETER_UNKNOWN
6080 
USR
6081 
READ_DURING_WRITE_MODE_PORT_A
6082 
NEW_DATA_NO_NBE_READ
6083 
PARAMETER_UNKNOWN
6084 
DEF
6085 
READ_DURING_WRITE_MODE_PORT_B
6086 
NEW_DATA_NO_NBE_READ
6087 
PARAMETER_UNKNOWN
6088 
DEF
6089 
INIT_FILE
6090 
UNUSED
6091 
PARAMETER_UNKNOWN
6092 
DEF
6093 
INIT_FILE_LAYOUT
6094 
PORT_A
6095 
PARAMETER_UNKNOWN
6096 
DEF
6097 
MAXIMUM_DEPTH
6098 
 
6099 
PARAMETER_UNKNOWN
6100 
DEF
6101 
CLOCK_ENABLE_INPUT_A
6102 
NORMAL
6103 
PARAMETER_UNKNOWN
6104 
DEF
6105 
CLOCK_ENABLE_INPUT_B
6106 
NORMAL
6107 
PARAMETER_UNKNOWN
6108 
DEF
6109 
CLOCK_ENABLE_OUTPUT_A
6110 
NORMAL
6111 
PARAMETER_UNKNOWN
6112 
DEF
6113 
CLOCK_ENABLE_OUTPUT_B
6114 
NORMAL
6115 
PARAMETER_UNKNOWN
6116 
DEF
6117 
CLOCK_ENABLE_CORE_A
6118 
USE_INPUT_CLKEN
6119 
PARAMETER_UNKNOWN
6120 
DEF
6121 
CLOCK_ENABLE_CORE_B
6122 
USE_INPUT_CLKEN
6123 
PARAMETER_UNKNOWN
6124 
DEF
6125 
ENABLE_ECC
6126 
FALSE
6127 
PARAMETER_UNKNOWN
6128 
DEF
6129 
DEVICE_FAMILY
6130 
Stratix II
6131 
PARAMETER_UNKNOWN
6132 
USR
6133 
CBXI_PARAMETER
6134 
altsyncram_iqi1
6135 
PARAMETER_UNKNOWN
6136 
USR
6137 
}
6138 
# used_port {
6139 
wren_a
6140 
-1
6141 
3
6142 
q_b0
6143 
-1
6144 
3
6145 
data_a0
6146 
-1
6147 
3
6148 
clock0
6149 
-1
6150 
3
6151 
address_b7
6152 
-1
6153 
3
6154 
address_b6
6155 
-1
6156 
3
6157 
address_b5
6158 
-1
6159 
3
6160 
address_b4
6161 
-1
6162 
3
6163 
address_b3
6164 
-1
6165 
3
6166 
address_b2
6167 
-1
6168 
3
6169 
address_b1
6170 
-1
6171 
3
6172 
address_b0
6173 
-1
6174 
3
6175 
address_a7
6176 
-1
6177 
3
6178 
address_a6
6179 
-1
6180 
3
6181 
address_a5
6182 
-1
6183 
3
6184 
address_a4
6185 
-1
6186 
3
6187 
address_a3
6188 
-1
6189 
3
6190 
address_a2
6191 
-1
6192 
3
6193 
address_a1
6194 
-1
6195 
3
6196 
address_a0
6197 
-1
6198 
3
6199 
}
6200 
# include_file {
6201 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
6202 
c22bfd353214c01495b560fc34e47d79
6203 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
6204 
2263a3bdfffeb150af977ee13902f70
6205 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
6206 
bd0e2f5e01c1bd360461dceb53d48
6207 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
6208 
f39123b8592ab2dac019716e56b3ec18
6209 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
6210 
60d229340bc3c24acb0a137b4849830
6211 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
6212 
d4e3a69a331d3a99d3281790d99a1ebd
6213 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
6214 
e66a83eccf6717bed97c99d891ad085
6215 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
6216 
99d442b5b66c88db4daf94d99c6e4e77
6217 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
6218 
74e08939f96a7ea8e7a4d59a5b01fe7
6219 
}
6220 
# lmf
6221 
d:|altera|72|quartus|lmf|
6222 
d41d8cd98f0b24e980998ecf8427e
6223 
# macro_sequence
6224 
 
6225 
# end
6226 
# entity
6227 
altsyncram_iqi1
6228 
# storage
6229 
db|LB.(35).cnf
6230 
db|LB.(35).cnf
6231 
# case_insensitive
6232 
# source_file
6233 
db|altsyncram_iqi1.tdf
6234 
81bd411fc929a08789ef3a2232e75b2
6235 
6
6236 
# used_port {
6237 
wren_a
6238 
-1
6239 
3
6240 
q_b0
6241 
-1
6242 
3
6243 
data_a0
6244 
-1
6245 
3
6246 
clock0
6247 
-1
6248 
3
6249 
address_b7
6250 
-1
6251 
3
6252 
address_b6
6253 
-1
6254 
3
6255 
address_b5
6256 
-1
6257 
3
6258 
address_b4
6259 
-1
6260 
3
6261 
address_b3
6262 
-1
6263 
3
6264 
address_b2
6265 
-1
6266 
3
6267 
address_b1
6268 
-1
6269 
3
6270 
address_b0
6271 
-1
6272 
3
6273 
address_a7
6274 
-1
6275 
3
6276 
address_a6
6277 
-1
6278 
3
6279 
address_a5
6280 
-1
6281 
3
6282 
address_a4
6283 
-1
6284 
3
6285 
address_a3
6286 
-1
6287 
3
6288 
address_a2
6289 
-1
6290 
3
6291 
address_a1
6292 
-1
6293 
3
6294 
address_a0
6295 
-1
6296 
3
6297 
}
6298 
# lmf
6299 
d:|altera|72|quartus|lmf|
6300 
d41d8cd98f0b24e980998ecf8427e
6301 
# macro_sequence
6302 
 
6303 
# end
6304 
# entity
6305 
small_fifo
6306 
# storage
6307 
db|LB.(38).cnf
6308 
db|LB.(38).cnf
6309 
# logic_option {
6310 
AUTO_RAM_RECOGNITION
6311 
ON
6312 
}
6313 
# case_sensitive
6314 
# source_file
6315 
small_fifo.v
6316 
1177d4c5f95945d866fbc28febfb18a6
6317 
7
6318 
# internal_option {
6319 
HDL_INITIAL_FANOUT_LIMIT
6320 
OFF
6321 
AUTO_RESOURCE_SHARING
6322 
OFF
6323 
AUTO_RAM_RECOGNITION
6324 
ON
6325 
AUTO_ROM_RECOGNITION
6326 
ON
6327 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
6328 
OFF
6329 
}
6330 
# user_parameter {
6331 
WIDTH
6332 
64
6333 
PARAMETER_SIGNED_DEC
6334 
USR
6335 
MAX_DEPTH_BITS
6336 
8
6337 
PARAMETER_SIGNED_DEC
6338 
USR
6339 
NEARLY_FULL
6340 
255
6341 
PARAMETER_SIGNED_DEC
6342 
DEF
6343 
}
6344 
# hierarchies {
6345 
manager:inst|table:table_Inst|small_fifo:small_fifo_Inst
6346 
}
6347 
# lmf
6348 
d:|altera|72|quartus|lmf|
6349 
d41d8cd98f0b24e980998ecf8427e
6350 
# macro_sequence
6351 
 
6352 
# end
6353 
# entity
6354 
Aging_Timer
6355 
# storage
6356 
db|LB.(40).cnf
6357 
db|LB.(40).cnf
6358 
# logic_option {
6359 
AUTO_RAM_RECOGNITION
6360 
ON
6361 
}
6362 
# case_insensitive
6363 
# source_file
6364 
TABLE|Aging_Timer.vhd
6365 
52bc231b2b716add91c3aff0acfc1769
6366 
4
6367 
# internal_option {
6368 
HDL_INITIAL_FANOUT_LIMIT
6369 
OFF
6370 
AUTO_RESOURCE_SHARING
6371 
OFF
6372 
AUTO_RAM_RECOGNITION
6373 
ON
6374 
AUTO_ROM_RECOGNITION
6375 
ON
6376 
}
6377 
# user_parameter {
6378 
n
6379 
32
6380 
PARAMETER_SIGNED_DEC
6381 
USR
6382 
m
6383 
1025000
6384 
PARAMETER_SIGNED_DEC
6385 
USR
6386 
 constraint(count_out)
6387 
31 downto 0
6388 
PARAMETER_STRING
6389 
USR
6390 
}
6391 
# hierarchies {
6392 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst|Aging_Timer:Aging_Timer_Inst
6393 
}
6394 
# lmf
6395 
d:|altera|72|quartus|lmf|maxplus2.lmf
6396 
9a59d39b0706640b4b2718e8a1ff1f
6397 
# macro_sequence
6398 
 
6399 
# end
6400 
# entity
6401 
ram_256x48
6402 
# storage
6403 
db|LB.(41).cnf
6404 
db|LB.(41).cnf
6405 
# logic_option {
6406 
AUTO_RAM_RECOGNITION
6407 
ON
6408 
}
6409 
# case_insensitive
6410 
# source_file
6411 
TABLE|ram_256x48.vhd
6412 
426f75de89a79a2d63f5e1d26516c465
6413 
4
6414 
# internal_option {
6415 
HDL_INITIAL_FANOUT_LIMIT
6416 
OFF
6417 
AUTO_RESOURCE_SHARING
6418 
OFF
6419 
AUTO_RAM_RECOGNITION
6420 
ON
6421 
AUTO_ROM_RECOGNITION
6422 
ON
6423 
}
6424 
# user_parameter {
6425 
data_width
6426 
56
6427 
PARAMETER_SIGNED_DEC
6428 
USR
6429 
addr_width
6430 
12
6431 
PARAMETER_SIGNED_DEC
6432 
USR
6433 
 constraint(data)
6434 
55 downto 0
6435 
PARAMETER_STRING
6436 
USR
6437 
 constraint(q)
6438 
55 downto 0
6439 
PARAMETER_STRING
6440 
USR
6441 
}
6442 
# lmf
6443 
d:|altera|72|quartus|lmf|maxplus2.lmf
6444 
9a59d39b0706640b4b2718e8a1ff1f
6445 
# macro_sequence
6446 
 
6447 
# end
6448 
# entity
6449 
small_fifo
6450 
# storage
6451 
db|LB.(42).cnf
6452 
db|LB.(42).cnf
6453 
# logic_option {
6454 
AUTO_RAM_RECOGNITION
6455 
ON
6456 
}
6457 
# case_sensitive
6458 
# source_file
6459 
small_fifo.v
6460 
1177d4c5f95945d866fbc28febfb18a6
6461 
7
6462 
# internal_option {
6463 
HDL_INITIAL_FANOUT_LIMIT
6464 
OFF
6465 
AUTO_RESOURCE_SHARING
6466 
OFF
6467 
AUTO_RAM_RECOGNITION
6468 
ON
6469 
AUTO_ROM_RECOGNITION
6470 
ON
6471 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
6472 
OFF
6473 
}
6474 
# user_parameter {
6475 
WIDTH
6476 
12
6477 
PARAMETER_SIGNED_DEC
6478 
USR
6479 
MAX_DEPTH_BITS
6480 
5
6481 
PARAMETER_SIGNED_DEC
6482 
USR
6483 
NEARLY_FULL
6484 
31
6485 
PARAMETER_SIGNED_DEC
6486 
DEF
6487 
}
6488 
# lmf
6489 
d:|altera|72|quartus|lmf|
6490 
d41d8cd98f0b24e980998ecf8427e
6491 
# macro_sequence
6492 
 
6493 
# end
6494 
# entity
6495 
small_fifo
6496 
# storage
6497 
db|LB.(43).cnf
6498 
db|LB.(43).cnf
6499 
# logic_option {
6500 
AUTO_RAM_RECOGNITION
6501 
ON
6502 
}
6503 
# case_sensitive
6504 
# source_file
6505 
small_fifo.v
6506 
1177d4c5f95945d866fbc28febfb18a6
6507 
7
6508 
# internal_option {
6509 
HDL_INITIAL_FANOUT_LIMIT
6510 
OFF
6511 
AUTO_RESOURCE_SHARING
6512 
OFF
6513 
AUTO_RAM_RECOGNITION
6514 
ON
6515 
AUTO_ROM_RECOGNITION
6516 
ON
6517 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
6518 
OFF
6519 
}
6520 
# user_parameter {
6521 
WIDTH
6522 
1
6523 
PARAMETER_SIGNED_DEC
6524 
USR
6525 
MAX_DEPTH_BITS
6526 
2
6527 
PARAMETER_SIGNED_DEC
6528 
USR
6529 
NEARLY_FULL
6530 
3
6531 
PARAMETER_SIGNED_DEC
6532 
DEF
6533 
}
6534 
# hierarchies {
6535 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst|small_fifo:time_command_Inst
6536 
}
6537 
# lmf
6538 
d:|altera|72|quartus|lmf|
6539 
d41d8cd98f0b24e980998ecf8427e
6540 
# macro_sequence
6541 
 
6542 
# end
6543 
# entity
6544 
ram_256x48
6545 
# storage
6546 
db|LB.(44).cnf
6547 
db|LB.(44).cnf
6548 
# logic_option {
6549 
AUTO_RAM_RECOGNITION
6550 
ON
6551 
}
6552 
# case_insensitive
6553 
# source_file
6554 
TABLE|ram_256x48.vhd
6555 
426f75de89a79a2d63f5e1d26516c465
6556 
4
6557 
# internal_option {
6558 
HDL_INITIAL_FANOUT_LIMIT
6559 
OFF
6560 
AUTO_RESOURCE_SHARING
6561 
OFF
6562 
AUTO_RAM_RECOGNITION
6563 
ON
6564 
AUTO_ROM_RECOGNITION
6565 
ON
6566 
}
6567 
# user_parameter {
6568 
data_width
6569 
2
6570 
PARAMETER_SIGNED_DEC
6571 
USR
6572 
addr_width
6573 
12
6574 
PARAMETER_SIGNED_DEC
6575 
USR
6576 
 constraint(data)
6577 
1 downto 0
6578 
PARAMETER_STRING
6579 
USR
6580 
 constraint(q)
6581 
1 downto 0
6582 
PARAMETER_STRING
6583 
USR
6584 
}
6585 
# lmf
6586 
d:|altera|72|quartus|lmf|maxplus2.lmf
6587 
9a59d39b0706640b4b2718e8a1ff1f
6588 
# macro_sequence
6589 
 
6590 
# end
6591 
# entity
6592 
small_fifo
6593 
# storage
6594 
db|LB.(46).cnf
6595 
db|LB.(46).cnf
6596 
# logic_option {
6597 
AUTO_RAM_RECOGNITION
6598 
ON
6599 
}
6600 
# case_sensitive
6601 
# source_file
6602 
small_fifo.v
6603 
1177d4c5f95945d866fbc28febfb18a6
6604 
7
6605 
# internal_option {
6606 
HDL_INITIAL_FANOUT_LIMIT
6607 
OFF
6608 
AUTO_RESOURCE_SHARING
6609 
OFF
6610 
AUTO_RAM_RECOGNITION
6611 
ON
6612 
AUTO_ROM_RECOGNITION
6613 
ON
6614 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
6615 
OFF
6616 
}
6617 
# user_parameter {
6618 
WIDTH
6619 
1
6620 
PARAMETER_SIGNED_DEC
6621 
USR
6622 
MAX_DEPTH_BITS
6623 
5
6624 
PARAMETER_SIGNED_DEC
6625 
USR
6626 
NEARLY_FULL
6627 
31
6628 
PARAMETER_SIGNED_DEC
6629 
DEF
6630 
}
6631 
# hierarchies {
6632 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst|valid_address:valid_address_Inst|small_fifo:read_command_Inst
6633 
}
6634 
# lmf
6635 
d:|altera|72|quartus|lmf|
6636 
d41d8cd98f0b24e980998ecf8427e
6637 
# macro_sequence
6638 
 
6639 
# end
6640 
# entity
6641 
ram_256x48
6642 
# storage
6643 
db|LB.(47).cnf
6644 
db|LB.(47).cnf
6645 
# logic_option {
6646 
AUTO_RAM_RECOGNITION
6647 
ON
6648 
}
6649 
# case_insensitive
6650 
# source_file
6651 
TABLE|ram_256x48.vhd
6652 
426f75de89a79a2d63f5e1d26516c465
6653 
4
6654 
# internal_option {
6655 
HDL_INITIAL_FANOUT_LIMIT
6656 
OFF
6657 
AUTO_RESOURCE_SHARING
6658 
OFF
6659 
AUTO_RAM_RECOGNITION
6660 
ON
6661 
AUTO_ROM_RECOGNITION
6662 
ON
6663 
}
6664 
# user_parameter {
6665 
data_width
6666 
12
6667 
PARAMETER_SIGNED_DEC
6668 
USR
6669 
addr_width
6670 
12
6671 
PARAMETER_SIGNED_DEC
6672 
USR
6673 
 constraint(data)
6674 
11 downto 0
6675 
PARAMETER_STRING
6676 
USR
6677 
 constraint(q)
6678 
11 downto 0
6679 
PARAMETER_STRING
6680 
USR
6681 
}
6682 
# lmf
6683 
d:|altera|72|quartus|lmf|maxplus2.lmf
6684 
9a59d39b0706640b4b2718e8a1ff1f
6685 
# macro_sequence
6686 
 
6687 
# end
6688 
# entity
6689 
altsyncram
6690 
# storage
6691 
db|LB.(48).cnf
6692 
db|LB.(48).cnf
6693 
# case_insensitive
6694 
# source_file
6695 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
6696 
1a8e44bce3df5c9cae2128978e887541
6697 
6
6698 
# user_parameter {
6699 
BYTE_SIZE_BLOCK
6700 
8
6701 
PARAMETER_UNKNOWN
6702 
DEF
6703 
AUTO_CARRY_CHAINS
6704 
ON
6705 
AUTO_CARRY
6706 
USR
6707 
IGNORE_CARRY_BUFFERS
6708 
OFF
6709 
IGNORE_CARRY
6710 
USR
6711 
AUTO_CASCADE_CHAINS
6712 
ON
6713 
AUTO_CASCADE
6714 
USR
6715 
IGNORE_CASCADE_BUFFERS
6716 
OFF
6717 
IGNORE_CASCADE
6718 
USR
6719 
WIDTH_BYTEENA
6720 
1
6721 
PARAMETER_UNKNOWN
6722 
DEF
6723 
OPERATION_MODE
6724 
DUAL_PORT
6725 
PARAMETER_UNKNOWN
6726 
USR
6727 
WIDTH_A
6728 
64
6729 
PARAMETER_UNKNOWN
6730 
USR
6731 
WIDTHAD_A
6732 
3
6733 
PARAMETER_UNKNOWN
6734 
USR
6735 
NUMWORDS_A
6736 
8
6737 
PARAMETER_UNKNOWN
6738 
USR
6739 
OUTDATA_REG_A
6740 
UNREGISTERED
6741 
PARAMETER_UNKNOWN
6742 
DEF
6743 
ADDRESS_ACLR_A
6744 
NONE
6745 
PARAMETER_UNKNOWN
6746 
USR
6747 
OUTDATA_ACLR_A
6748 
NONE
6749 
PARAMETER_UNKNOWN
6750 
DEF
6751 
WRCONTROL_ACLR_A
6752 
NONE
6753 
PARAMETER_UNKNOWN
6754 
USR
6755 
INDATA_ACLR_A
6756 
NONE
6757 
PARAMETER_UNKNOWN
6758 
USR
6759 
BYTEENA_ACLR_A
6760 
NONE
6761 
PARAMETER_UNKNOWN
6762 
DEF
6763 
WIDTH_B
6764 
64
6765 
PARAMETER_UNKNOWN
6766 
USR
6767 
WIDTHAD_B
6768 
3
6769 
PARAMETER_UNKNOWN
6770 
USR
6771 
NUMWORDS_B
6772 
8
6773 
PARAMETER_UNKNOWN
6774 
USR
6775 
INDATA_REG_B
6776 
CLOCK1
6777 
PARAMETER_UNKNOWN
6778 
DEF
6779 
WRCONTROL_WRADDRESS_REG_B
6780 
CLOCK1
6781 
PARAMETER_UNKNOWN
6782 
DEF
6783 
RDCONTROL_REG_B
6784 
CLOCK1
6785 
PARAMETER_UNKNOWN
6786 
DEF
6787 
ADDRESS_REG_B
6788 
CLOCK0
6789 
PARAMETER_UNKNOWN
6790 
USR
6791 
OUTDATA_REG_B
6792 
UNREGISTERED
6793 
PARAMETER_UNKNOWN
6794 
USR
6795 
BYTEENA_REG_B
6796 
CLOCK1
6797 
PARAMETER_UNKNOWN
6798 
DEF
6799 
INDATA_ACLR_B
6800 
NONE
6801 
PARAMETER_UNKNOWN
6802 
DEF
6803 
WRCONTROL_ACLR_B
6804 
NONE
6805 
PARAMETER_UNKNOWN
6806 
DEF
6807 
ADDRESS_ACLR_B
6808 
NONE
6809 
PARAMETER_UNKNOWN
6810 
USR
6811 
OUTDATA_ACLR_B
6812 
NONE
6813 
PARAMETER_UNKNOWN
6814 
USR
6815 
RDCONTROL_ACLR_B
6816 
NONE
6817 
PARAMETER_UNKNOWN
6818 
DEF
6819 
BYTEENA_ACLR_B
6820 
NONE
6821 
PARAMETER_UNKNOWN
6822 
DEF
6823 
WIDTH_BYTEENA_A
6824 
1
6825 
PARAMETER_UNKNOWN
6826 
DEF
6827 
WIDTH_BYTEENA_B
6828 
1
6829 
PARAMETER_UNKNOWN
6830 
DEF
6831 
RAM_BLOCK_TYPE
6832 
AUTO
6833 
PARAMETER_UNKNOWN
6834 
USR
6835 
BYTE_SIZE
6836 
8
6837 
PARAMETER_UNKNOWN
6838 
DEF
6839 
READ_DURING_WRITE_MODE_MIXED_PORTS
6840 
OLD_DATA
6841 
PARAMETER_UNKNOWN
6842 
USR
6843 
READ_DURING_WRITE_MODE_PORT_A
6844 
NEW_DATA_NO_NBE_READ
6845 
PARAMETER_UNKNOWN
6846 
DEF
6847 
READ_DURING_WRITE_MODE_PORT_B
6848 
NEW_DATA_NO_NBE_READ
6849 
PARAMETER_UNKNOWN
6850 
DEF
6851 
INIT_FILE
6852 
UNUSED
6853 
PARAMETER_UNKNOWN
6854 
DEF
6855 
INIT_FILE_LAYOUT
6856 
PORT_A
6857 
PARAMETER_UNKNOWN
6858 
DEF
6859 
MAXIMUM_DEPTH
6860 
 
6861 
PARAMETER_UNKNOWN
6862 
DEF
6863 
CLOCK_ENABLE_INPUT_A
6864 
NORMAL
6865 
PARAMETER_UNKNOWN
6866 
DEF
6867 
CLOCK_ENABLE_INPUT_B
6868 
NORMAL
6869 
PARAMETER_UNKNOWN
6870 
DEF
6871 
CLOCK_ENABLE_OUTPUT_A
6872 
NORMAL
6873 
PARAMETER_UNKNOWN
6874 
DEF
6875 
CLOCK_ENABLE_OUTPUT_B
6876 
NORMAL
6877 
PARAMETER_UNKNOWN
6878 
DEF
6879 
CLOCK_ENABLE_CORE_A
6880 
USE_INPUT_CLKEN
6881 
PARAMETER_UNKNOWN
6882 
DEF
6883 
CLOCK_ENABLE_CORE_B
6884 
USE_INPUT_CLKEN
6885 
PARAMETER_UNKNOWN
6886 
DEF
6887 
ENABLE_ECC
6888 
FALSE
6889 
PARAMETER_UNKNOWN
6890 
DEF
6891 
DEVICE_FAMILY
6892 
Stratix II
6893 
PARAMETER_UNKNOWN
6894 
USR
6895 
CBXI_PARAMETER
6896 
altsyncram_fni1
6897 
PARAMETER_UNKNOWN
6898 
USR
6899 
}
6900 
# used_port {
6901 
wren_a
6902 
-1
6903 
3
6904 
q_b9
6905 
-1
6906 
3
6907 
q_b8
6908 
-1
6909 
3
6910 
q_b7
6911 
-1
6912 
3
6913 
q_b63
6914 
-1
6915 
3
6916 
q_b62
6917 
-1
6918 
3
6919 
q_b61
6920 
-1
6921 
3
6922 
q_b60
6923 
-1
6924 
3
6925 
q_b6
6926 
-1
6927 
3
6928 
q_b59
6929 
-1
6930 
3
6931 
q_b58
6932 
-1
6933 
3
6934 
q_b57
6935 
-1
6936 
3
6937 
q_b56
6938 
-1
6939 
3
6940 
q_b55
6941 
-1
6942 
3
6943 
q_b54
6944 
-1
6945 
3
6946 
q_b53
6947 
-1
6948 
3
6949 
q_b52
6950 
-1
6951 
3
6952 
q_b51
6953 
-1
6954 
3
6955 
q_b50
6956 
-1
6957 
3
6958 
q_b5
6959 
-1
6960 
3
6961 
q_b49
6962 
-1
6963 
3
6964 
q_b48
6965 
-1
6966 
3
6967 
q_b47
6968 
-1
6969 
3
6970 
q_b46
6971 
-1
6972 
3
6973 
q_b45
6974 
-1
6975 
3
6976 
q_b44
6977 
-1
6978 
3
6979 
q_b43
6980 
-1
6981 
3
6982 
q_b42
6983 
-1
6984 
3
6985 
q_b41
6986 
-1
6987 
3
6988 
q_b40
6989 
-1
6990 
3
6991 
q_b4
6992 
-1
6993 
3
6994 
q_b39
6995 
-1
6996 
3
6997 
q_b38
6998 
-1
6999 
3
7000 
q_b37
7001 
-1
7002 
3
7003 
q_b36
7004 
-1
7005 
3
7006 
q_b35
7007 
-1
7008 
3
7009 
q_b34
7010 
-1
7011 
3
7012 
q_b33
7013 
-1
7014 
3
7015 
q_b32
7016 
-1
7017 
3
7018 
q_b31
7019 
-1
7020 
3
7021 
q_b30
7022 
-1
7023 
3
7024 
q_b3
7025 
-1
7026 
3
7027 
q_b29
7028 
-1
7029 
3
7030 
q_b28
7031 
-1
7032 
3
7033 
q_b27
7034 
-1
7035 
3
7036 
q_b26
7037 
-1
7038 
3
7039 
q_b25
7040 
-1
7041 
3
7042 
q_b24
7043 
-1
7044 
3
7045 
q_b23
7046 
-1
7047 
3
7048 
q_b22
7049 
-1
7050 
3
7051 
q_b21
7052 
-1
7053 
3
7054 
q_b20
7055 
-1
7056 
3
7057 
q_b2
7058 
-1
7059 
3
7060 
q_b19
7061 
-1
7062 
3
7063 
q_b18
7064 
-1
7065 
3
7066 
q_b17
7067 
-1
7068 
3
7069 
q_b16
7070 
-1
7071 
3
7072 
q_b15
7073 
-1
7074 
3
7075 
q_b14
7076 
-1
7077 
3
7078 
q_b13
7079 
-1
7080 
3
7081 
q_b12
7082 
-1
7083 
3
7084 
q_b11
7085 
-1
7086 
3
7087 
q_b10
7088 
-1
7089 
3
7090 
q_b1
7091 
-1
7092 
3
7093 
q_b0
7094 
-1
7095 
3
7096 
data_a9
7097 
-1
7098 
3
7099 
data_a8
7100 
-1
7101 
3
7102 
data_a7
7103 
-1
7104 
3
7105 
data_a63
7106 
-1
7107 
3
7108 
data_a62
7109 
-1
7110 
3
7111 
data_a61
7112 
-1
7113 
3
7114 
data_a60
7115 
-1
7116 
3
7117 
data_a6
7118 
-1
7119 
3
7120 
data_a59
7121 
-1
7122 
3
7123 
data_a58
7124 
-1
7125 
3
7126 
data_a57
7127 
-1
7128 
3
7129 
data_a56
7130 
-1
7131 
3
7132 
data_a55
7133 
-1
7134 
3
7135 
data_a54
7136 
-1
7137 
3
7138 
data_a53
7139 
-1
7140 
3
7141 
data_a52
7142 
-1
7143 
3
7144 
data_a51
7145 
-1
7146 
3
7147 
data_a50
7148 
-1
7149 
3
7150 
data_a5
7151 
-1
7152 
3
7153 
data_a49
7154 
-1
7155 
3
7156 
data_a48
7157 
-1
7158 
3
7159 
data_a47
7160 
-1
7161 
3
7162 
data_a46
7163 
-1
7164 
3
7165 
data_a45
7166 
-1
7167 
3
7168 
data_a44
7169 
-1
7170 
3
7171 
data_a43
7172 
-1
7173 
3
7174 
data_a42
7175 
-1
7176 
3
7177 
data_a41
7178 
-1
7179 
3
7180 
data_a40
7181 
-1
7182 
3
7183 
data_a4
7184 
-1
7185 
3
7186 
data_a39
7187 
-1
7188 
3
7189 
data_a38
7190 
-1
7191 
3
7192 
data_a37
7193 
-1
7194 
3
7195 
data_a36
7196 
-1
7197 
3
7198 
data_a35
7199 
-1
7200 
3
7201 
data_a34
7202 
-1
7203 
3
7204 
data_a33
7205 
-1
7206 
3
7207 
data_a32
7208 
-1
7209 
3
7210 
data_a31
7211 
-1
7212 
3
7213 
data_a30
7214 
-1
7215 
3
7216 
data_a3
7217 
-1
7218 
3
7219 
data_a29
7220 
-1
7221 
3
7222 
data_a28
7223 
-1
7224 
3
7225 
data_a27
7226 
-1
7227 
3
7228 
data_a26
7229 
-1
7230 
3
7231 
data_a25
7232 
-1
7233 
3
7234 
data_a24
7235 
-1
7236 
3
7237 
data_a23
7238 
-1
7239 
3
7240 
data_a22
7241 
-1
7242 
3
7243 
data_a21
7244 
-1
7245 
3
7246 
data_a20
7247 
-1
7248 
3
7249 
data_a2
7250 
-1
7251 
3
7252 
data_a19
7253 
-1
7254 
3
7255 
data_a18
7256 
-1
7257 
3
7258 
data_a17
7259 
-1
7260 
3
7261 
data_a16
7262 
-1
7263 
3
7264 
data_a15
7265 
-1
7266 
3
7267 
data_a14
7268 
-1
7269 
3
7270 
data_a13
7271 
-1
7272 
3
7273 
data_a12
7274 
-1
7275 
3
7276 
data_a11
7277 
-1
7278 
3
7279 
data_a10
7280 
-1
7281 
3
7282 
data_a1
7283 
-1
7284 
3
7285 
data_a0
7286 
-1
7287 
3
7288 
clock0
7289 
-1
7290 
3
7291 
address_b2
7292 
-1
7293 
3
7294 
address_b1
7295 
-1
7296 
3
7297 
address_b0
7298 
-1
7299 
3
7300 
address_a2
7301 
-1
7302 
3
7303 
address_a1
7304 
-1
7305 
3
7306 
address_a0
7307 
-1
7308 
3
7309 
}
7310 
# include_file {
7311 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
7312 
c22bfd353214c01495b560fc34e47d79
7313 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
7314 
2263a3bdfffeb150af977ee13902f70
7315 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
7316 
bd0e2f5e01c1bd360461dceb53d48
7317 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
7318 
f39123b8592ab2dac019716e56b3ec18
7319 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
7320 
60d229340bc3c24acb0a137b4849830
7321 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
7322 
d4e3a69a331d3a99d3281790d99a1ebd
7323 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
7324 
e66a83eccf6717bed97c99d891ad085
7325 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
7326 
99d442b5b66c88db4daf94d99c6e4e77
7327 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
7328 
74e08939f96a7ea8e7a4d59a5b01fe7
7329 
}
7330 
# lmf
7331 
d:|altera|72|quartus|lmf|
7332 
d41d8cd98f0b24e980998ecf8427e
7333 
# macro_sequence
7334 
 
7335 
# end
7336 
# entity
7337 
altsyncram_fni1
7338 
# storage
7339 
db|LB.(49).cnf
7340 
db|LB.(49).cnf
7341 
# case_insensitive
7342 
# source_file
7343 
db|altsyncram_fni1.tdf
7344 
a23ebd2e4c5798d782e6f157024276b
7345 
6
7346 
# used_port {
7347 
wren_a
7348 
-1
7349 
3
7350 
q_b9
7351 
-1
7352 
3
7353 
q_b8
7354 
-1
7355 
3
7356 
q_b7
7357 
-1
7358 
3
7359 
q_b63
7360 
-1
7361 
3
7362 
q_b62
7363 
-1
7364 
3
7365 
q_b61
7366 
-1
7367 
3
7368 
q_b60
7369 
-1
7370 
3
7371 
q_b6
7372 
-1
7373 
3
7374 
q_b59
7375 
-1
7376 
3
7377 
q_b58
7378 
-1
7379 
3
7380 
q_b57
7381 
-1
7382 
3
7383 
q_b56
7384 
-1
7385 
3
7386 
q_b55
7387 
-1
7388 
3
7389 
q_b54
7390 
-1
7391 
3
7392 
q_b53
7393 
-1
7394 
3
7395 
q_b52
7396 
-1
7397 
3
7398 
q_b51
7399 
-1
7400 
3
7401 
q_b50
7402 
-1
7403 
3
7404 
q_b5
7405 
-1
7406 
3
7407 
q_b49
7408 
-1
7409 
3
7410 
q_b48
7411 
-1
7412 
3
7413 
q_b47
7414 
-1
7415 
3
7416 
q_b46
7417 
-1
7418 
3
7419 
q_b45
7420 
-1
7421 
3
7422 
q_b44
7423 
-1
7424 
3
7425 
q_b43
7426 
-1
7427 
3
7428 
q_b42
7429 
-1
7430 
3
7431 
q_b41
7432 
-1
7433 
3
7434 
q_b40
7435 
-1
7436 
3
7437 
q_b4
7438 
-1
7439 
3
7440 
q_b39
7441 
-1
7442 
3
7443 
q_b38
7444 
-1
7445 
3
7446 
q_b37
7447 
-1
7448 
3
7449 
q_b36
7450 
-1
7451 
3
7452 
q_b35
7453 
-1
7454 
3
7455 
q_b34
7456 
-1
7457 
3
7458 
q_b33
7459 
-1
7460 
3
7461 
q_b32
7462 
-1
7463 
3
7464 
q_b31
7465 
-1
7466 
3
7467 
q_b30
7468 
-1
7469 
3
7470 
q_b3
7471 
-1
7472 
3
7473 
q_b29
7474 
-1
7475 
3
7476 
q_b28
7477 
-1
7478 
3
7479 
q_b27
7480 
-1
7481 
3
7482 
q_b26
7483 
-1
7484 
3
7485 
q_b25
7486 
-1
7487 
3
7488 
q_b24
7489 
-1
7490 
3
7491 
q_b23
7492 
-1
7493 
3
7494 
q_b22
7495 
-1
7496 
3
7497 
q_b21
7498 
-1
7499 
3
7500 
q_b20
7501 
-1
7502 
3
7503 
q_b2
7504 
-1
7505 
3
7506 
q_b19
7507 
-1
7508 
3
7509 
q_b18
7510 
-1
7511 
3
7512 
q_b17
7513 
-1
7514 
3
7515 
q_b16
7516 
-1
7517 
3
7518 
q_b15
7519 
-1
7520 
3
7521 
q_b14
7522 
-1
7523 
3
7524 
q_b13
7525 
-1
7526 
3
7527 
q_b12
7528 
-1
7529 
3
7530 
q_b11
7531 
-1
7532 
3
7533 
q_b10
7534 
-1
7535 
3
7536 
q_b1
7537 
-1
7538 
3
7539 
q_b0
7540 
-1
7541 
3
7542 
data_a9
7543 
-1
7544 
3
7545 
data_a8
7546 
-1
7547 
3
7548 
data_a7
7549 
-1
7550 
3
7551 
data_a63
7552 
-1
7553 
3
7554 
data_a62
7555 
-1
7556 
3
7557 
data_a61
7558 
-1
7559 
3
7560 
data_a60
7561 
-1
7562 
3
7563 
data_a6
7564 
-1
7565 
3
7566 
data_a59
7567 
-1
7568 
3
7569 
data_a58
7570 
-1
7571 
3
7572 
data_a57
7573 
-1
7574 
3
7575 
data_a56
7576 
-1
7577 
3
7578 
data_a55
7579 
-1
7580 
3
7581 
data_a54
7582 
-1
7583 
3
7584 
data_a53
7585 
-1
7586 
3
7587 
data_a52
7588 
-1
7589 
3
7590 
data_a51
7591 
-1
7592 
3
7593 
data_a50
7594 
-1
7595 
3
7596 
data_a5
7597 
-1
7598 
3
7599 
data_a49
7600 
-1
7601 
3
7602 
data_a48
7603 
-1
7604 
3
7605 
data_a47
7606 
-1
7607 
3
7608 
data_a46
7609 
-1
7610 
3
7611 
data_a45
7612 
-1
7613 
3
7614 
data_a44
7615 
-1
7616 
3
7617 
data_a43
7618 
-1
7619 
3
7620 
data_a42
7621 
-1
7622 
3
7623 
data_a41
7624 
-1
7625 
3
7626 
data_a40
7627 
-1
7628 
3
7629 
data_a4
7630 
-1
7631 
3
7632 
data_a39
7633 
-1
7634 
3
7635 
data_a38
7636 
-1
7637 
3
7638 
data_a37
7639 
-1
7640 
3
7641 
data_a36
7642 
-1
7643 
3
7644 
data_a35
7645 
-1
7646 
3
7647 
data_a34
7648 
-1
7649 
3
7650 
data_a33
7651 
-1
7652 
3
7653 
data_a32
7654 
-1
7655 
3
7656 
data_a31
7657 
-1
7658 
3
7659 
data_a30
7660 
-1
7661 
3
7662 
data_a3
7663 
-1
7664 
3
7665 
data_a29
7666 
-1
7667 
3
7668 
data_a28
7669 
-1
7670 
3
7671 
data_a27
7672 
-1
7673 
3
7674 
data_a26
7675 
-1
7676 
3
7677 
data_a25
7678 
-1
7679 
3
7680 
data_a24
7681 
-1
7682 
3
7683 
data_a23
7684 
-1
7685 
3
7686 
data_a22
7687 
-1
7688 
3
7689 
data_a21
7690 
-1
7691 
3
7692 
data_a20
7693 
-1
7694 
3
7695 
data_a2
7696 
-1
7697 
3
7698 
data_a19
7699 
-1
7700 
3
7701 
data_a18
7702 
-1
7703 
3
7704 
data_a17
7705 
-1
7706 
3
7707 
data_a16
7708 
-1
7709 
3
7710 
data_a15
7711 
-1
7712 
3
7713 
data_a14
7714 
-1
7715 
3
7716 
data_a13
7717 
-1
7718 
3
7719 
data_a12
7720 
-1
7721 
3
7722 
data_a11
7723 
-1
7724 
3
7725 
data_a10
7726 
-1
7727 
3
7728 
data_a1
7729 
-1
7730 
3
7731 
data_a0
7732 
-1
7733 
3
7734 
clock0
7735 
-1
7736 
3
7737 
address_b2
7738 
-1
7739 
3
7740 
address_b1
7741 
-1
7742 
3
7743 
address_b0
7744 
-1
7745 
3
7746 
address_a2
7747 
-1
7748 
3
7749 
address_a1
7750 
-1
7751 
3
7752 
address_a0
7753 
-1
7754 
3
7755 
}
7756 
# lmf
7757 
d:|altera|72|quartus|lmf|
7758 
d41d8cd98f0b24e980998ecf8427e
7759 
# macro_sequence
7760 
 
7761 
# end
7762 
# entity
7763 
altsyncram
7764 
# storage
7765 
db|LB.(50).cnf
7766 
db|LB.(50).cnf
7767 
# case_insensitive
7768 
# source_file
7769 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
7770 
1a8e44bce3df5c9cae2128978e887541
7771 
6
7772 
# user_parameter {
7773 
BYTE_SIZE_BLOCK
7774 
8
7775 
PARAMETER_UNKNOWN
7776 
DEF
7777 
AUTO_CARRY_CHAINS
7778 
ON
7779 
AUTO_CARRY
7780 
USR
7781 
IGNORE_CARRY_BUFFERS
7782 
OFF
7783 
IGNORE_CARRY
7784 
USR
7785 
AUTO_CASCADE_CHAINS
7786 
ON
7787 
AUTO_CASCADE
7788 
USR
7789 
IGNORE_CASCADE_BUFFERS
7790 
OFF
7791 
IGNORE_CASCADE
7792 
USR
7793 
WIDTH_BYTEENA
7794 
1
7795 
PARAMETER_UNKNOWN
7796 
DEF
7797 
OPERATION_MODE
7798 
DUAL_PORT
7799 
PARAMETER_UNKNOWN
7800 
USR
7801 
WIDTH_A
7802 
56
7803 
PARAMETER_UNKNOWN
7804 
USR
7805 
WIDTHAD_A
7806 
8
7807 
PARAMETER_UNKNOWN
7808 
USR
7809 
NUMWORDS_A
7810 
256
7811 
PARAMETER_UNKNOWN
7812 
USR
7813 
OUTDATA_REG_A
7814 
UNREGISTERED
7815 
PARAMETER_UNKNOWN
7816 
DEF
7817 
ADDRESS_ACLR_A
7818 
NONE
7819 
PARAMETER_UNKNOWN
7820 
USR
7821 
OUTDATA_ACLR_A
7822 
NONE
7823 
PARAMETER_UNKNOWN
7824 
DEF
7825 
WRCONTROL_ACLR_A
7826 
NONE
7827 
PARAMETER_UNKNOWN
7828 
USR
7829 
INDATA_ACLR_A
7830 
NONE
7831 
PARAMETER_UNKNOWN
7832 
USR
7833 
BYTEENA_ACLR_A
7834 
NONE
7835 
PARAMETER_UNKNOWN
7836 
DEF
7837 
WIDTH_B
7838 
56
7839 
PARAMETER_UNKNOWN
7840 
USR
7841 
WIDTHAD_B
7842 
8
7843 
PARAMETER_UNKNOWN
7844 
USR
7845 
NUMWORDS_B
7846 
256
7847 
PARAMETER_UNKNOWN
7848 
USR
7849 
INDATA_REG_B
7850 
CLOCK1
7851 
PARAMETER_UNKNOWN
7852 
DEF
7853 
WRCONTROL_WRADDRESS_REG_B
7854 
CLOCK1
7855 
PARAMETER_UNKNOWN
7856 
DEF
7857 
RDCONTROL_REG_B
7858 
CLOCK1
7859 
PARAMETER_UNKNOWN
7860 
DEF
7861 
ADDRESS_REG_B
7862 
CLOCK0
7863 
PARAMETER_UNKNOWN
7864 
USR
7865 
OUTDATA_REG_B
7866 
UNREGISTERED
7867 
PARAMETER_UNKNOWN
7868 
USR
7869 
BYTEENA_REG_B
7870 
CLOCK1
7871 
PARAMETER_UNKNOWN
7872 
DEF
7873 
INDATA_ACLR_B
7874 
NONE
7875 
PARAMETER_UNKNOWN
7876 
DEF
7877 
WRCONTROL_ACLR_B
7878 
NONE
7879 
PARAMETER_UNKNOWN
7880 
DEF
7881 
ADDRESS_ACLR_B
7882 
NONE
7883 
PARAMETER_UNKNOWN
7884 
USR
7885 
OUTDATA_ACLR_B
7886 
NONE
7887 
PARAMETER_UNKNOWN
7888 
USR
7889 
RDCONTROL_ACLR_B
7890 
NONE
7891 
PARAMETER_UNKNOWN
7892 
DEF
7893 
BYTEENA_ACLR_B
7894 
NONE
7895 
PARAMETER_UNKNOWN
7896 
DEF
7897 
WIDTH_BYTEENA_A
7898 
1
7899 
PARAMETER_UNKNOWN
7900 
DEF
7901 
WIDTH_BYTEENA_B
7902 
1
7903 
PARAMETER_UNKNOWN
7904 
DEF
7905 
RAM_BLOCK_TYPE
7906 
AUTO
7907 
PARAMETER_UNKNOWN
7908 
USR
7909 
BYTE_SIZE
7910 
8
7911 
PARAMETER_UNKNOWN
7912 
DEF
7913 
READ_DURING_WRITE_MODE_MIXED_PORTS
7914 
OLD_DATA
7915 
PARAMETER_UNKNOWN
7916 
USR
7917 
READ_DURING_WRITE_MODE_PORT_A
7918 
NEW_DATA_NO_NBE_READ
7919 
PARAMETER_UNKNOWN
7920 
DEF
7921 
READ_DURING_WRITE_MODE_PORT_B
7922 
NEW_DATA_NO_NBE_READ
7923 
PARAMETER_UNKNOWN
7924 
DEF
7925 
INIT_FILE
7926 
UNUSED
7927 
PARAMETER_UNKNOWN
7928 
DEF
7929 
INIT_FILE_LAYOUT
7930 
PORT_A
7931 
PARAMETER_UNKNOWN
7932 
DEF
7933 
MAXIMUM_DEPTH
7934 
 
7935 
PARAMETER_UNKNOWN
7936 
DEF
7937 
CLOCK_ENABLE_INPUT_A
7938 
NORMAL
7939 
PARAMETER_UNKNOWN
7940 
DEF
7941 
CLOCK_ENABLE_INPUT_B
7942 
NORMAL
7943 
PARAMETER_UNKNOWN
7944 
DEF
7945 
CLOCK_ENABLE_OUTPUT_A
7946 
NORMAL
7947 
PARAMETER_UNKNOWN
7948 
DEF
7949 
CLOCK_ENABLE_OUTPUT_B
7950 
NORMAL
7951 
PARAMETER_UNKNOWN
7952 
DEF
7953 
CLOCK_ENABLE_CORE_A
7954 
USE_INPUT_CLKEN
7955 
PARAMETER_UNKNOWN
7956 
DEF
7957 
CLOCK_ENABLE_CORE_B
7958 
USE_INPUT_CLKEN
7959 
PARAMETER_UNKNOWN
7960 
DEF
7961 
ENABLE_ECC
7962 
FALSE
7963 
PARAMETER_UNKNOWN
7964 
DEF
7965 
DEVICE_FAMILY
7966 
Stratix II
7967 
PARAMETER_UNKNOWN
7968 
USR
7969 
CBXI_PARAMETER
7970 
altsyncram_5ui1
7971 
PARAMETER_UNKNOWN
7972 
USR
7973 
}
7974 
# used_port {
7975 
wren_a
7976 
-1
7977 
3
7978 
q_b9
7979 
-1
7980 
3
7981 
q_b8
7982 
-1
7983 
3
7984 
q_b7
7985 
-1
7986 
3
7987 
q_b6
7988 
-1
7989 
3
7990 
q_b55
7991 
-1
7992 
3
7993 
q_b54
7994 
-1
7995 
3
7996 
q_b53
7997 
-1
7998 
3
7999 
q_b52
8000 
-1
8001 
3
8002 
q_b51
8003 
-1
8004 
3
8005 
q_b50
8006 
-1
8007 
3
8008 
q_b5
8009 
-1
8010 
3
8011 
q_b49
8012 
-1
8013 
3
8014 
q_b48
8015 
-1
8016 
3
8017 
q_b47
8018 
-1
8019 
3
8020 
q_b46
8021 
-1
8022 
3
8023 
q_b45
8024 
-1
8025 
3
8026 
q_b44
8027 
-1
8028 
3
8029 
q_b43
8030 
-1
8031 
3
8032 
q_b42
8033 
-1
8034 
3
8035 
q_b41
8036 
-1
8037 
3
8038 
q_b40
8039 
-1
8040 
3
8041 
q_b4
8042 
-1
8043 
3
8044 
q_b39
8045 
-1
8046 
3
8047 
q_b38
8048 
-1
8049 
3
8050 
q_b37
8051 
-1
8052 
3
8053 
q_b36
8054 
-1
8055 
3
8056 
q_b35
8057 
-1
8058 
3
8059 
q_b34
8060 
-1
8061 
3
8062 
q_b33
8063 
-1
8064 
3
8065 
q_b32
8066 
-1
8067 
3
8068 
q_b31
8069 
-1
8070 
3
8071 
q_b30
8072 
-1
8073 
3
8074 
q_b3
8075 
-1
8076 
3
8077 
q_b29
8078 
-1
8079 
3
8080 
q_b28
8081 
-1
8082 
3
8083 
q_b27
8084 
-1
8085 
3
8086 
q_b26
8087 
-1
8088 
3
8089 
q_b25
8090 
-1
8091 
3
8092 
q_b24
8093 
-1
8094 
3
8095 
q_b23
8096 
-1
8097 
3
8098 
q_b22
8099 
-1
8100 
3
8101 
q_b21
8102 
-1
8103 
3
8104 
q_b20
8105 
-1
8106 
3
8107 
q_b2
8108 
-1
8109 
3
8110 
q_b19
8111 
-1
8112 
3
8113 
q_b18
8114 
-1
8115 
3
8116 
q_b17
8117 
-1
8118 
3
8119 
q_b16
8120 
-1
8121 
3
8122 
q_b15
8123 
-1
8124 
3
8125 
q_b14
8126 
-1
8127 
3
8128 
q_b13
8129 
-1
8130 
3
8131 
q_b12
8132 
-1
8133 
3
8134 
q_b11
8135 
-1
8136 
3
8137 
q_b10
8138 
-1
8139 
3
8140 
q_b1
8141 
-1
8142 
3
8143 
q_b0
8144 
-1
8145 
3
8146 
data_a9
8147 
-1
8148 
3
8149 
data_a8
8150 
-1
8151 
3
8152 
data_a7
8153 
-1
8154 
3
8155 
data_a6
8156 
-1
8157 
3
8158 
data_a55
8159 
-1
8160 
3
8161 
data_a54
8162 
-1
8163 
3
8164 
data_a53
8165 
-1
8166 
3
8167 
data_a52
8168 
-1
8169 
3
8170 
data_a51
8171 
-1
8172 
3
8173 
data_a50
8174 
-1
8175 
3
8176 
data_a5
8177 
-1
8178 
3
8179 
data_a49
8180 
-1
8181 
3
8182 
data_a48
8183 
-1
8184 
3
8185 
data_a47
8186 
-1
8187 
3
8188 
data_a46
8189 
-1
8190 
3
8191 
data_a45
8192 
-1
8193 
3
8194 
data_a44
8195 
-1
8196 
3
8197 
data_a43
8198 
-1
8199 
3
8200 
data_a42
8201 
-1
8202 
3
8203 
data_a41
8204 
-1
8205 
3
8206 
data_a40
8207 
-1
8208 
3
8209 
data_a4
8210 
-1
8211 
3
8212 
data_a39
8213 
-1
8214 
3
8215 
data_a38
8216 
-1
8217 
3
8218 
data_a37
8219 
-1
8220 
3
8221 
data_a36
8222 
-1
8223 
3
8224 
data_a35
8225 
-1
8226 
3
8227 
data_a34
8228 
-1
8229 
3
8230 
data_a33
8231 
-1
8232 
3
8233 
data_a32
8234 
-1
8235 
3
8236 
data_a31
8237 
-1
8238 
3
8239 
data_a30
8240 
-1
8241 
3
8242 
data_a3
8243 
-1
8244 
3
8245 
data_a29
8246 
-1
8247 
3
8248 
data_a28
8249 
-1
8250 
3
8251 
data_a27
8252 
-1
8253 
3
8254 
data_a26
8255 
-1
8256 
3
8257 
data_a25
8258 
-1
8259 
3
8260 
data_a24
8261 
-1
8262 
3
8263 
data_a23
8264 
-1
8265 
3
8266 
data_a22
8267 
-1
8268 
3
8269 
data_a21
8270 
-1
8271 
3
8272 
data_a20
8273 
-1
8274 
3
8275 
data_a2
8276 
-1
8277 
3
8278 
data_a19
8279 
-1
8280 
3
8281 
data_a18
8282 
-1
8283 
3
8284 
data_a17
8285 
-1
8286 
3
8287 
data_a16
8288 
-1
8289 
3
8290 
data_a15
8291 
-1
8292 
3
8293 
data_a14
8294 
-1
8295 
3
8296 
data_a13
8297 
-1
8298 
3
8299 
data_a12
8300 
-1
8301 
3
8302 
data_a11
8303 
-1
8304 
3
8305 
data_a10
8306 
-1
8307 
3
8308 
data_a1
8309 
-1
8310 
3
8311 
data_a0
8312 
-1
8313 
3
8314 
clock0
8315 
-1
8316 
3
8317 
address_b7
8318 
-1
8319 
3
8320 
address_b6
8321 
-1
8322 
3
8323 
address_b5
8324 
-1
8325 
3
8326 
address_b4
8327 
-1
8328 
3
8329 
address_b3
8330 
-1
8331 
3
8332 
address_b2
8333 
-1
8334 
3
8335 
address_b1
8336 
-1
8337 
3
8338 
address_b0
8339 
-1
8340 
3
8341 
address_a7
8342 
-1
8343 
3
8344 
address_a6
8345 
-1
8346 
3
8347 
address_a5
8348 
-1
8349 
3
8350 
address_a4
8351 
-1
8352 
3
8353 
address_a3
8354 
-1
8355 
3
8356 
address_a2
8357 
-1
8358 
3
8359 
address_a1
8360 
-1
8361 
3
8362 
address_a0
8363 
-1
8364 
3
8365 
}
8366 
# include_file {
8367 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
8368 
c22bfd353214c01495b560fc34e47d79
8369 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
8370 
2263a3bdfffeb150af977ee13902f70
8371 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
8372 
bd0e2f5e01c1bd360461dceb53d48
8373 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
8374 
f39123b8592ab2dac019716e56b3ec18
8375 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
8376 
60d229340bc3c24acb0a137b4849830
8377 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
8378 
d4e3a69a331d3a99d3281790d99a1ebd
8379 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
8380 
e66a83eccf6717bed97c99d891ad085
8381 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
8382 
99d442b5b66c88db4daf94d99c6e4e77
8383 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
8384 
74e08939f96a7ea8e7a4d59a5b01fe7
8385 
}
8386 
# lmf
8387 
d:|altera|72|quartus|lmf|
8388 
d41d8cd98f0b24e980998ecf8427e
8389 
# macro_sequence
8390 
 
8391 
# end
8392 
# entity
8393 
altsyncram_5ui1
8394 
# storage
8395 
db|LB.(51).cnf
8396 
db|LB.(51).cnf
8397 
# case_insensitive
8398 
# source_file
8399 
db|altsyncram_5ui1.tdf
8400 
7b52421cd7467229b1122c0e32c2d19
8401 
6
8402 
# used_port {
8403 
wren_a
8404 
-1
8405 
3
8406 
q_b9
8407 
-1
8408 
3
8409 
q_b8
8410 
-1
8411 
3
8412 
q_b7
8413 
-1
8414 
3
8415 
q_b6
8416 
-1
8417 
3
8418 
q_b55
8419 
-1
8420 
3
8421 
q_b54
8422 
-1
8423 
3
8424 
q_b53
8425 
-1
8426 
3
8427 
q_b52
8428 
-1
8429 
3
8430 
q_b51
8431 
-1
8432 
3
8433 
q_b50
8434 
-1
8435 
3
8436 
q_b5
8437 
-1
8438 
3
8439 
q_b49
8440 
-1
8441 
3
8442 
q_b48
8443 
-1
8444 
3
8445 
q_b47
8446 
-1
8447 
3
8448 
q_b46
8449 
-1
8450 
3
8451 
q_b45
8452 
-1
8453 
3
8454 
q_b44
8455 
-1
8456 
3
8457 
q_b43
8458 
-1
8459 
3
8460 
q_b42
8461 
-1
8462 
3
8463 
q_b41
8464 
-1
8465 
3
8466 
q_b40
8467 
-1
8468 
3
8469 
q_b4
8470 
-1
8471 
3
8472 
q_b39
8473 
-1
8474 
3
8475 
q_b38
8476 
-1
8477 
3
8478 
q_b37
8479 
-1
8480 
3
8481 
q_b36
8482 
-1
8483 
3
8484 
q_b35
8485 
-1
8486 
3
8487 
q_b34
8488 
-1
8489 
3
8490 
q_b33
8491 
-1
8492 
3
8493 
q_b32
8494 
-1
8495 
3
8496 
q_b31
8497 
-1
8498 
3
8499 
q_b30
8500 
-1
8501 
3
8502 
q_b3
8503 
-1
8504 
3
8505 
q_b29
8506 
-1
8507 
3
8508 
q_b28
8509 
-1
8510 
3
8511 
q_b27
8512 
-1
8513 
3
8514 
q_b26
8515 
-1
8516 
3
8517 
q_b25
8518 
-1
8519 
3
8520 
q_b24
8521 
-1
8522 
3
8523 
q_b23
8524 
-1
8525 
3
8526 
q_b22
8527 
-1
8528 
3
8529 
q_b21
8530 
-1
8531 
3
8532 
q_b20
8533 
-1
8534 
3
8535 
q_b2
8536 
-1
8537 
3
8538 
q_b19
8539 
-1
8540 
3
8541 
q_b18
8542 
-1
8543 
3
8544 
q_b17
8545 
-1
8546 
3
8547 
q_b16
8548 
-1
8549 
3
8550 
q_b15
8551 
-1
8552 
3
8553 
q_b14
8554 
-1
8555 
3
8556 
q_b13
8557 
-1
8558 
3
8559 
q_b12
8560 
-1
8561 
3
8562 
q_b11
8563 
-1
8564 
3
8565 
q_b10
8566 
-1
8567 
3
8568 
q_b1
8569 
-1
8570 
3
8571 
q_b0
8572 
-1
8573 
3
8574 
data_a9
8575 
-1
8576 
3
8577 
data_a8
8578 
-1
8579 
3
8580 
data_a7
8581 
-1
8582 
3
8583 
data_a6
8584 
-1
8585 
3
8586 
data_a55
8587 
-1
8588 
3
8589 
data_a54
8590 
-1
8591 
3
8592 
data_a53
8593 
-1
8594 
3
8595 
data_a52
8596 
-1
8597 
3
8598 
data_a51
8599 
-1
8600 
3
8601 
data_a50
8602 
-1
8603 
3
8604 
data_a5
8605 
-1
8606 
3
8607 
data_a49
8608 
-1
8609 
3
8610 
data_a48
8611 
-1
8612 
3
8613 
data_a47
8614 
-1
8615 
3
8616 
data_a46
8617 
-1
8618 
3
8619 
data_a45
8620 
-1
8621 
3
8622 
data_a44
8623 
-1
8624 
3
8625 
data_a43
8626 
-1
8627 
3
8628 
data_a42
8629 
-1
8630 
3
8631 
data_a41
8632 
-1
8633 
3
8634 
data_a40
8635 
-1
8636 
3
8637 
data_a4
8638 
-1
8639 
3
8640 
data_a39
8641 
-1
8642 
3
8643 
data_a38
8644 
-1
8645 
3
8646 
data_a37
8647 
-1
8648 
3
8649 
data_a36
8650 
-1
8651 
3
8652 
data_a35
8653 
-1
8654 
3
8655 
data_a34
8656 
-1
8657 
3
8658 
data_a33
8659 
-1
8660 
3
8661 
data_a32
8662 
-1
8663 
3
8664 
data_a31
8665 
-1
8666 
3
8667 
data_a30
8668 
-1
8669 
3
8670 
data_a3
8671 
-1
8672 
3
8673 
data_a29
8674 
-1
8675 
3
8676 
data_a28
8677 
-1
8678 
3
8679 
data_a27
8680 
-1
8681 
3
8682 
data_a26
8683 
-1
8684 
3
8685 
data_a25
8686 
-1
8687 
3
8688 
data_a24
8689 
-1
8690 
3
8691 
data_a23
8692 
-1
8693 
3
8694 
data_a22
8695 
-1
8696 
3
8697 
data_a21
8698 
-1
8699 
3
8700 
data_a20
8701 
-1
8702 
3
8703 
data_a2
8704 
-1
8705 
3
8706 
data_a19
8707 
-1
8708 
3
8709 
data_a18
8710 
-1
8711 
3
8712 
data_a17
8713 
-1
8714 
3
8715 
data_a16
8716 
-1
8717 
3
8718 
data_a15
8719 
-1
8720 
3
8721 
data_a14
8722 
-1
8723 
3
8724 
data_a13
8725 
-1
8726 
3
8727 
data_a12
8728 
-1
8729 
3
8730 
data_a11
8731 
-1
8732 
3
8733 
data_a10
8734 
-1
8735 
3
8736 
data_a1
8737 
-1
8738 
3
8739 
data_a0
8740 
-1
8741 
3
8742 
clock0
8743 
-1
8744 
3
8745 
address_b7
8746 
-1
8747 
3
8748 
address_b6
8749 
-1
8750 
3
8751 
address_b5
8752 
-1
8753 
3
8754 
address_b4
8755 
-1
8756 
3
8757 
address_b3
8758 
-1
8759 
3
8760 
address_b2
8761 
-1
8762 
3
8763 
address_b1
8764 
-1
8765 
3
8766 
address_b0
8767 
-1
8768 
3
8769 
address_a7
8770 
-1
8771 
3
8772 
address_a6
8773 
-1
8774 
3
8775 
address_a5
8776 
-1
8777 
3
8778 
address_a4
8779 
-1
8780 
3
8781 
address_a3
8782 
-1
8783 
3
8784 
address_a2
8785 
-1
8786 
3
8787 
address_a1
8788 
-1
8789 
3
8790 
address_a0
8791 
-1
8792 
3
8793 
}
8794 
# lmf
8795 
d:|altera|72|quartus|lmf|
8796 
d41d8cd98f0b24e980998ecf8427e
8797 
# macro_sequence
8798 
 
8799 
# end
8800 
# entity
8801 
altsyncram
8802 
# storage
8803 
db|LB.(52).cnf
8804 
db|LB.(52).cnf
8805 
# case_insensitive
8806 
# source_file
8807 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
8808 
1a8e44bce3df5c9cae2128978e887541
8809 
6
8810 
# user_parameter {
8811 
BYTE_SIZE_BLOCK
8812 
8
8813 
PARAMETER_UNKNOWN
8814 
DEF
8815 
AUTO_CARRY_CHAINS
8816 
ON
8817 
AUTO_CARRY
8818 
USR
8819 
IGNORE_CARRY_BUFFERS
8820 
OFF
8821 
IGNORE_CARRY
8822 
USR
8823 
AUTO_CASCADE_CHAINS
8824 
ON
8825 
AUTO_CASCADE
8826 
USR
8827 
IGNORE_CASCADE_BUFFERS
8828 
OFF
8829 
IGNORE_CASCADE
8830 
USR
8831 
WIDTH_BYTEENA
8832 
1
8833 
PARAMETER_UNKNOWN
8834 
DEF
8835 
OPERATION_MODE
8836 
DUAL_PORT
8837 
PARAMETER_UNKNOWN
8838 
USR
8839 
WIDTH_A
8840 
56
8841 
PARAMETER_UNKNOWN
8842 
USR
8843 
WIDTHAD_A
8844 
12
8845 
PARAMETER_UNKNOWN
8846 
USR
8847 
NUMWORDS_A
8848 
4096
8849 
PARAMETER_UNKNOWN
8850 
USR
8851 
OUTDATA_REG_A
8852 
UNREGISTERED
8853 
PARAMETER_UNKNOWN
8854 
DEF
8855 
ADDRESS_ACLR_A
8856 
NONE
8857 
PARAMETER_UNKNOWN
8858 
USR
8859 
OUTDATA_ACLR_A
8860 
NONE
8861 
PARAMETER_UNKNOWN
8862 
DEF
8863 
WRCONTROL_ACLR_A
8864 
NONE
8865 
PARAMETER_UNKNOWN
8866 
USR
8867 
INDATA_ACLR_A
8868 
NONE
8869 
PARAMETER_UNKNOWN
8870 
USR
8871 
BYTEENA_ACLR_A
8872 
NONE
8873 
PARAMETER_UNKNOWN
8874 
DEF
8875 
WIDTH_B
8876 
56
8877 
PARAMETER_UNKNOWN
8878 
USR
8879 
WIDTHAD_B
8880 
12
8881 
PARAMETER_UNKNOWN
8882 
USR
8883 
NUMWORDS_B
8884 
4096
8885 
PARAMETER_UNKNOWN
8886 
USR
8887 
INDATA_REG_B
8888 
CLOCK1
8889 
PARAMETER_UNKNOWN
8890 
DEF
8891 
WRCONTROL_WRADDRESS_REG_B
8892 
CLOCK1
8893 
PARAMETER_UNKNOWN
8894 
DEF
8895 
RDCONTROL_REG_B
8896 
CLOCK1
8897 
PARAMETER_UNKNOWN
8898 
DEF
8899 
ADDRESS_REG_B
8900 
CLOCK0
8901 
PARAMETER_UNKNOWN
8902 
USR
8903 
OUTDATA_REG_B
8904 
UNREGISTERED
8905 
PARAMETER_UNKNOWN
8906 
USR
8907 
BYTEENA_REG_B
8908 
CLOCK1
8909 
PARAMETER_UNKNOWN
8910 
DEF
8911 
INDATA_ACLR_B
8912 
NONE
8913 
PARAMETER_UNKNOWN
8914 
DEF
8915 
WRCONTROL_ACLR_B
8916 
NONE
8917 
PARAMETER_UNKNOWN
8918 
DEF
8919 
ADDRESS_ACLR_B
8920 
NONE
8921 
PARAMETER_UNKNOWN
8922 
USR
8923 
OUTDATA_ACLR_B
8924 
NONE
8925 
PARAMETER_UNKNOWN
8926 
USR
8927 
RDCONTROL_ACLR_B
8928 
NONE
8929 
PARAMETER_UNKNOWN
8930 
DEF
8931 
BYTEENA_ACLR_B
8932 
NONE
8933 
PARAMETER_UNKNOWN
8934 
DEF
8935 
WIDTH_BYTEENA_A
8936 
1
8937 
PARAMETER_UNKNOWN
8938 
DEF
8939 
WIDTH_BYTEENA_B
8940 
1
8941 
PARAMETER_UNKNOWN
8942 
DEF
8943 
RAM_BLOCK_TYPE
8944 
AUTO
8945 
PARAMETER_UNKNOWN
8946 
USR
8947 
BYTE_SIZE
8948 
8
8949 
PARAMETER_UNKNOWN
8950 
DEF
8951 
READ_DURING_WRITE_MODE_MIXED_PORTS
8952 
OLD_DATA
8953 
PARAMETER_UNKNOWN
8954 
USR
8955 
READ_DURING_WRITE_MODE_PORT_A
8956 
NEW_DATA_NO_NBE_READ
8957 
PARAMETER_UNKNOWN
8958 
DEF
8959 
READ_DURING_WRITE_MODE_PORT_B
8960 
NEW_DATA_NO_NBE_READ
8961 
PARAMETER_UNKNOWN
8962 
DEF
8963 
INIT_FILE
8964 
UNUSED
8965 
PARAMETER_UNKNOWN
8966 
DEF
8967 
INIT_FILE_LAYOUT
8968 
PORT_A
8969 
PARAMETER_UNKNOWN
8970 
DEF
8971 
MAXIMUM_DEPTH
8972 
 
8973 
PARAMETER_UNKNOWN
8974 
DEF
8975 
CLOCK_ENABLE_INPUT_A
8976 
NORMAL
8977 
PARAMETER_UNKNOWN
8978 
DEF
8979 
CLOCK_ENABLE_INPUT_B
8980 
NORMAL
8981 
PARAMETER_UNKNOWN
8982 
DEF
8983 
CLOCK_ENABLE_OUTPUT_A
8984 
NORMAL
8985 
PARAMETER_UNKNOWN
8986 
DEF
8987 
CLOCK_ENABLE_OUTPUT_B
8988 
NORMAL
8989 
PARAMETER_UNKNOWN
8990 
DEF
8991 
CLOCK_ENABLE_CORE_A
8992 
USE_INPUT_CLKEN
8993 
PARAMETER_UNKNOWN
8994 
DEF
8995 
CLOCK_ENABLE_CORE_B
8996 
USE_INPUT_CLKEN
8997 
PARAMETER_UNKNOWN
8998 
DEF
8999 
ENABLE_ECC
9000 
FALSE
9001 
PARAMETER_UNKNOWN
9002 
DEF
9003 
DEVICE_FAMILY
9004 
Stratix II
9005 
PARAMETER_UNKNOWN
9006 
USR
9007 
CBXI_PARAMETER
9008 
altsyncram_74j1
9009 
PARAMETER_UNKNOWN
9010 
USR
9011 
}
9012 
# used_port {
9013 
wren_a
9014 
-1
9015 
3
9016 
q_b9
9017 
-1
9018 
3
9019 
q_b8
9020 
-1
9021 
3
9022 
q_b7
9023 
-1
9024 
3
9025 
q_b6
9026 
-1
9027 
3
9028 
q_b55
9029 
-1
9030 
3
9031 
q_b54
9032 
-1
9033 
3
9034 
q_b53
9035 
-1
9036 
3
9037 
q_b52
9038 
-1
9039 
3
9040 
q_b51
9041 
-1
9042 
3
9043 
q_b50
9044 
-1
9045 
3
9046 
q_b5
9047 
-1
9048 
3
9049 
q_b49
9050 
-1
9051 
3
9052 
q_b48
9053 
-1
9054 
3
9055 
q_b47
9056 
-1
9057 
3
9058 
q_b46
9059 
-1
9060 
3
9061 
q_b45
9062 
-1
9063 
3
9064 
q_b44
9065 
-1
9066 
3
9067 
q_b43
9068 
-1
9069 
3
9070 
q_b42
9071 
-1
9072 
3
9073 
q_b41
9074 
-1
9075 
3
9076 
q_b40
9077 
-1
9078 
3
9079 
q_b4
9080 
-1
9081 
3
9082 
q_b39
9083 
-1
9084 
3
9085 
q_b38
9086 
-1
9087 
3
9088 
q_b37
9089 
-1
9090 
3
9091 
q_b36
9092 
-1
9093 
3
9094 
q_b35
9095 
-1
9096 
3
9097 
q_b34
9098 
-1
9099 
3
9100 
q_b33
9101 
-1
9102 
3
9103 
q_b32
9104 
-1
9105 
3
9106 
q_b31
9107 
-1
9108 
3
9109 
q_b30
9110 
-1
9111 
3
9112 
q_b3
9113 
-1
9114 
3
9115 
q_b29
9116 
-1
9117 
3
9118 
q_b28
9119 
-1
9120 
3
9121 
q_b27
9122 
-1
9123 
3
9124 
q_b26
9125 
-1
9126 
3
9127 
q_b25
9128 
-1
9129 
3
9130 
q_b24
9131 
-1
9132 
3
9133 
q_b23
9134 
-1
9135 
3
9136 
q_b22
9137 
-1
9138 
3
9139 
q_b21
9140 
-1
9141 
3
9142 
q_b20
9143 
-1
9144 
3
9145 
q_b2
9146 
-1
9147 
3
9148 
q_b19
9149 
-1
9150 
3
9151 
q_b18
9152 
-1
9153 
3
9154 
q_b17
9155 
-1
9156 
3
9157 
q_b16
9158 
-1
9159 
3
9160 
q_b15
9161 
-1
9162 
3
9163 
q_b14
9164 
-1
9165 
3
9166 
q_b13
9167 
-1
9168 
3
9169 
q_b12
9170 
-1
9171 
3
9172 
q_b11
9173 
-1
9174 
3
9175 
q_b10
9176 
-1
9177 
3
9178 
q_b1
9179 
-1
9180 
3
9181 
q_b0
9182 
-1
9183 
3
9184 
data_a9
9185 
-1
9186 
3
9187 
data_a8
9188 
-1
9189 
3
9190 
data_a7
9191 
-1
9192 
3
9193 
data_a6
9194 
-1
9195 
3
9196 
data_a55
9197 
-1
9198 
3
9199 
data_a54
9200 
-1
9201 
3
9202 
data_a53
9203 
-1
9204 
3
9205 
data_a52
9206 
-1
9207 
3
9208 
data_a51
9209 
-1
9210 
3
9211 
data_a50
9212 
-1
9213 
3
9214 
data_a5
9215 
-1
9216 
3
9217 
data_a49
9218 
-1
9219 
3
9220 
data_a48
9221 
-1
9222 
3
9223 
data_a47
9224 
-1
9225 
3
9226 
data_a46
9227 
-1
9228 
3
9229 
data_a45
9230 
-1
9231 
3
9232 
data_a44
9233 
-1
9234 
3
9235 
data_a43
9236 
-1
9237 
3
9238 
data_a42
9239 
-1
9240 
3
9241 
data_a41
9242 
-1
9243 
3
9244 
data_a40
9245 
-1
9246 
3
9247 
data_a4
9248 
-1
9249 
3
9250 
data_a39
9251 
-1
9252 
3
9253 
data_a38
9254 
-1
9255 
3
9256 
data_a37
9257 
-1
9258 
3
9259 
data_a36
9260 
-1
9261 
3
9262 
data_a35
9263 
-1
9264 
3
9265 
data_a34
9266 
-1
9267 
3
9268 
data_a33
9269 
-1
9270 
3
9271 
data_a32
9272 
-1
9273 
3
9274 
data_a31
9275 
-1
9276 
3
9277 
data_a30
9278 
-1
9279 
3
9280 
data_a3
9281 
-1
9282 
3
9283 
data_a29
9284 
-1
9285 
3
9286 
data_a28
9287 
-1
9288 
3
9289 
data_a27
9290 
-1
9291 
3
9292 
data_a26
9293 
-1
9294 
3
9295 
data_a25
9296 
-1
9297 
3
9298 
data_a24
9299 
-1
9300 
3
9301 
data_a23
9302 
-1
9303 
3
9304 
data_a22
9305 
-1
9306 
3
9307 
data_a21
9308 
-1
9309 
3
9310 
data_a20
9311 
-1
9312 
3
9313 
data_a2
9314 
-1
9315 
3
9316 
data_a19
9317 
-1
9318 
3
9319 
data_a18
9320 
-1
9321 
3
9322 
data_a17
9323 
-1
9324 
3
9325 
data_a16
9326 
-1
9327 
3
9328 
data_a15
9329 
-1
9330 
3
9331 
data_a14
9332 
-1
9333 
3
9334 
data_a13
9335 
-1
9336 
3
9337 
data_a12
9338 
-1
9339 
3
9340 
data_a11
9341 
-1
9342 
3
9343 
data_a10
9344 
-1
9345 
3
9346 
data_a1
9347 
-1
9348 
3
9349 
data_a0
9350 
-1
9351 
3
9352 
clock0
9353 
-1
9354 
3
9355 
address_b9
9356 
-1
9357 
3
9358 
address_b8
9359 
-1
9360 
3
9361 
address_b7
9362 
-1
9363 
3
9364 
address_b6
9365 
-1
9366 
3
9367 
address_b5
9368 
-1
9369 
3
9370 
address_b4
9371 
-1
9372 
3
9373 
address_b3
9374 
-1
9375 
3
9376 
address_b2
9377 
-1
9378 
3
9379 
address_b11
9380 
-1
9381 
3
9382 
address_b10
9383 
-1
9384 
3
9385 
address_b1
9386 
-1
9387 
3
9388 
address_b0
9389 
-1
9390 
3
9391 
address_a9
9392 
-1
9393 
3
9394 
address_a8
9395 
-1
9396 
3
9397 
address_a7
9398 
-1
9399 
3
9400 
address_a6
9401 
-1
9402 
3
9403 
address_a5
9404 
-1
9405 
3
9406 
address_a4
9407 
-1
9408 
3
9409 
address_a3
9410 
-1
9411 
3
9412 
address_a2
9413 
-1
9414 
3
9415 
address_a11
9416 
-1
9417 
3
9418 
address_a10
9419 
-1
9420 
3
9421 
address_a1
9422 
-1
9423 
3
9424 
address_a0
9425 
-1
9426 
3
9427 
}
9428 
# include_file {
9429 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
9430 
c22bfd353214c01495b560fc34e47d79
9431 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
9432 
2263a3bdfffeb150af977ee13902f70
9433 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
9434 
bd0e2f5e01c1bd360461dceb53d48
9435 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
9436 
f39123b8592ab2dac019716e56b3ec18
9437 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
9438 
60d229340bc3c24acb0a137b4849830
9439 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
9440 
d4e3a69a331d3a99d3281790d99a1ebd
9441 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
9442 
e66a83eccf6717bed97c99d891ad085
9443 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
9444 
99d442b5b66c88db4daf94d99c6e4e77
9445 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
9446 
74e08939f96a7ea8e7a4d59a5b01fe7
9447 
}
9448 
# lmf
9449 
d:|altera|72|quartus|lmf|
9450 
d41d8cd98f0b24e980998ecf8427e
9451 
# macro_sequence
9452 
 
9453 
# end
9454 
# entity
9455 
altsyncram_74j1
9456 
# storage
9457 
db|LB.(53).cnf
9458 
db|LB.(53).cnf
9459 
# case_insensitive
9460 
# source_file
9461 
db|altsyncram_74j1.tdf
9462 
2c23e465acfec2b31d6e3d5d9bc5a57
9463 
6
9464 
# used_port {
9465 
wren_a
9466 
-1
9467 
3
9468 
q_b9
9469 
-1
9470 
3
9471 
q_b8
9472 
-1
9473 
3
9474 
q_b7
9475 
-1
9476 
3
9477 
q_b6
9478 
-1
9479 
3
9480 
q_b55
9481 
-1
9482 
3
9483 
q_b54
9484 
-1
9485 
3
9486 
q_b53
9487 
-1
9488 
3
9489 
q_b52
9490 
-1
9491 
3
9492 
q_b51
9493 
-1
9494 
3
9495 
q_b50
9496 
-1
9497 
3
9498 
q_b5
9499 
-1
9500 
3
9501 
q_b49
9502 
-1
9503 
3
9504 
q_b48
9505 
-1
9506 
3
9507 
q_b47
9508 
-1
9509 
3
9510 
q_b46
9511 
-1
9512 
3
9513 
q_b45
9514 
-1
9515 
3
9516 
q_b44
9517 
-1
9518 
3
9519 
q_b43
9520 
-1
9521 
3
9522 
q_b42
9523 
-1
9524 
3
9525 
q_b41
9526 
-1
9527 
3
9528 
q_b40
9529 
-1
9530 
3
9531 
q_b4
9532 
-1
9533 
3
9534 
q_b39
9535 
-1
9536 
3
9537 
q_b38
9538 
-1
9539 
3
9540 
q_b37
9541 
-1
9542 
3
9543 
q_b36
9544 
-1
9545 
3
9546 
q_b35
9547 
-1
9548 
3
9549 
q_b34
9550 
-1
9551 
3
9552 
q_b33
9553 
-1
9554 
3
9555 
q_b32
9556 
-1
9557 
3
9558 
q_b31
9559 
-1
9560 
3
9561 
q_b30
9562 
-1
9563 
3
9564 
q_b3
9565 
-1
9566 
3
9567 
q_b29
9568 
-1
9569 
3
9570 
q_b28
9571 
-1
9572 
3
9573 
q_b27
9574 
-1
9575 
3
9576 
q_b26
9577 
-1
9578 
3
9579 
q_b25
9580 
-1
9581 
3
9582 
q_b24
9583 
-1
9584 
3
9585 
q_b23
9586 
-1
9587 
3
9588 
q_b22
9589 
-1
9590 
3
9591 
q_b21
9592 
-1
9593 
3
9594 
q_b20
9595 
-1
9596 
3
9597 
q_b2
9598 
-1
9599 
3
9600 
q_b19
9601 
-1
9602 
3
9603 
q_b18
9604 
-1
9605 
3
9606 
q_b17
9607 
-1
9608 
3
9609 
q_b16
9610 
-1
9611 
3
9612 
q_b15
9613 
-1
9614 
3
9615 
q_b14
9616 
-1
9617 
3
9618 
q_b13
9619 
-1
9620 
3
9621 
q_b12
9622 
-1
9623 
3
9624 
q_b11
9625 
-1
9626 
3
9627 
q_b10
9628 
-1
9629 
3
9630 
q_b1
9631 
-1
9632 
3
9633 
q_b0
9634 
-1
9635 
3
9636 
data_a9
9637 
-1
9638 
3
9639 
data_a8
9640 
-1
9641 
3
9642 
data_a7
9643 
-1
9644 
3
9645 
data_a6
9646 
-1
9647 
3
9648 
data_a55
9649 
-1
9650 
3
9651 
data_a54
9652 
-1
9653 
3
9654 
data_a53
9655 
-1
9656 
3
9657 
data_a52
9658 
-1
9659 
3
9660 
data_a51
9661 
-1
9662 
3
9663 
data_a50
9664 
-1
9665 
3
9666 
data_a5
9667 
-1
9668 
3
9669 
data_a49
9670 
-1
9671 
3
9672 
data_a48
9673 
-1
9674 
3
9675 
data_a47
9676 
-1
9677 
3
9678 
data_a46
9679 
-1
9680 
3
9681 
data_a45
9682 
-1
9683 
3
9684 
data_a44
9685 
-1
9686 
3
9687 
data_a43
9688 
-1
9689 
3
9690 
data_a42
9691 
-1
9692 
3
9693 
data_a41
9694 
-1
9695 
3
9696 
data_a40
9697 
-1
9698 
3
9699 
data_a4
9700 
-1
9701 
3
9702 
data_a39
9703 
-1
9704 
3
9705 
data_a38
9706 
-1
9707 
3
9708 
data_a37
9709 
-1
9710 
3
9711 
data_a36
9712 
-1
9713 
3
9714 
data_a35
9715 
-1
9716 
3
9717 
data_a34
9718 
-1
9719 
3
9720 
data_a33
9721 
-1
9722 
3
9723 
data_a32
9724 
-1
9725 
3
9726 
data_a31
9727 
-1
9728 
3
9729 
data_a30
9730 
-1
9731 
3
9732 
data_a3
9733 
-1
9734 
3
9735 
data_a29
9736 
-1
9737 
3
9738 
data_a28
9739 
-1
9740 
3
9741 
data_a27
9742 
-1
9743 
3
9744 
data_a26
9745 
-1
9746 
3
9747 
data_a25
9748 
-1
9749 
3
9750 
data_a24
9751 
-1
9752 
3
9753 
data_a23
9754 
-1
9755 
3
9756 
data_a22
9757 
-1
9758 
3
9759 
data_a21
9760 
-1
9761 
3
9762 
data_a20
9763 
-1
9764 
3
9765 
data_a2
9766 
-1
9767 
3
9768 
data_a19
9769 
-1
9770 
3
9771 
data_a18
9772 
-1
9773 
3
9774 
data_a17
9775 
-1
9776 
3
9777 
data_a16
9778 
-1
9779 
3
9780 
data_a15
9781 
-1
9782 
3
9783 
data_a14
9784 
-1
9785 
3
9786 
data_a13
9787 
-1
9788 
3
9789 
data_a12
9790 
-1
9791 
3
9792 
data_a11
9793 
-1
9794 
3
9795 
data_a10
9796 
-1
9797 
3
9798 
data_a1
9799 
-1
9800 
3
9801 
data_a0
9802 
-1
9803 
3
9804 
clock0
9805 
-1
9806 
3
9807 
address_b9
9808 
-1
9809 
3
9810 
address_b8
9811 
-1
9812 
3
9813 
address_b7
9814 
-1
9815 
3
9816 
address_b6
9817 
-1
9818 
3
9819 
address_b5
9820 
-1
9821 
3
9822 
address_b4
9823 
-1
9824 
3
9825 
address_b3
9826 
-1
9827 
3
9828 
address_b2
9829 
-1
9830 
3
9831 
address_b11
9832 
-1
9833 
3
9834 
address_b10
9835 
-1
9836 
3
9837 
address_b1
9838 
-1
9839 
3
9840 
address_b0
9841 
-1
9842 
3
9843 
address_a9
9844 
-1
9845 
3
9846 
address_a8
9847 
-1
9848 
3
9849 
address_a7
9850 
-1
9851 
3
9852 
address_a6
9853 
-1
9854 
3
9855 
address_a5
9856 
-1
9857 
3
9858 
address_a4
9859 
-1
9860 
3
9861 
address_a3
9862 
-1
9863 
3
9864 
address_a2
9865 
-1
9866 
3
9867 
address_a11
9868 
-1
9869 
3
9870 
address_a10
9871 
-1
9872 
3
9873 
address_a1
9874 
-1
9875 
3
9876 
address_a0
9877 
-1
9878 
3
9879 
}
9880 
# lmf
9881 
d:|altera|72|quartus|lmf|
9882 
d41d8cd98f0b24e980998ecf8427e
9883 
# macro_sequence
9884 
 
9885 
# end
9886 
# entity
9887 
altsyncram
9888 
# storage
9889 
db|LB.(54).cnf
9890 
db|LB.(54).cnf
9891 
# case_insensitive
9892 
# source_file
9893 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
9894 
1a8e44bce3df5c9cae2128978e887541
9895 
6
9896 
# user_parameter {
9897 
BYTE_SIZE_BLOCK
9898 
8
9899 
PARAMETER_UNKNOWN
9900 
DEF
9901 
AUTO_CARRY_CHAINS
9902 
ON
9903 
AUTO_CARRY
9904 
USR
9905 
IGNORE_CARRY_BUFFERS
9906 
OFF
9907 
IGNORE_CARRY
9908 
USR
9909 
AUTO_CASCADE_CHAINS
9910 
ON
9911 
AUTO_CASCADE
9912 
USR
9913 
IGNORE_CASCADE_BUFFERS
9914 
OFF
9915 
IGNORE_CASCADE
9916 
USR
9917 
WIDTH_BYTEENA
9918 
1
9919 
PARAMETER_UNKNOWN
9920 
DEF
9921 
OPERATION_MODE
9922 
DUAL_PORT
9923 
PARAMETER_UNKNOWN
9924 
USR
9925 
WIDTH_A
9926 
2
9927 
PARAMETER_UNKNOWN
9928 
USR
9929 
WIDTHAD_A
9930 
12
9931 
PARAMETER_UNKNOWN
9932 
USR
9933 
NUMWORDS_A
9934 
4096
9935 
PARAMETER_UNKNOWN
9936 
USR
9937 
OUTDATA_REG_A
9938 
UNREGISTERED
9939 
PARAMETER_UNKNOWN
9940 
DEF
9941 
ADDRESS_ACLR_A
9942 
NONE
9943 
PARAMETER_UNKNOWN
9944 
USR
9945 
OUTDATA_ACLR_A
9946 
NONE
9947 
PARAMETER_UNKNOWN
9948 
DEF
9949 
WRCONTROL_ACLR_A
9950 
NONE
9951 
PARAMETER_UNKNOWN
9952 
USR
9953 
INDATA_ACLR_A
9954 
NONE
9955 
PARAMETER_UNKNOWN
9956 
USR
9957 
BYTEENA_ACLR_A
9958 
NONE
9959 
PARAMETER_UNKNOWN
9960 
DEF
9961 
WIDTH_B
9962 
2
9963 
PARAMETER_UNKNOWN
9964 
USR
9965 
WIDTHAD_B
9966 
12
9967 
PARAMETER_UNKNOWN
9968 
USR
9969 
NUMWORDS_B
9970 
4096
9971 
PARAMETER_UNKNOWN
9972 
USR
9973 
INDATA_REG_B
9974 
CLOCK1
9975 
PARAMETER_UNKNOWN
9976 
DEF
9977 
WRCONTROL_WRADDRESS_REG_B
9978 
CLOCK1
9979 
PARAMETER_UNKNOWN
9980 
DEF
9981 
RDCONTROL_REG_B
9982 
CLOCK1
9983 
PARAMETER_UNKNOWN
9984 
DEF
9985 
ADDRESS_REG_B
9986 
CLOCK0
9987 
PARAMETER_UNKNOWN
9988 
USR
9989 
OUTDATA_REG_B
9990 
UNREGISTERED
9991 
PARAMETER_UNKNOWN
9992 
USR
9993 
BYTEENA_REG_B
9994 
CLOCK1
9995 
PARAMETER_UNKNOWN
9996 
DEF
9997 
INDATA_ACLR_B
9998 
NONE
9999 
PARAMETER_UNKNOWN
10000 
DEF
10001 
WRCONTROL_ACLR_B
10002 
NONE
10003 
PARAMETER_UNKNOWN
10004 
DEF
10005 
ADDRESS_ACLR_B
10006 
NONE
10007 
PARAMETER_UNKNOWN
10008 
USR
10009 
OUTDATA_ACLR_B
10010 
NONE
10011 
PARAMETER_UNKNOWN
10012 
USR
10013 
RDCONTROL_ACLR_B
10014 
NONE
10015 
PARAMETER_UNKNOWN
10016 
DEF
10017 
BYTEENA_ACLR_B
10018 
NONE
10019 
PARAMETER_UNKNOWN
10020 
DEF
10021 
WIDTH_BYTEENA_A
10022 
1
10023 
PARAMETER_UNKNOWN
10024 
DEF
10025 
WIDTH_BYTEENA_B
10026 
1
10027 
PARAMETER_UNKNOWN
10028 
DEF
10029 
RAM_BLOCK_TYPE
10030 
AUTO
10031 
PARAMETER_UNKNOWN
10032 
USR
10033 
BYTE_SIZE
10034 
8
10035 
PARAMETER_UNKNOWN
10036 
DEF
10037 
READ_DURING_WRITE_MODE_MIXED_PORTS
10038 
OLD_DATA
10039 
PARAMETER_UNKNOWN
10040 
USR
10041 
READ_DURING_WRITE_MODE_PORT_A
10042 
NEW_DATA_NO_NBE_READ
10043 
PARAMETER_UNKNOWN
10044 
DEF
10045 
READ_DURING_WRITE_MODE_PORT_B
10046 
NEW_DATA_NO_NBE_READ
10047 
PARAMETER_UNKNOWN
10048 
DEF
10049 
INIT_FILE
10050 
UNUSED
10051 
PARAMETER_UNKNOWN
10052 
DEF
10053 
INIT_FILE_LAYOUT
10054 
PORT_A
10055 
PARAMETER_UNKNOWN
10056 
DEF
10057 
MAXIMUM_DEPTH
10058 
 
10059 
PARAMETER_UNKNOWN
10060 
DEF
10061 
CLOCK_ENABLE_INPUT_A
10062 
NORMAL
10063 
PARAMETER_UNKNOWN
10064 
DEF
10065 
CLOCK_ENABLE_INPUT_B
10066 
NORMAL
10067 
PARAMETER_UNKNOWN
10068 
DEF
10069 
CLOCK_ENABLE_OUTPUT_A
10070 
NORMAL
10071 
PARAMETER_UNKNOWN
10072 
DEF
10073 
CLOCK_ENABLE_OUTPUT_B
10074 
NORMAL
10075 
PARAMETER_UNKNOWN
10076 
DEF
10077 
CLOCK_ENABLE_CORE_A
10078 
USE_INPUT_CLKEN
10079 
PARAMETER_UNKNOWN
10080 
DEF
10081 
CLOCK_ENABLE_CORE_B
10082 
USE_INPUT_CLKEN
10083 
PARAMETER_UNKNOWN
10084 
DEF
10085 
ENABLE_ECC
10086 
FALSE
10087 
PARAMETER_UNKNOWN
10088 
DEF
10089 
DEVICE_FAMILY
10090 
Stratix II
10091 
PARAMETER_UNKNOWN
10092 
USR
10093 
CBXI_PARAMETER
10094 
altsyncram_l0j1
10095 
PARAMETER_UNKNOWN
10096 
USR
10097 
}
10098 
# used_port {
10099 
wren_a
10100 
-1
10101 
3
10102 
q_b1
10103 
-1
10104 
3
10105 
q_b0
10106 
-1
10107 
3
10108 
data_a1
10109 
-1
10110 
3
10111 
data_a0
10112 
-1
10113 
3
10114 
clock0
10115 
-1
10116 
3
10117 
address_b9
10118 
-1
10119 
3
10120 
address_b8
10121 
-1
10122 
3
10123 
address_b7
10124 
-1
10125 
3
10126 
address_b6
10127 
-1
10128 
3
10129 
address_b5
10130 
-1
10131 
3
10132 
address_b4
10133 
-1
10134 
3
10135 
address_b3
10136 
-1
10137 
3
10138 
address_b2
10139 
-1
10140 
3
10141 
address_b11
10142 
-1
10143 
3
10144 
address_b10
10145 
-1
10146 
3
10147 
address_b1
10148 
-1
10149 
3
10150 
address_b0
10151 
-1
10152 
3
10153 
address_a9
10154 
-1
10155 
3
10156 
address_a8
10157 
-1
10158 
3
10159 
address_a7
10160 
-1
10161 
3
10162 
address_a6
10163 
-1
10164 
3
10165 
address_a5
10166 
-1
10167 
3
10168 
address_a4
10169 
-1
10170 
3
10171 
address_a3
10172 
-1
10173 
3
10174 
address_a2
10175 
-1
10176 
3
10177 
address_a11
10178 
-1
10179 
3
10180 
address_a10
10181 
-1
10182 
3
10183 
address_a1
10184 
-1
10185 
3
10186 
address_a0
10187 
-1
10188 
3
10189 
}
10190 
# include_file {
10191 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
10192 
c22bfd353214c01495b560fc34e47d79
10193 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
10194 
2263a3bdfffeb150af977ee13902f70
10195 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
10196 
bd0e2f5e01c1bd360461dceb53d48
10197 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
10198 
f39123b8592ab2dac019716e56b3ec18
10199 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
10200 
60d229340bc3c24acb0a137b4849830
10201 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
10202 
d4e3a69a331d3a99d3281790d99a1ebd
10203 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
10204 
e66a83eccf6717bed97c99d891ad085
10205 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
10206 
99d442b5b66c88db4daf94d99c6e4e77
10207 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
10208 
74e08939f96a7ea8e7a4d59a5b01fe7
10209 
}
10210 
# lmf
10211 
d:|altera|72|quartus|lmf|
10212 
d41d8cd98f0b24e980998ecf8427e
10213 
# macro_sequence
10214 
 
10215 
# end
10216 
# entity
10217 
altsyncram_l0j1
10218 
# storage
10219 
db|LB.(55).cnf
10220 
db|LB.(55).cnf
10221 
# case_insensitive
10222 
# source_file
10223 
db|altsyncram_l0j1.tdf
10224 
70f73e9a9b39af1a57de23177a36bec1
10225 
6
10226 
# used_port {
10227 
wren_a
10228 
-1
10229 
3
10230 
q_b1
10231 
-1
10232 
3
10233 
q_b0
10234 
-1
10235 
3
10236 
data_a1
10237 
-1
10238 
3
10239 
data_a0
10240 
-1
10241 
3
10242 
clock0
10243 
-1
10244 
3
10245 
address_b9
10246 
-1
10247 
3
10248 
address_b8
10249 
-1
10250 
3
10251 
address_b7
10252 
-1
10253 
3
10254 
address_b6
10255 
-1
10256 
3
10257 
address_b5
10258 
-1
10259 
3
10260 
address_b4
10261 
-1
10262 
3
10263 
address_b3
10264 
-1
10265 
3
10266 
address_b2
10267 
-1
10268 
3
10269 
address_b11
10270 
-1
10271 
3
10272 
address_b10
10273 
-1
10274 
3
10275 
address_b1
10276 
-1
10277 
3
10278 
address_b0
10279 
-1
10280 
3
10281 
address_a9
10282 
-1
10283 
3
10284 
address_a8
10285 
-1
10286 
3
10287 
address_a7
10288 
-1
10289 
3
10290 
address_a6
10291 
-1
10292 
3
10293 
address_a5
10294 
-1
10295 
3
10296 
address_a4
10297 
-1
10298 
3
10299 
address_a3
10300 
-1
10301 
3
10302 
address_a2
10303 
-1
10304 
3
10305 
address_a11
10306 
-1
10307 
3
10308 
address_a10
10309 
-1
10310 
3
10311 
address_a1
10312 
-1
10313 
3
10314 
address_a0
10315 
-1
10316 
3
10317 
}
10318 
# lmf
10319 
d:|altera|72|quartus|lmf|
10320 
d41d8cd98f0b24e980998ecf8427e
10321 
# macro_sequence
10322 
 
10323 
# end
10324 
# entity
10325 
altsyncram
10326 
# storage
10327 
db|LB.(56).cnf
10328 
db|LB.(56).cnf
10329 
# case_insensitive
10330 
# source_file
10331 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
10332 
1a8e44bce3df5c9cae2128978e887541
10333 
6
10334 
# user_parameter {
10335 
BYTE_SIZE_BLOCK
10336 
8
10337 
PARAMETER_UNKNOWN
10338 
DEF
10339 
AUTO_CARRY_CHAINS
10340 
ON
10341 
AUTO_CARRY
10342 
USR
10343 
IGNORE_CARRY_BUFFERS
10344 
OFF
10345 
IGNORE_CARRY
10346 
USR
10347 
AUTO_CASCADE_CHAINS
10348 
ON
10349 
AUTO_CASCADE
10350 
USR
10351 
IGNORE_CASCADE_BUFFERS
10352 
OFF
10353 
IGNORE_CASCADE
10354 
USR
10355 
WIDTH_BYTEENA
10356 
1
10357 
PARAMETER_UNKNOWN
10358 
DEF
10359 
OPERATION_MODE
10360 
DUAL_PORT
10361 
PARAMETER_UNKNOWN
10362 
USR
10363 
WIDTH_A
10364 
48
10365 
PARAMETER_UNKNOWN
10366 
USR
10367 
WIDTHAD_A
10368 
5
10369 
PARAMETER_UNKNOWN
10370 
USR
10371 
NUMWORDS_A
10372 
32
10373 
PARAMETER_UNKNOWN
10374 
USR
10375 
OUTDATA_REG_A
10376 
UNREGISTERED
10377 
PARAMETER_UNKNOWN
10378 
DEF
10379 
ADDRESS_ACLR_A
10380 
NONE
10381 
PARAMETER_UNKNOWN
10382 
USR
10383 
OUTDATA_ACLR_A
10384 
NONE
10385 
PARAMETER_UNKNOWN
10386 
DEF
10387 
WRCONTROL_ACLR_A
10388 
NONE
10389 
PARAMETER_UNKNOWN
10390 
USR
10391 
INDATA_ACLR_A
10392 
NONE
10393 
PARAMETER_UNKNOWN
10394 
USR
10395 
BYTEENA_ACLR_A
10396 
NONE
10397 
PARAMETER_UNKNOWN
10398 
DEF
10399 
WIDTH_B
10400 
48
10401 
PARAMETER_UNKNOWN
10402 
USR
10403 
WIDTHAD_B
10404 
5
10405 
PARAMETER_UNKNOWN
10406 
USR
10407 
NUMWORDS_B
10408 
32
10409 
PARAMETER_UNKNOWN
10410 
USR
10411 
INDATA_REG_B
10412 
CLOCK1
10413 
PARAMETER_UNKNOWN
10414 
DEF
10415 
WRCONTROL_WRADDRESS_REG_B
10416 
CLOCK1
10417 
PARAMETER_UNKNOWN
10418 
DEF
10419 
RDCONTROL_REG_B
10420 
CLOCK1
10421 
PARAMETER_UNKNOWN
10422 
DEF
10423 
ADDRESS_REG_B
10424 
CLOCK0
10425 
PARAMETER_UNKNOWN
10426 
USR
10427 
OUTDATA_REG_B
10428 
UNREGISTERED
10429 
PARAMETER_UNKNOWN
10430 
USR
10431 
BYTEENA_REG_B
10432 
CLOCK1
10433 
PARAMETER_UNKNOWN
10434 
DEF
10435 
INDATA_ACLR_B
10436 
NONE
10437 
PARAMETER_UNKNOWN
10438 
DEF
10439 
WRCONTROL_ACLR_B
10440 
NONE
10441 
PARAMETER_UNKNOWN
10442 
DEF
10443 
ADDRESS_ACLR_B
10444 
NONE
10445 
PARAMETER_UNKNOWN
10446 
USR
10447 
OUTDATA_ACLR_B
10448 
NONE
10449 
PARAMETER_UNKNOWN
10450 
USR
10451 
RDCONTROL_ACLR_B
10452 
NONE
10453 
PARAMETER_UNKNOWN
10454 
DEF
10455 
BYTEENA_ACLR_B
10456 
NONE
10457 
PARAMETER_UNKNOWN
10458 
DEF
10459 
WIDTH_BYTEENA_A
10460 
1
10461 
PARAMETER_UNKNOWN
10462 
DEF
10463 
WIDTH_BYTEENA_B
10464 
1
10465 
PARAMETER_UNKNOWN
10466 
DEF
10467 
RAM_BLOCK_TYPE
10468 
AUTO
10469 
PARAMETER_UNKNOWN
10470 
USR
10471 
BYTE_SIZE
10472 
8
10473 
PARAMETER_UNKNOWN
10474 
DEF
10475 
READ_DURING_WRITE_MODE_MIXED_PORTS
10476 
OLD_DATA
10477 
PARAMETER_UNKNOWN
10478 
USR
10479 
READ_DURING_WRITE_MODE_PORT_A
10480 
NEW_DATA_NO_NBE_READ
10481 
PARAMETER_UNKNOWN
10482 
DEF
10483 
READ_DURING_WRITE_MODE_PORT_B
10484 
NEW_DATA_NO_NBE_READ
10485 
PARAMETER_UNKNOWN
10486 
DEF
10487 
INIT_FILE
10488 
UNUSED
10489 
PARAMETER_UNKNOWN
10490 
DEF
10491 
INIT_FILE_LAYOUT
10492 
PORT_A
10493 
PARAMETER_UNKNOWN
10494 
DEF
10495 
MAXIMUM_DEPTH
10496 
 
10497 
PARAMETER_UNKNOWN
10498 
DEF
10499 
CLOCK_ENABLE_INPUT_A
10500 
NORMAL
10501 
PARAMETER_UNKNOWN
10502 
DEF
10503 
CLOCK_ENABLE_INPUT_B
10504 
NORMAL
10505 
PARAMETER_UNKNOWN
10506 
DEF
10507 
CLOCK_ENABLE_OUTPUT_A
10508 
NORMAL
10509 
PARAMETER_UNKNOWN
10510 
DEF
10511 
CLOCK_ENABLE_OUTPUT_B
10512 
NORMAL
10513 
PARAMETER_UNKNOWN
10514 
DEF
10515 
CLOCK_ENABLE_CORE_A
10516 
USE_INPUT_CLKEN
10517 
PARAMETER_UNKNOWN
10518 
DEF
10519 
CLOCK_ENABLE_CORE_B
10520 
USE_INPUT_CLKEN
10521 
PARAMETER_UNKNOWN
10522 
DEF
10523 
ENABLE_ECC
10524 
FALSE
10525 
PARAMETER_UNKNOWN
10526 
DEF
10527 
DEVICE_FAMILY
10528 
Stratix II
10529 
PARAMETER_UNKNOWN
10530 
USR
10531 
CBXI_PARAMETER
10532 
altsyncram_hqi1
10533 
PARAMETER_UNKNOWN
10534 
USR
10535 
}
10536 
# used_port {
10537 
wren_a
10538 
-1
10539 
3
10540 
q_b9
10541 
-1
10542 
3
10543 
q_b8
10544 
-1
10545 
3
10546 
q_b7
10547 
-1
10548 
3
10549 
q_b6
10550 
-1
10551 
3
10552 
q_b5
10553 
-1
10554 
3
10555 
q_b47
10556 
-1
10557 
3
10558 
q_b46
10559 
-1
10560 
3
10561 
q_b45
10562 
-1
10563 
3
10564 
q_b44
10565 
-1
10566 
3
10567 
q_b43
10568 
-1
10569 
3
10570 
q_b42
10571 
-1
10572 
3
10573 
q_b41
10574 
-1
10575 
3
10576 
q_b40
10577 
-1
10578 
3
10579 
q_b4
10580 
-1
10581 
3
10582 
q_b39
10583 
-1
10584 
3
10585 
q_b38
10586 
-1
10587 
3
10588 
q_b37
10589 
-1
10590 
3
10591 
q_b36
10592 
-1
10593 
3
10594 
q_b35
10595 
-1
10596 
3
10597 
q_b34
10598 
-1
10599 
3
10600 
q_b33
10601 
-1
10602 
3
10603 
q_b32
10604 
-1
10605 
3
10606 
q_b31
10607 
-1
10608 
3
10609 
q_b30
10610 
-1
10611 
3
10612 
q_b3
10613 
-1
10614 
3
10615 
q_b29
10616 
-1
10617 
3
10618 
q_b28
10619 
-1
10620 
3
10621 
q_b27
10622 
-1
10623 
3
10624 
q_b26
10625 
-1
10626 
3
10627 
q_b25
10628 
-1
10629 
3
10630 
q_b24
10631 
-1
10632 
3
10633 
q_b23
10634 
-1
10635 
3
10636 
q_b22
10637 
-1
10638 
3
10639 
q_b21
10640 
-1
10641 
3
10642 
q_b20
10643 
-1
10644 
3
10645 
q_b2
10646 
-1
10647 
3
10648 
q_b19
10649 
-1
10650 
3
10651 
q_b18
10652 
-1
10653 
3
10654 
q_b17
10655 
-1
10656 
3
10657 
q_b16
10658 
-1
10659 
3
10660 
q_b15
10661 
-1
10662 
3
10663 
q_b14
10664 
-1
10665 
3
10666 
q_b13
10667 
-1
10668 
3
10669 
q_b12
10670 
-1
10671 
3
10672 
q_b11
10673 
-1
10674 
3
10675 
q_b10
10676 
-1
10677 
3
10678 
q_b1
10679 
-1
10680 
3
10681 
q_b0
10682 
-1
10683 
3
10684 
data_a9
10685 
-1
10686 
3
10687 
data_a8
10688 
-1
10689 
3
10690 
data_a7
10691 
-1
10692 
3
10693 
data_a6
10694 
-1
10695 
3
10696 
data_a5
10697 
-1
10698 
3
10699 
data_a47
10700 
-1
10701 
3
10702 
data_a46
10703 
-1
10704 
3
10705 
data_a45
10706 
-1
10707 
3
10708 
data_a44
10709 
-1
10710 
3
10711 
data_a43
10712 
-1
10713 
3
10714 
data_a42
10715 
-1
10716 
3
10717 
data_a41
10718 
-1
10719 
3
10720 
data_a40
10721 
-1
10722 
3
10723 
data_a4
10724 
-1
10725 
3
10726 
data_a39
10727 
-1
10728 
3
10729 
data_a38
10730 
-1
10731 
3
10732 
data_a37
10733 
-1
10734 
3
10735 
data_a36
10736 
-1
10737 
3
10738 
data_a35
10739 
-1
10740 
3
10741 
data_a34
10742 
-1
10743 
3
10744 
data_a33
10745 
-1
10746 
3
10747 
data_a32
10748 
-1
10749 
3
10750 
data_a31
10751 
-1
10752 
3
10753 
data_a30
10754 
-1
10755 
3
10756 
data_a3
10757 
-1
10758 
3
10759 
data_a29
10760 
-1
10761 
3
10762 
data_a28
10763 
-1
10764 
3
10765 
data_a27
10766 
-1
10767 
3
10768 
data_a26
10769 
-1
10770 
3
10771 
data_a25
10772 
-1
10773 
3
10774 
data_a24
10775 
-1
10776 
3
10777 
data_a23
10778 
-1
10779 
3
10780 
data_a22
10781 
-1
10782 
3
10783 
data_a21
10784 
-1
10785 
3
10786 
data_a20
10787 
-1
10788 
3
10789 
data_a2
10790 
-1
10791 
3
10792 
data_a19
10793 
-1
10794 
3
10795 
data_a18
10796 
-1
10797 
3
10798 
data_a17
10799 
-1
10800 
3
10801 
data_a16
10802 
-1
10803 
3
10804 
data_a15
10805 
-1
10806 
3
10807 
data_a14
10808 
-1
10809 
3
10810 
data_a13
10811 
-1
10812 
3
10813 
data_a12
10814 
-1
10815 
3
10816 
data_a11
10817 
-1
10818 
3
10819 
data_a10
10820 
-1
10821 
3
10822 
data_a1
10823 
-1
10824 
3
10825 
data_a0
10826 
-1
10827 
3
10828 
clock0
10829 
-1
10830 
3
10831 
address_b4
10832 
-1
10833 
3
10834 
address_b3
10835 
-1
10836 
3
10837 
address_b2
10838 
-1
10839 
3
10840 
address_b1
10841 
-1
10842 
3
10843 
address_b0
10844 
-1
10845 
3
10846 
address_a4
10847 
-1
10848 
3
10849 
address_a3
10850 
-1
10851 
3
10852 
address_a2
10853 
-1
10854 
3
10855 
address_a1
10856 
-1
10857 
3
10858 
address_a0
10859 
-1
10860 
3
10861 
}
10862 
# include_file {
10863 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
10864 
c22bfd353214c01495b560fc34e47d79
10865 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
10866 
2263a3bdfffeb150af977ee13902f70
10867 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
10868 
bd0e2f5e01c1bd360461dceb53d48
10869 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
10870 
f39123b8592ab2dac019716e56b3ec18
10871 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
10872 
60d229340bc3c24acb0a137b4849830
10873 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
10874 
d4e3a69a331d3a99d3281790d99a1ebd
10875 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
10876 
e66a83eccf6717bed97c99d891ad085
10877 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
10878 
99d442b5b66c88db4daf94d99c6e4e77
10879 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
10880 
74e08939f96a7ea8e7a4d59a5b01fe7
10881 
}
10882 
# lmf
10883 
d:|altera|72|quartus|lmf|
10884 
d41d8cd98f0b24e980998ecf8427e
10885 
# macro_sequence
10886 
 
10887 
# end
10888 
# entity
10889 
altsyncram_hqi1
10890 
# storage
10891 
db|LB.(57).cnf
10892 
db|LB.(57).cnf
10893 
# case_insensitive
10894 
# source_file
10895 
db|altsyncram_hqi1.tdf
10896 
a7692dd53ab79350aad5d2dc345d65b0
10897 
6
10898 
# used_port {
10899 
wren_a
10900 
-1
10901 
3
10902 
q_b9
10903 
-1
10904 
3
10905 
q_b8
10906 
-1
10907 
3
10908 
q_b7
10909 
-1
10910 
3
10911 
q_b6
10912 
-1
10913 
3
10914 
q_b5
10915 
-1
10916 
3
10917 
q_b47
10918 
-1
10919 
3
10920 
q_b46
10921 
-1
10922 
3
10923 
q_b45
10924 
-1
10925 
3
10926 
q_b44
10927 
-1
10928 
3
10929 
q_b43
10930 
-1
10931 
3
10932 
q_b42
10933 
-1
10934 
3
10935 
q_b41
10936 
-1
10937 
3
10938 
q_b40
10939 
-1
10940 
3
10941 
q_b4
10942 
-1
10943 
3
10944 
q_b39
10945 
-1
10946 
3
10947 
q_b38
10948 
-1
10949 
3
10950 
q_b37
10951 
-1
10952 
3
10953 
q_b36
10954 
-1
10955 
3
10956 
q_b35
10957 
-1
10958 
3
10959 
q_b34
10960 
-1
10961 
3
10962 
q_b33
10963 
-1
10964 
3
10965 
q_b32
10966 
-1
10967 
3
10968 
q_b31
10969 
-1
10970 
3
10971 
q_b30
10972 
-1
10973 
3
10974 
q_b3
10975 
-1
10976 
3
10977 
q_b29
10978 
-1
10979 
3
10980 
q_b28
10981 
-1
10982 
3
10983 
q_b27
10984 
-1
10985 
3
10986 
q_b26
10987 
-1
10988 
3
10989 
q_b25
10990 
-1
10991 
3
10992 
q_b24
10993 
-1
10994 
3
10995 
q_b23
10996 
-1
10997 
3
10998 
q_b22
10999 
-1
11000 
3
11001 
q_b21
11002 
-1
11003 
3
11004 
q_b20
11005 
-1
11006 
3
11007 
q_b2
11008 
-1
11009 
3
11010 
q_b19
11011 
-1
11012 
3
11013 
q_b18
11014 
-1
11015 
3
11016 
q_b17
11017 
-1
11018 
3
11019 
q_b16
11020 
-1
11021 
3
11022 
q_b15
11023 
-1
11024 
3
11025 
q_b14
11026 
-1
11027 
3
11028 
q_b13
11029 
-1
11030 
3
11031 
q_b12
11032 
-1
11033 
3
11034 
q_b11
11035 
-1
11036 
3
11037 
q_b10
11038 
-1
11039 
3
11040 
q_b1
11041 
-1
11042 
3
11043 
q_b0
11044 
-1
11045 
3
11046 
data_a9
11047 
-1
11048 
3
11049 
data_a8
11050 
-1
11051 
3
11052 
data_a7
11053 
-1
11054 
3
11055 
data_a6
11056 
-1
11057 
3
11058 
data_a5
11059 
-1
11060 
3
11061 
data_a47
11062 
-1
11063 
3
11064 
data_a46
11065 
-1
11066 
3
11067 
data_a45
11068 
-1
11069 
3
11070 
data_a44
11071 
-1
11072 
3
11073 
data_a43
11074 
-1
11075 
3
11076 
data_a42
11077 
-1
11078 
3
11079 
data_a41
11080 
-1
11081 
3
11082 
data_a40
11083 
-1
11084 
3
11085 
data_a4
11086 
-1
11087 
3
11088 
data_a39
11089 
-1
11090 
3
11091 
data_a38
11092 
-1
11093 
3
11094 
data_a37
11095 
-1
11096 
3
11097 
data_a36
11098 
-1
11099 
3
11100 
data_a35
11101 
-1
11102 
3
11103 
data_a34
11104 
-1
11105 
3
11106 
data_a33
11107 
-1
11108 
3
11109 
data_a32
11110 
-1
11111 
3
11112 
data_a31
11113 
-1
11114 
3
11115 
data_a30
11116 
-1
11117 
3
11118 
data_a3
11119 
-1
11120 
3
11121 
data_a29
11122 
-1
11123 
3
11124 
data_a28
11125 
-1
11126 
3
11127 
data_a27
11128 
-1
11129 
3
11130 
data_a26
11131 
-1
11132 
3
11133 
data_a25
11134 
-1
11135 
3
11136 
data_a24
11137 
-1
11138 
3
11139 
data_a23
11140 
-1
11141 
3
11142 
data_a22
11143 
-1
11144 
3
11145 
data_a21
11146 
-1
11147 
3
11148 
data_a20
11149 
-1
11150 
3
11151 
data_a2
11152 
-1
11153 
3
11154 
data_a19
11155 
-1
11156 
3
11157 
data_a18
11158 
-1
11159 
3
11160 
data_a17
11161 
-1
11162 
3
11163 
data_a16
11164 
-1
11165 
3
11166 
data_a15
11167 
-1
11168 
3
11169 
data_a14
11170 
-1
11171 
3
11172 
data_a13
11173 
-1
11174 
3
11175 
data_a12
11176 
-1
11177 
3
11178 
data_a11
11179 
-1
11180 
3
11181 
data_a10
11182 
-1
11183 
3
11184 
data_a1
11185 
-1
11186 
3
11187 
data_a0
11188 
-1
11189 
3
11190 
clock0
11191 
-1
11192 
3
11193 
address_b4
11194 
-1
11195 
3
11196 
address_b3
11197 
-1
11198 
3
11199 
address_b2
11200 
-1
11201 
3
11202 
address_b1
11203 
-1
11204 
3
11205 
address_b0
11206 
-1
11207 
3
11208 
address_a4
11209 
-1
11210 
3
11211 
address_a3
11212 
-1
11213 
3
11214 
address_a2
11215 
-1
11216 
3
11217 
address_a1
11218 
-1
11219 
3
11220 
address_a0
11221 
-1
11222 
3
11223 
}
11224 
# lmf
11225 
d:|altera|72|quartus|lmf|
11226 
d41d8cd98f0b24e980998ecf8427e
11227 
# macro_sequence
11228 
 
11229 
# end
11230 
# entity
11231 
altsyncram
11232 
# storage
11233 
db|LB.(58).cnf
11234 
db|LB.(58).cnf
11235 
# case_insensitive
11236 
# source_file
11237 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
11238 
1a8e44bce3df5c9cae2128978e887541
11239 
6
11240 
# user_parameter {
11241 
BYTE_SIZE_BLOCK
11242 
8
11243 
PARAMETER_UNKNOWN
11244 
DEF
11245 
AUTO_CARRY_CHAINS
11246 
ON
11247 
AUTO_CARRY
11248 
USR
11249 
IGNORE_CARRY_BUFFERS
11250 
OFF
11251 
IGNORE_CARRY
11252 
USR
11253 
AUTO_CASCADE_CHAINS
11254 
ON
11255 
AUTO_CASCADE
11256 
USR
11257 
IGNORE_CASCADE_BUFFERS
11258 
OFF
11259 
IGNORE_CASCADE
11260 
USR
11261 
WIDTH_BYTEENA
11262 
1
11263 
PARAMETER_UNKNOWN
11264 
DEF
11265 
OPERATION_MODE
11266 
DUAL_PORT
11267 
PARAMETER_UNKNOWN
11268 
USR
11269 
WIDTH_A
11270 
12
11271 
PARAMETER_UNKNOWN
11272 
USR
11273 
WIDTHAD_A
11274 
5
11275 
PARAMETER_UNKNOWN
11276 
USR
11277 
NUMWORDS_A
11278 
32
11279 
PARAMETER_UNKNOWN
11280 
USR
11281 
OUTDATA_REG_A
11282 
UNREGISTERED
11283 
PARAMETER_UNKNOWN
11284 
DEF
11285 
ADDRESS_ACLR_A
11286 
NONE
11287 
PARAMETER_UNKNOWN
11288 
USR
11289 
OUTDATA_ACLR_A
11290 
NONE
11291 
PARAMETER_UNKNOWN
11292 
DEF
11293 
WRCONTROL_ACLR_A
11294 
NONE
11295 
PARAMETER_UNKNOWN
11296 
USR
11297 
INDATA_ACLR_A
11298 
NONE
11299 
PARAMETER_UNKNOWN
11300 
USR
11301 
BYTEENA_ACLR_A
11302 
NONE
11303 
PARAMETER_UNKNOWN
11304 
DEF
11305 
WIDTH_B
11306 
12
11307 
PARAMETER_UNKNOWN
11308 
USR
11309 
WIDTHAD_B
11310 
5
11311 
PARAMETER_UNKNOWN
11312 
USR
11313 
NUMWORDS_B
11314 
32
11315 
PARAMETER_UNKNOWN
11316 
USR
11317 
INDATA_REG_B
11318 
CLOCK1
11319 
PARAMETER_UNKNOWN
11320 
DEF
11321 
WRCONTROL_WRADDRESS_REG_B
11322 
CLOCK1
11323 
PARAMETER_UNKNOWN
11324 
DEF
11325 
RDCONTROL_REG_B
11326 
CLOCK1
11327 
PARAMETER_UNKNOWN
11328 
DEF
11329 
ADDRESS_REG_B
11330 
CLOCK0
11331 
PARAMETER_UNKNOWN
11332 
USR
11333 
OUTDATA_REG_B
11334 
UNREGISTERED
11335 
PARAMETER_UNKNOWN
11336 
USR
11337 
BYTEENA_REG_B
11338 
CLOCK1
11339 
PARAMETER_UNKNOWN
11340 
DEF
11341 
INDATA_ACLR_B
11342 
NONE
11343 
PARAMETER_UNKNOWN
11344 
DEF
11345 
WRCONTROL_ACLR_B
11346 
NONE
11347 
PARAMETER_UNKNOWN
11348 
DEF
11349 
ADDRESS_ACLR_B
11350 
NONE
11351 
PARAMETER_UNKNOWN
11352 
USR
11353 
OUTDATA_ACLR_B
11354 
NONE
11355 
PARAMETER_UNKNOWN
11356 
USR
11357 
RDCONTROL_ACLR_B
11358 
NONE
11359 
PARAMETER_UNKNOWN
11360 
DEF
11361 
BYTEENA_ACLR_B
11362 
NONE
11363 
PARAMETER_UNKNOWN
11364 
DEF
11365 
WIDTH_BYTEENA_A
11366 
1
11367 
PARAMETER_UNKNOWN
11368 
DEF
11369 
WIDTH_BYTEENA_B
11370 
1
11371 
PARAMETER_UNKNOWN
11372 
DEF
11373 
RAM_BLOCK_TYPE
11374 
AUTO
11375 
PARAMETER_UNKNOWN
11376 
USR
11377 
BYTE_SIZE
11378 
8
11379 
PARAMETER_UNKNOWN
11380 
DEF
11381 
READ_DURING_WRITE_MODE_MIXED_PORTS
11382 
OLD_DATA
11383 
PARAMETER_UNKNOWN
11384 
USR
11385 
READ_DURING_WRITE_MODE_PORT_A
11386 
NEW_DATA_NO_NBE_READ
11387 
PARAMETER_UNKNOWN
11388 
DEF
11389 
READ_DURING_WRITE_MODE_PORT_B
11390 
NEW_DATA_NO_NBE_READ
11391 
PARAMETER_UNKNOWN
11392 
DEF
11393 
INIT_FILE
11394 
UNUSED
11395 
PARAMETER_UNKNOWN
11396 
DEF
11397 
INIT_FILE_LAYOUT
11398 
PORT_A
11399 
PARAMETER_UNKNOWN
11400 
DEF
11401 
MAXIMUM_DEPTH
11402 
 
11403 
PARAMETER_UNKNOWN
11404 
DEF
11405 
CLOCK_ENABLE_INPUT_A
11406 
NORMAL
11407 
PARAMETER_UNKNOWN
11408 
DEF
11409 
CLOCK_ENABLE_INPUT_B
11410 
NORMAL
11411 
PARAMETER_UNKNOWN
11412 
DEF
11413 
CLOCK_ENABLE_OUTPUT_A
11414 
NORMAL
11415 
PARAMETER_UNKNOWN
11416 
DEF
11417 
CLOCK_ENABLE_OUTPUT_B
11418 
NORMAL
11419 
PARAMETER_UNKNOWN
11420 
DEF
11421 
CLOCK_ENABLE_CORE_A
11422 
USE_INPUT_CLKEN
11423 
PARAMETER_UNKNOWN
11424 
DEF
11425 
CLOCK_ENABLE_CORE_B
11426 
USE_INPUT_CLKEN
11427 
PARAMETER_UNKNOWN
11428 
DEF
11429 
ENABLE_ECC
11430 
FALSE
11431 
PARAMETER_UNKNOWN
11432 
DEF
11433 
DEVICE_FAMILY
11434 
Stratix II
11435 
PARAMETER_UNKNOWN
11436 
USR
11437 
CBXI_PARAMETER
11438 
altsyncram_vpi1
11439 
PARAMETER_UNKNOWN
11440 
USR
11441 
}
11442 
# used_port {
11443 
wren_a
11444 
-1
11445 
3
11446 
q_b9
11447 
-1
11448 
3
11449 
q_b8
11450 
-1
11451 
3
11452 
q_b7
11453 
-1
11454 
3
11455 
q_b6
11456 
-1
11457 
3
11458 
q_b5
11459 
-1
11460 
3
11461 
q_b4
11462 
-1
11463 
3
11464 
q_b3
11465 
-1
11466 
3
11467 
q_b2
11468 
-1
11469 
3
11470 
q_b11
11471 
-1
11472 
3
11473 
q_b10
11474 
-1
11475 
3
11476 
q_b1
11477 
-1
11478 
3
11479 
q_b0
11480 
-1
11481 
3
11482 
data_a9
11483 
-1
11484 
3
11485 
data_a8
11486 
-1
11487 
3
11488 
data_a7
11489 
-1
11490 
3
11491 
data_a6
11492 
-1
11493 
3
11494 
data_a5
11495 
-1
11496 
3
11497 
data_a4
11498 
-1
11499 
3
11500 
data_a3
11501 
-1
11502 
3
11503 
data_a2
11504 
-1
11505 
3
11506 
data_a11
11507 
-1
11508 
3
11509 
data_a10
11510 
-1
11511 
3
11512 
data_a1
11513 
-1
11514 
3
11515 
data_a0
11516 
-1
11517 
3
11518 
clock0
11519 
-1
11520 
3
11521 
address_b4
11522 
-1
11523 
3
11524 
address_b3
11525 
-1
11526 
3
11527 
address_b2
11528 
-1
11529 
3
11530 
address_b1
11531 
-1
11532 
3
11533 
address_b0
11534 
-1
11535 
3
11536 
address_a4
11537 
-1
11538 
3
11539 
address_a3
11540 
-1
11541 
3
11542 
address_a2
11543 
-1
11544 
3
11545 
address_a1
11546 
-1
11547 
3
11548 
address_a0
11549 
-1
11550 
3
11551 
}
11552 
# include_file {
11553 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
11554 
c22bfd353214c01495b560fc34e47d79
11555 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
11556 
2263a3bdfffeb150af977ee13902f70
11557 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
11558 
bd0e2f5e01c1bd360461dceb53d48
11559 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
11560 
f39123b8592ab2dac019716e56b3ec18
11561 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
11562 
60d229340bc3c24acb0a137b4849830
11563 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
11564 
d4e3a69a331d3a99d3281790d99a1ebd
11565 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
11566 
e66a83eccf6717bed97c99d891ad085
11567 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
11568 
99d442b5b66c88db4daf94d99c6e4e77
11569 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
11570 
74e08939f96a7ea8e7a4d59a5b01fe7
11571 
}
11572 
# lmf
11573 
d:|altera|72|quartus|lmf|
11574 
d41d8cd98f0b24e980998ecf8427e
11575 
# macro_sequence
11576 
 
11577 
# end
11578 
# entity
11579 
altsyncram_vpi1
11580 
# storage
11581 
db|LB.(59).cnf
11582 
db|LB.(59).cnf
11583 
# case_insensitive
11584 
# source_file
11585 
db|altsyncram_vpi1.tdf
11586 
4813e283e47fa0a66d136f5450326c5
11587 
6
11588 
# used_port {
11589 
wren_a
11590 
-1
11591 
3
11592 
q_b9
11593 
-1
11594 
3
11595 
q_b8
11596 
-1
11597 
3
11598 
q_b7
11599 
-1
11600 
3
11601 
q_b6
11602 
-1
11603 
3
11604 
q_b5
11605 
-1
11606 
3
11607 
q_b4
11608 
-1
11609 
3
11610 
q_b3
11611 
-1
11612 
3
11613 
q_b2
11614 
-1
11615 
3
11616 
q_b11
11617 
-1
11618 
3
11619 
q_b10
11620 
-1
11621 
3
11622 
q_b1
11623 
-1
11624 
3
11625 
q_b0
11626 
-1
11627 
3
11628 
data_a9
11629 
-1
11630 
3
11631 
data_a8
11632 
-1
11633 
3
11634 
data_a7
11635 
-1
11636 
3
11637 
data_a6
11638 
-1
11639 
3
11640 
data_a5
11641 
-1
11642 
3
11643 
data_a4
11644 
-1
11645 
3
11646 
data_a3
11647 
-1
11648 
3
11649 
data_a2
11650 
-1
11651 
3
11652 
data_a11
11653 
-1
11654 
3
11655 
data_a10
11656 
-1
11657 
3
11658 
data_a1
11659 
-1
11660 
3
11661 
data_a0
11662 
-1
11663 
3
11664 
clock0
11665 
-1
11666 
3
11667 
address_b4
11668 
-1
11669 
3
11670 
address_b3
11671 
-1
11672 
3
11673 
address_b2
11674 
-1
11675 
3
11676 
address_b1
11677 
-1
11678 
3
11679 
address_b0
11680 
-1
11681 
3
11682 
address_a4
11683 
-1
11684 
3
11685 
address_a3
11686 
-1
11687 
3
11688 
address_a2
11689 
-1
11690 
3
11691 
address_a1
11692 
-1
11693 
3
11694 
address_a0
11695 
-1
11696 
3
11697 
}
11698 
# lmf
11699 
d:|altera|72|quartus|lmf|
11700 
d41d8cd98f0b24e980998ecf8427e
11701 
# macro_sequence
11702 
 
11703 
# end
11704 
# entity
11705 
altsyncram
11706 
# storage
11707 
db|LB.(60).cnf
11708 
db|LB.(60).cnf
11709 
# case_insensitive
11710 
# source_file
11711 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
11712 
1a8e44bce3df5c9cae2128978e887541
11713 
6
11714 
# user_parameter {
11715 
BYTE_SIZE_BLOCK
11716 
8
11717 
PARAMETER_UNKNOWN
11718 
DEF
11719 
AUTO_CARRY_CHAINS
11720 
ON
11721 
AUTO_CARRY
11722 
USR
11723 
IGNORE_CARRY_BUFFERS
11724 
OFF
11725 
IGNORE_CARRY
11726 
USR
11727 
AUTO_CASCADE_CHAINS
11728 
ON
11729 
AUTO_CASCADE
11730 
USR
11731 
IGNORE_CASCADE_BUFFERS
11732 
OFF
11733 
IGNORE_CASCADE
11734 
USR
11735 
WIDTH_BYTEENA
11736 
1
11737 
PARAMETER_UNKNOWN
11738 
DEF
11739 
OPERATION_MODE
11740 
DUAL_PORT
11741 
PARAMETER_UNKNOWN
11742 
USR
11743 
WIDTH_A
11744 
48
11745 
PARAMETER_UNKNOWN
11746 
USR
11747 
WIDTHAD_A
11748 
12
11749 
PARAMETER_UNKNOWN
11750 
USR
11751 
NUMWORDS_A
11752 
4096
11753 
PARAMETER_UNKNOWN
11754 
USR
11755 
OUTDATA_REG_A
11756 
UNREGISTERED
11757 
PARAMETER_UNKNOWN
11758 
DEF
11759 
ADDRESS_ACLR_A
11760 
NONE
11761 
PARAMETER_UNKNOWN
11762 
USR
11763 
OUTDATA_ACLR_A
11764 
NONE
11765 
PARAMETER_UNKNOWN
11766 
DEF
11767 
WRCONTROL_ACLR_A
11768 
NONE
11769 
PARAMETER_UNKNOWN
11770 
USR
11771 
INDATA_ACLR_A
11772 
NONE
11773 
PARAMETER_UNKNOWN
11774 
USR
11775 
BYTEENA_ACLR_A
11776 
NONE
11777 
PARAMETER_UNKNOWN
11778 
DEF
11779 
WIDTH_B
11780 
48
11781 
PARAMETER_UNKNOWN
11782 
USR
11783 
WIDTHAD_B
11784 
12
11785 
PARAMETER_UNKNOWN
11786 
USR
11787 
NUMWORDS_B
11788 
4096
11789 
PARAMETER_UNKNOWN
11790 
USR
11791 
INDATA_REG_B
11792 
CLOCK1
11793 
PARAMETER_UNKNOWN
11794 
DEF
11795 
WRCONTROL_WRADDRESS_REG_B
11796 
CLOCK1
11797 
PARAMETER_UNKNOWN
11798 
DEF
11799 
RDCONTROL_REG_B
11800 
CLOCK1
11801 
PARAMETER_UNKNOWN
11802 
DEF
11803 
ADDRESS_REG_B
11804 
CLOCK0
11805 
PARAMETER_UNKNOWN
11806 
USR
11807 
OUTDATA_REG_B
11808 
UNREGISTERED
11809 
PARAMETER_UNKNOWN
11810 
USR
11811 
BYTEENA_REG_B
11812 
CLOCK1
11813 
PARAMETER_UNKNOWN
11814 
DEF
11815 
INDATA_ACLR_B
11816 
NONE
11817 
PARAMETER_UNKNOWN
11818 
DEF
11819 
WRCONTROL_ACLR_B
11820 
NONE
11821 
PARAMETER_UNKNOWN
11822 
DEF
11823 
ADDRESS_ACLR_B
11824 
NONE
11825 
PARAMETER_UNKNOWN
11826 
USR
11827 
OUTDATA_ACLR_B
11828 
NONE
11829 
PARAMETER_UNKNOWN
11830 
USR
11831 
RDCONTROL_ACLR_B
11832 
NONE
11833 
PARAMETER_UNKNOWN
11834 
DEF
11835 
BYTEENA_ACLR_B
11836 
NONE
11837 
PARAMETER_UNKNOWN
11838 
DEF
11839 
WIDTH_BYTEENA_A
11840 
1
11841 
PARAMETER_UNKNOWN
11842 
DEF
11843 
WIDTH_BYTEENA_B
11844 
1
11845 
PARAMETER_UNKNOWN
11846 
DEF
11847 
RAM_BLOCK_TYPE
11848 
AUTO
11849 
PARAMETER_UNKNOWN
11850 
USR
11851 
BYTE_SIZE
11852 
8
11853 
PARAMETER_UNKNOWN
11854 
DEF
11855 
READ_DURING_WRITE_MODE_MIXED_PORTS
11856 
OLD_DATA
11857 
PARAMETER_UNKNOWN
11858 
USR
11859 
READ_DURING_WRITE_MODE_PORT_A
11860 
NEW_DATA_NO_NBE_READ
11861 
PARAMETER_UNKNOWN
11862 
DEF
11863 
READ_DURING_WRITE_MODE_PORT_B
11864 
NEW_DATA_NO_NBE_READ
11865 
PARAMETER_UNKNOWN
11866 
DEF
11867 
INIT_FILE
11868 
UNUSED
11869 
PARAMETER_UNKNOWN
11870 
DEF
11871 
INIT_FILE_LAYOUT
11872 
PORT_A
11873 
PARAMETER_UNKNOWN
11874 
DEF
11875 
MAXIMUM_DEPTH
11876 
 
11877 
PARAMETER_UNKNOWN
11878 
DEF
11879 
CLOCK_ENABLE_INPUT_A
11880 
NORMAL
11881 
PARAMETER_UNKNOWN
11882 
DEF
11883 
CLOCK_ENABLE_INPUT_B
11884 
NORMAL
11885 
PARAMETER_UNKNOWN
11886 
DEF
11887 
CLOCK_ENABLE_OUTPUT_A
11888 
NORMAL
11889 
PARAMETER_UNKNOWN
11890 
DEF
11891 
CLOCK_ENABLE_OUTPUT_B
11892 
NORMAL
11893 
PARAMETER_UNKNOWN
11894 
DEF
11895 
CLOCK_ENABLE_CORE_A
11896 
USE_INPUT_CLKEN
11897 
PARAMETER_UNKNOWN
11898 
DEF
11899 
CLOCK_ENABLE_CORE_B
11900 
USE_INPUT_CLKEN
11901 
PARAMETER_UNKNOWN
11902 
DEF
11903 
ENABLE_ECC
11904 
FALSE
11905 
PARAMETER_UNKNOWN
11906 
DEF
11907 
DEVICE_FAMILY
11908 
Stratix II
11909 
PARAMETER_UNKNOWN
11910 
USR
11911 
CBXI_PARAMETER
11912 
altsyncram_94j1
11913 
PARAMETER_UNKNOWN
11914 
USR
11915 
}
11916 
# used_port {
11917 
wren_a
11918 
-1
11919 
3
11920 
q_b9
11921 
-1
11922 
3
11923 
q_b8
11924 
-1
11925 
3
11926 
q_b7
11927 
-1
11928 
3
11929 
q_b6
11930 
-1
11931 
3
11932 
q_b5
11933 
-1
11934 
3
11935 
q_b47
11936 
-1
11937 
3
11938 
q_b46
11939 
-1
11940 
3
11941 
q_b45
11942 
-1
11943 
3
11944 
q_b44
11945 
-1
11946 
3
11947 
q_b43
11948 
-1
11949 
3
11950 
q_b42
11951 
-1
11952 
3
11953 
q_b41
11954 
-1
11955 
3
11956 
q_b40
11957 
-1
11958 
3
11959 
q_b4
11960 
-1
11961 
3
11962 
q_b39
11963 
-1
11964 
3
11965 
q_b38
11966 
-1
11967 
3
11968 
q_b37
11969 
-1
11970 
3
11971 
q_b36
11972 
-1
11973 
3
11974 
q_b35
11975 
-1
11976 
3
11977 
q_b34
11978 
-1
11979 
3
11980 
q_b33
11981 
-1
11982 
3
11983 
q_b32
11984 
-1
11985 
3
11986 
q_b31
11987 
-1
11988 
3
11989 
q_b30
11990 
-1
11991 
3
11992 
q_b3
11993 
-1
11994 
3
11995 
q_b29
11996 
-1
11997 
3
11998 
q_b28
11999 
-1
12000 
3
12001 
q_b27
12002 
-1
12003 
3
12004 
q_b26
12005 
-1
12006 
3
12007 
q_b25
12008 
-1
12009 
3
12010 
q_b24
12011 
-1
12012 
3
12013 
q_b23
12014 
-1
12015 
3
12016 
q_b22
12017 
-1
12018 
3
12019 
q_b21
12020 
-1
12021 
3
12022 
q_b20
12023 
-1
12024 
3
12025 
q_b2
12026 
-1
12027 
3
12028 
q_b19
12029 
-1
12030 
3
12031 
q_b18
12032 
-1
12033 
3
12034 
q_b17
12035 
-1
12036 
3
12037 
q_b16
12038 
-1
12039 
3
12040 
q_b15
12041 
-1
12042 
3
12043 
q_b14
12044 
-1
12045 
3
12046 
q_b13
12047 
-1
12048 
3
12049 
q_b12
12050 
-1
12051 
3
12052 
q_b11
12053 
-1
12054 
3
12055 
q_b10
12056 
-1
12057 
3
12058 
q_b1
12059 
-1
12060 
3
12061 
q_b0
12062 
-1
12063 
3
12064 
data_a9
12065 
-1
12066 
3
12067 
data_a8
12068 
-1
12069 
3
12070 
data_a7
12071 
-1
12072 
3
12073 
data_a6
12074 
-1
12075 
3
12076 
data_a5
12077 
-1
12078 
3
12079 
data_a47
12080 
-1
12081 
3
12082 
data_a46
12083 
-1
12084 
3
12085 
data_a45
12086 
-1
12087 
3
12088 
data_a44
12089 
-1
12090 
3
12091 
data_a43
12092 
-1
12093 
3
12094 
data_a42
12095 
-1
12096 
3
12097 
data_a41
12098 
-1
12099 
3
12100 
data_a40
12101 
-1
12102 
3
12103 
data_a4
12104 
-1
12105 
3
12106 
data_a39
12107 
-1
12108 
3
12109 
data_a38
12110 
-1
12111 
3
12112 
data_a37
12113 
-1
12114 
3
12115 
data_a36
12116 
-1
12117 
3
12118 
data_a35
12119 
-1
12120 
3
12121 
data_a34
12122 
-1
12123 
3
12124 
data_a33
12125 
-1
12126 
3
12127 
data_a32
12128 
-1
12129 
3
12130 
data_a31
12131 
-1
12132 
3
12133 
data_a30
12134 
-1
12135 
3
12136 
data_a3
12137 
-1
12138 
3
12139 
data_a29
12140 
-1
12141 
3
12142 
data_a28
12143 
-1
12144 
3
12145 
data_a27
12146 
-1
12147 
3
12148 
data_a26
12149 
-1
12150 
3
12151 
data_a25
12152 
-1
12153 
3
12154 
data_a24
12155 
-1
12156 
3
12157 
data_a23
12158 
-1
12159 
3
12160 
data_a22
12161 
-1
12162 
3
12163 
data_a21
12164 
-1
12165 
3
12166 
data_a20
12167 
-1
12168 
3
12169 
data_a2
12170 
-1
12171 
3
12172 
data_a19
12173 
-1
12174 
3
12175 
data_a18
12176 
-1
12177 
3
12178 
data_a17
12179 
-1
12180 
3
12181 
data_a16
12182 
-1
12183 
3
12184 
data_a15
12185 
-1
12186 
3
12187 
data_a14
12188 
-1
12189 
3
12190 
data_a13
12191 
-1
12192 
3
12193 
data_a12
12194 
-1
12195 
3
12196 
data_a11
12197 
-1
12198 
3
12199 
data_a10
12200 
-1
12201 
3
12202 
data_a1
12203 
-1
12204 
3
12205 
data_a0
12206 
-1
12207 
3
12208 
clock0
12209 
-1
12210 
3
12211 
address_b9
12212 
-1
12213 
3
12214 
address_b8
12215 
-1
12216 
3
12217 
address_b7
12218 
-1
12219 
3
12220 
address_b6
12221 
-1
12222 
3
12223 
address_b5
12224 
-1
12225 
3
12226 
address_b4
12227 
-1
12228 
3
12229 
address_b3
12230 
-1
12231 
3
12232 
address_b2
12233 
-1
12234 
3
12235 
address_b11
12236 
-1
12237 
3
12238 
address_b10
12239 
-1
12240 
3
12241 
address_b1
12242 
-1
12243 
3
12244 
address_b0
12245 
-1
12246 
3
12247 
address_a9
12248 
-1
12249 
3
12250 
address_a8
12251 
-1
12252 
3
12253 
address_a7
12254 
-1
12255 
3
12256 
address_a6
12257 
-1
12258 
3
12259 
address_a5
12260 
-1
12261 
3
12262 
address_a4
12263 
-1
12264 
3
12265 
address_a3
12266 
-1
12267 
3
12268 
address_a2
12269 
-1
12270 
3
12271 
address_a11
12272 
-1
12273 
3
12274 
address_a10
12275 
-1
12276 
3
12277 
address_a1
12278 
-1
12279 
3
12280 
address_a0
12281 
-1
12282 
3
12283 
}
12284 
# include_file {
12285 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
12286 
c22bfd353214c01495b560fc34e47d79
12287 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
12288 
2263a3bdfffeb150af977ee13902f70
12289 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
12290 
bd0e2f5e01c1bd360461dceb53d48
12291 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
12292 
f39123b8592ab2dac019716e56b3ec18
12293 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
12294 
60d229340bc3c24acb0a137b4849830
12295 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
12296 
d4e3a69a331d3a99d3281790d99a1ebd
12297 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
12298 
e66a83eccf6717bed97c99d891ad085
12299 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
12300 
99d442b5b66c88db4daf94d99c6e4e77
12301 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
12302 
74e08939f96a7ea8e7a4d59a5b01fe7
12303 
}
12304 
# lmf
12305 
d:|altera|72|quartus|lmf|
12306 
d41d8cd98f0b24e980998ecf8427e
12307 
# macro_sequence
12308 
 
12309 
# end
12310 
# entity
12311 
altsyncram_94j1
12312 
# storage
12313 
db|LB.(61).cnf
12314 
db|LB.(61).cnf
12315 
# case_insensitive
12316 
# source_file
12317 
db|altsyncram_94j1.tdf
12318 
da3d6bb57313909cb9671a9eb759a2f4
12319 
6
12320 
# used_port {
12321 
wren_a
12322 
-1
12323 
3
12324 
q_b9
12325 
-1
12326 
3
12327 
q_b8
12328 
-1
12329 
3
12330 
q_b7
12331 
-1
12332 
3
12333 
q_b6
12334 
-1
12335 
3
12336 
q_b5
12337 
-1
12338 
3
12339 
q_b47
12340 
-1
12341 
3
12342 
q_b46
12343 
-1
12344 
3
12345 
q_b45
12346 
-1
12347 
3
12348 
q_b44
12349 
-1
12350 
3
12351 
q_b43
12352 
-1
12353 
3
12354 
q_b42
12355 
-1
12356 
3
12357 
q_b41
12358 
-1
12359 
3
12360 
q_b40
12361 
-1
12362 
3
12363 
q_b4
12364 
-1
12365 
3
12366 
q_b39
12367 
-1
12368 
3
12369 
q_b38
12370 
-1
12371 
3
12372 
q_b37
12373 
-1
12374 
3
12375 
q_b36
12376 
-1
12377 
3
12378 
q_b35
12379 
-1
12380 
3
12381 
q_b34
12382 
-1
12383 
3
12384 
q_b33
12385 
-1
12386 
3
12387 
q_b32
12388 
-1
12389 
3
12390 
q_b31
12391 
-1
12392 
3
12393 
q_b30
12394 
-1
12395 
3
12396 
q_b3
12397 
-1
12398 
3
12399 
q_b29
12400 
-1
12401 
3
12402 
q_b28
12403 
-1
12404 
3
12405 
q_b27
12406 
-1
12407 
3
12408 
q_b26
12409 
-1
12410 
3
12411 
q_b25
12412 
-1
12413 
3
12414 
q_b24
12415 
-1
12416 
3
12417 
q_b23
12418 
-1
12419 
3
12420 
q_b22
12421 
-1
12422 
3
12423 
q_b21
12424 
-1
12425 
3
12426 
q_b20
12427 
-1
12428 
3
12429 
q_b2
12430 
-1
12431 
3
12432 
q_b19
12433 
-1
12434 
3
12435 
q_b18
12436 
-1
12437 
3
12438 
q_b17
12439 
-1
12440 
3
12441 
q_b16
12442 
-1
12443 
3
12444 
q_b15
12445 
-1
12446 
3
12447 
q_b14
12448 
-1
12449 
3
12450 
q_b13
12451 
-1
12452 
3
12453 
q_b12
12454 
-1
12455 
3
12456 
q_b11
12457 
-1
12458 
3
12459 
q_b10
12460 
-1
12461 
3
12462 
q_b1
12463 
-1
12464 
3
12465 
q_b0
12466 
-1
12467 
3
12468 
data_a9
12469 
-1
12470 
3
12471 
data_a8
12472 
-1
12473 
3
12474 
data_a7
12475 
-1
12476 
3
12477 
data_a6
12478 
-1
12479 
3
12480 
data_a5
12481 
-1
12482 
3
12483 
data_a47
12484 
-1
12485 
3
12486 
data_a46
12487 
-1
12488 
3
12489 
data_a45
12490 
-1
12491 
3
12492 
data_a44
12493 
-1
12494 
3
12495 
data_a43
12496 
-1
12497 
3
12498 
data_a42
12499 
-1
12500 
3
12501 
data_a41
12502 
-1
12503 
3
12504 
data_a40
12505 
-1
12506 
3
12507 
data_a4
12508 
-1
12509 
3
12510 
data_a39
12511 
-1
12512 
3
12513 
data_a38
12514 
-1
12515 
3
12516 
data_a37
12517 
-1
12518 
3
12519 
data_a36
12520 
-1
12521 
3
12522 
data_a35
12523 
-1
12524 
3
12525 
data_a34
12526 
-1
12527 
3
12528 
data_a33
12529 
-1
12530 
3
12531 
data_a32
12532 
-1
12533 
3
12534 
data_a31
12535 
-1
12536 
3
12537 
data_a30
12538 
-1
12539 
3
12540 
data_a3
12541 
-1
12542 
3
12543 
data_a29
12544 
-1
12545 
3
12546 
data_a28
12547 
-1
12548 
3
12549 
data_a27
12550 
-1
12551 
3
12552 
data_a26
12553 
-1
12554 
3
12555 
data_a25
12556 
-1
12557 
3
12558 
data_a24
12559 
-1
12560 
3
12561 
data_a23
12562 
-1
12563 
3
12564 
data_a22
12565 
-1
12566 
3
12567 
data_a21
12568 
-1
12569 
3
12570 
data_a20
12571 
-1
12572 
3
12573 
data_a2
12574 
-1
12575 
3
12576 
data_a19
12577 
-1
12578 
3
12579 
data_a18
12580 
-1
12581 
3
12582 
data_a17
12583 
-1
12584 
3
12585 
data_a16
12586 
-1
12587 
3
12588 
data_a15
12589 
-1
12590 
3
12591 
data_a14
12592 
-1
12593 
3
12594 
data_a13
12595 
-1
12596 
3
12597 
data_a12
12598 
-1
12599 
3
12600 
data_a11
12601 
-1
12602 
3
12603 
data_a10
12604 
-1
12605 
3
12606 
data_a1
12607 
-1
12608 
3
12609 
data_a0
12610 
-1
12611 
3
12612 
clock0
12613 
-1
12614 
3
12615 
address_b9
12616 
-1
12617 
3
12618 
address_b8
12619 
-1
12620 
3
12621 
address_b7
12622 
-1
12623 
3
12624 
address_b6
12625 
-1
12626 
3
12627 
address_b5
12628 
-1
12629 
3
12630 
address_b4
12631 
-1
12632 
3
12633 
address_b3
12634 
-1
12635 
3
12636 
address_b2
12637 
-1
12638 
3
12639 
address_b11
12640 
-1
12641 
3
12642 
address_b10
12643 
-1
12644 
3
12645 
address_b1
12646 
-1
12647 
3
12648 
address_b0
12649 
-1
12650 
3
12651 
address_a9
12652 
-1
12653 
3
12654 
address_a8
12655 
-1
12656 
3
12657 
address_a7
12658 
-1
12659 
3
12660 
address_a6
12661 
-1
12662 
3
12663 
address_a5
12664 
-1
12665 
3
12666 
address_a4
12667 
-1
12668 
3
12669 
address_a3
12670 
-1
12671 
3
12672 
address_a2
12673 
-1
12674 
3
12675 
address_a11
12676 
-1
12677 
3
12678 
address_a10
12679 
-1
12680 
3
12681 
address_a1
12682 
-1
12683 
3
12684 
address_a0
12685 
-1
12686 
3
12687 
}
12688 
# lmf
12689 
d:|altera|72|quartus|lmf|
12690 
d41d8cd98f0b24e980998ecf8427e
12691 
# macro_sequence
12692 
 
12693 
# end
12694 
# entity
12695 
altsyncram
12696 
# storage
12697 
db|LB.(62).cnf
12698 
db|LB.(62).cnf
12699 
# case_insensitive
12700 
# source_file
12701 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
12702 
1a8e44bce3df5c9cae2128978e887541
12703 
6
12704 
# user_parameter {
12705 
BYTE_SIZE_BLOCK
12706 
8
12707 
PARAMETER_UNKNOWN
12708 
DEF
12709 
AUTO_CARRY_CHAINS
12710 
ON
12711 
AUTO_CARRY
12712 
USR
12713 
IGNORE_CARRY_BUFFERS
12714 
OFF
12715 
IGNORE_CARRY
12716 
USR
12717 
AUTO_CASCADE_CHAINS
12718 
ON
12719 
AUTO_CASCADE
12720 
USR
12721 
IGNORE_CASCADE_BUFFERS
12722 
OFF
12723 
IGNORE_CASCADE
12724 
USR
12725 
WIDTH_BYTEENA
12726 
1
12727 
PARAMETER_UNKNOWN
12728 
DEF
12729 
OPERATION_MODE
12730 
DUAL_PORT
12731 
PARAMETER_UNKNOWN
12732 
USR
12733 
WIDTH_A
12734 
12
12735 
PARAMETER_UNKNOWN
12736 
USR
12737 
WIDTHAD_A
12738 
12
12739 
PARAMETER_UNKNOWN
12740 
USR
12741 
NUMWORDS_A
12742 
4096
12743 
PARAMETER_UNKNOWN
12744 
USR
12745 
OUTDATA_REG_A
12746 
UNREGISTERED
12747 
PARAMETER_UNKNOWN
12748 
DEF
12749 
ADDRESS_ACLR_A
12750 
NONE
12751 
PARAMETER_UNKNOWN
12752 
USR
12753 
OUTDATA_ACLR_A
12754 
NONE
12755 
PARAMETER_UNKNOWN
12756 
DEF
12757 
WRCONTROL_ACLR_A
12758 
NONE
12759 
PARAMETER_UNKNOWN
12760 
USR
12761 
INDATA_ACLR_A
12762 
NONE
12763 
PARAMETER_UNKNOWN
12764 
USR
12765 
BYTEENA_ACLR_A
12766 
NONE
12767 
PARAMETER_UNKNOWN
12768 
DEF
12769 
WIDTH_B
12770 
12
12771 
PARAMETER_UNKNOWN
12772 
USR
12773 
WIDTHAD_B
12774 
12
12775 
PARAMETER_UNKNOWN
12776 
USR
12777 
NUMWORDS_B
12778 
4096
12779 
PARAMETER_UNKNOWN
12780 
USR
12781 
INDATA_REG_B
12782 
CLOCK1
12783 
PARAMETER_UNKNOWN
12784 
DEF
12785 
WRCONTROL_WRADDRESS_REG_B
12786 
CLOCK1
12787 
PARAMETER_UNKNOWN
12788 
DEF
12789 
RDCONTROL_REG_B
12790 
CLOCK1
12791 
PARAMETER_UNKNOWN
12792 
DEF
12793 
ADDRESS_REG_B
12794 
CLOCK0
12795 
PARAMETER_UNKNOWN
12796 
USR
12797 
OUTDATA_REG_B
12798 
UNREGISTERED
12799 
PARAMETER_UNKNOWN
12800 
USR
12801 
BYTEENA_REG_B
12802 
CLOCK1
12803 
PARAMETER_UNKNOWN
12804 
DEF
12805 
INDATA_ACLR_B
12806 
NONE
12807 
PARAMETER_UNKNOWN
12808 
DEF
12809 
WRCONTROL_ACLR_B
12810 
NONE
12811 
PARAMETER_UNKNOWN
12812 
DEF
12813 
ADDRESS_ACLR_B
12814 
NONE
12815 
PARAMETER_UNKNOWN
12816 
USR
12817 
OUTDATA_ACLR_B
12818 
NONE
12819 
PARAMETER_UNKNOWN
12820 
USR
12821 
RDCONTROL_ACLR_B
12822 
NONE
12823 
PARAMETER_UNKNOWN
12824 
DEF
12825 
BYTEENA_ACLR_B
12826 
NONE
12827 
PARAMETER_UNKNOWN
12828 
DEF
12829 
WIDTH_BYTEENA_A
12830 
1
12831 
PARAMETER_UNKNOWN
12832 
DEF
12833 
WIDTH_BYTEENA_B
12834 
1
12835 
PARAMETER_UNKNOWN
12836 
DEF
12837 
RAM_BLOCK_TYPE
12838 
AUTO
12839 
PARAMETER_UNKNOWN
12840 
USR
12841 
BYTE_SIZE
12842 
8
12843 
PARAMETER_UNKNOWN
12844 
DEF
12845 
READ_DURING_WRITE_MODE_MIXED_PORTS
12846 
OLD_DATA
12847 
PARAMETER_UNKNOWN
12848 
USR
12849 
READ_DURING_WRITE_MODE_PORT_A
12850 
NEW_DATA_NO_NBE_READ
12851 
PARAMETER_UNKNOWN
12852 
DEF
12853 
READ_DURING_WRITE_MODE_PORT_B
12854 
NEW_DATA_NO_NBE_READ
12855 
PARAMETER_UNKNOWN
12856 
DEF
12857 
INIT_FILE
12858 
UNUSED
12859 
PARAMETER_UNKNOWN
12860 
DEF
12861 
INIT_FILE_LAYOUT
12862 
PORT_A
12863 
PARAMETER_UNKNOWN
12864 
DEF
12865 
MAXIMUM_DEPTH
12866 
 
12867 
PARAMETER_UNKNOWN
12868 
DEF
12869 
CLOCK_ENABLE_INPUT_A
12870 
NORMAL
12871 
PARAMETER_UNKNOWN
12872 
DEF
12873 
CLOCK_ENABLE_INPUT_B
12874 
NORMAL
12875 
PARAMETER_UNKNOWN
12876 
DEF
12877 
CLOCK_ENABLE_OUTPUT_A
12878 
NORMAL
12879 
PARAMETER_UNKNOWN
12880 
DEF
12881 
CLOCK_ENABLE_OUTPUT_B
12882 
NORMAL
12883 
PARAMETER_UNKNOWN
12884 
DEF
12885 
CLOCK_ENABLE_CORE_A
12886 
USE_INPUT_CLKEN
12887 
PARAMETER_UNKNOWN
12888 
DEF
12889 
CLOCK_ENABLE_CORE_B
12890 
USE_INPUT_CLKEN
12891 
PARAMETER_UNKNOWN
12892 
DEF
12893 
ENABLE_ECC
12894 
FALSE
12895 
PARAMETER_UNKNOWN
12896 
DEF
12897 
DEVICE_FAMILY
12898 
Stratix II
12899 
PARAMETER_UNKNOWN
12900 
USR
12901 
CBXI_PARAMETER
12902 
altsyncram_n3j1
12903 
PARAMETER_UNKNOWN
12904 
USR
12905 
}
12906 
# used_port {
12907 
wren_a
12908 
-1
12909 
3
12910 
q_b9
12911 
-1
12912 
3
12913 
q_b8
12914 
-1
12915 
3
12916 
q_b7
12917 
-1
12918 
3
12919 
q_b6
12920 
-1
12921 
3
12922 
q_b5
12923 
-1
12924 
3
12925 
q_b4
12926 
-1
12927 
3
12928 
q_b3
12929 
-1
12930 
3
12931 
q_b2
12932 
-1
12933 
3
12934 
q_b11
12935 
-1
12936 
3
12937 
q_b10
12938 
-1
12939 
3
12940 
q_b1
12941 
-1
12942 
3
12943 
q_b0
12944 
-1
12945 
3
12946 
data_a9
12947 
-1
12948 
3
12949 
data_a8
12950 
-1
12951 
3
12952 
data_a7
12953 
-1
12954 
3
12955 
data_a6
12956 
-1
12957 
3
12958 
data_a5
12959 
-1
12960 
3
12961 
data_a4
12962 
-1
12963 
3
12964 
data_a3
12965 
-1
12966 
3
12967 
data_a2
12968 
-1
12969 
3
12970 
data_a11
12971 
-1
12972 
3
12973 
data_a10
12974 
-1
12975 
3
12976 
data_a1
12977 
-1
12978 
3
12979 
data_a0
12980 
-1
12981 
3
12982 
clock0
12983 
-1
12984 
3
12985 
address_b9
12986 
-1
12987 
3
12988 
address_b8
12989 
-1
12990 
3
12991 
address_b7
12992 
-1
12993 
3
12994 
address_b6
12995 
-1
12996 
3
12997 
address_b5
12998 
-1
12999 
3
13000 
address_b4
13001 
-1
13002 
3
13003 
address_b3
13004 
-1
13005 
3
13006 
address_b2
13007 
-1
13008 
3
13009 
address_b11
13010 
-1
13011 
3
13012 
address_b10
13013 
-1
13014 
3
13015 
address_b1
13016 
-1
13017 
3
13018 
address_b0
13019 
-1
13020 
3
13021 
address_a9
13022 
-1
13023 
3
13024 
address_a8
13025 
-1
13026 
3
13027 
address_a7
13028 
-1
13029 
3
13030 
address_a6
13031 
-1
13032 
3
13033 
address_a5
13034 
-1
13035 
3
13036 
address_a4
13037 
-1
13038 
3
13039 
address_a3
13040 
-1
13041 
3
13042 
address_a2
13043 
-1
13044 
3
13045 
address_a11
13046 
-1
13047 
3
13048 
address_a10
13049 
-1
13050 
3
13051 
address_a1
13052 
-1
13053 
3
13054 
address_a0
13055 
-1
13056 
3
13057 
}
13058 
# include_file {
13059 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
13060 
c22bfd353214c01495b560fc34e47d79
13061 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
13062 
2263a3bdfffeb150af977ee13902f70
13063 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
13064 
bd0e2f5e01c1bd360461dceb53d48
13065 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
13066 
f39123b8592ab2dac019716e56b3ec18
13067 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
13068 
60d229340bc3c24acb0a137b4849830
13069 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
13070 
d4e3a69a331d3a99d3281790d99a1ebd
13071 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
13072 
e66a83eccf6717bed97c99d891ad085
13073 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
13074 
99d442b5b66c88db4daf94d99c6e4e77
13075 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
13076 
74e08939f96a7ea8e7a4d59a5b01fe7
13077 
}
13078 
# lmf
13079 
d:|altera|72|quartus|lmf|
13080 
d41d8cd98f0b24e980998ecf8427e
13081 
# macro_sequence
13082 
 
13083 
# end
13084 
# entity
13085 
altsyncram_n3j1
13086 
# storage
13087 
db|LB.(63).cnf
13088 
db|LB.(63).cnf
13089 
# case_insensitive
13090 
# source_file
13091 
db|altsyncram_n3j1.tdf
13092 
a0b19e17eef5af2947e6fda8c81a176
13093 
6
13094 
# used_port {
13095 
wren_a
13096 
-1
13097 
3
13098 
q_b9
13099 
-1
13100 
3
13101 
q_b8
13102 
-1
13103 
3
13104 
q_b7
13105 
-1
13106 
3
13107 
q_b6
13108 
-1
13109 
3
13110 
q_b5
13111 
-1
13112 
3
13113 
q_b4
13114 
-1
13115 
3
13116 
q_b3
13117 
-1
13118 
3
13119 
q_b2
13120 
-1
13121 
3
13122 
q_b11
13123 
-1
13124 
3
13125 
q_b10
13126 
-1
13127 
3
13128 
q_b1
13129 
-1
13130 
3
13131 
q_b0
13132 
-1
13133 
3
13134 
data_a9
13135 
-1
13136 
3
13137 
data_a8
13138 
-1
13139 
3
13140 
data_a7
13141 
-1
13142 
3
13143 
data_a6
13144 
-1
13145 
3
13146 
data_a5
13147 
-1
13148 
3
13149 
data_a4
13150 
-1
13151 
3
13152 
data_a3
13153 
-1
13154 
3
13155 
data_a2
13156 
-1
13157 
3
13158 
data_a11
13159 
-1
13160 
3
13161 
data_a10
13162 
-1
13163 
3
13164 
data_a1
13165 
-1
13166 
3
13167 
data_a0
13168 
-1
13169 
3
13170 
clock0
13171 
-1
13172 
3
13173 
address_b9
13174 
-1
13175 
3
13176 
address_b8
13177 
-1
13178 
3
13179 
address_b7
13180 
-1
13181 
3
13182 
address_b6
13183 
-1
13184 
3
13185 
address_b5
13186 
-1
13187 
3
13188 
address_b4
13189 
-1
13190 
3
13191 
address_b3
13192 
-1
13193 
3
13194 
address_b2
13195 
-1
13196 
3
13197 
address_b11
13198 
-1
13199 
3
13200 
address_b10
13201 
-1
13202 
3
13203 
address_b1
13204 
-1
13205 
3
13206 
address_b0
13207 
-1
13208 
3
13209 
address_a9
13210 
-1
13211 
3
13212 
address_a8
13213 
-1
13214 
3
13215 
address_a7
13216 
-1
13217 
3
13218 
address_a6
13219 
-1
13220 
3
13221 
address_a5
13222 
-1
13223 
3
13224 
address_a4
13225 
-1
13226 
3
13227 
address_a3
13228 
-1
13229 
3
13230 
address_a2
13231 
-1
13232 
3
13233 
address_a11
13234 
-1
13235 
3
13236 
address_a10
13237 
-1
13238 
3
13239 
address_a1
13240 
-1
13241 
3
13242 
address_a0
13243 
-1
13244 
3
13245 
}
13246 
# lmf
13247 
d:|altera|72|quartus|lmf|
13248 
d41d8cd98f0b24e980998ecf8427e
13249 
# macro_sequence
13250 
 
13251 
# end
13252 
# entity
13253 
int2ext
13254 
# storage
13255 
db|LB.(64).cnf
13256 
db|LB.(64).cnf
13257 
# logic_option {
13258 
AUTO_RAM_RECOGNITION
13259 
ON
13260 
}
13261 
# case_insensitive
13262 
# source_file
13263 
int2ext|int2ext.vhd
13264 
ddece746adbcfd697e88ba140dbd2bc
13265 
4
13266 
# internal_option {
13267 
HDL_INITIAL_FANOUT_LIMIT
13268 
OFF
13269 
AUTO_RESOURCE_SHARING
13270 
OFF
13271 
AUTO_RAM_RECOGNITION
13272 
ON
13273 
AUTO_ROM_RECOGNITION
13274 
ON
13275 
}
13276 
# user_parameter {
13277 
data_width
13278 
64
13279 
PARAMETER_SIGNED_DEC
13280 
USR
13281 
ctrl_width
13282 
8
13283 
PARAMETER_SIGNED_DEC
13284 
USR
13285 
 constraint(in_data)
13286 
63 downto 0
13287 
PARAMETER_STRING
13288 
USR
13289 
 constraint(in_ctrl)
13290 
7 downto 0
13291 
PARAMETER_STRING
13292 
USR
13293 
 constraint(out_data)
13294 
63 downto 0
13295 
PARAMETER_STRING
13296 
USR
13297 
 constraint(out_ctrl)
13298 
7 downto 0
13299 
PARAMETER_STRING
13300 
USR
13301 
}
13302 
# lmf
13303 
d:|altera|72|quartus|lmf|maxplus2.lmf
13304 
9a59d39b0706640b4b2718e8a1ff1f
13305 
# macro_sequence
13306 
 
13307 
# end
13308 
# entity
13309 
vlan2ext
13310 
# storage
13311 
db|LB.(65).cnf
13312 
db|LB.(65).cnf
13313 
# logic_option {
13314 
AUTO_RAM_RECOGNITION
13315 
ON
13316 
}
13317 
# case_insensitive
13318 
# source_file
13319 
int2ext|vlan2ext.vhd
13320 
ffa74b60556ec6d549e3872883d7afa1
13321 
4
13322 
# internal_option {
13323 
HDL_INITIAL_FANOUT_LIMIT
13324 
OFF
13325 
AUTO_RESOURCE_SHARING
13326 
OFF
13327 
AUTO_RAM_RECOGNITION
13328 
ON
13329 
AUTO_ROM_RECOGNITION
13330 
ON
13331 
}
13332 
# user_parameter {
13333 
data_width
13334 
64
13335 
PARAMETER_SIGNED_DEC
13336 
USR
13337 
ctrl_width
13338 
8
13339 
PARAMETER_SIGNED_DEC
13340 
USR
13341 
 constraint(in_data)
13342 
63 downto 0
13343 
PARAMETER_STRING
13344 
USR
13345 
 constraint(in_ctrl)
13346 
7 downto 0
13347 
PARAMETER_STRING
13348 
USR
13349 
 constraint(exit_port)
13350 
7 downto 0
13351 
PARAMETER_STRING
13352 
USR
13353 
}
13354 
# include_file {
13355 
config.vhd
13356 
a9aaccd982e3760a0ac88fe1caf2098
13357 
}
13358 
# lmf
13359 
d:|altera|72|quartus|lmf|maxplus2.lmf
13360 
9a59d39b0706640b4b2718e8a1ff1f
13361 
# macro_sequence
13362 
 
13363 
# end
13364 
# entity
13365 
altsyncram
13366 
# storage
13367 
db|LB.(66).cnf
13368 
db|LB.(66).cnf
13369 
# case_insensitive
13370 
# source_file
13371 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
13372 
1a8e44bce3df5c9cae2128978e887541
13373 
6
13374 
# user_parameter {
13375 
BYTE_SIZE_BLOCK
13376 
8
13377 
PARAMETER_UNKNOWN
13378 
DEF
13379 
AUTO_CARRY_CHAINS
13380 
ON
13381 
AUTO_CARRY
13382 
USR
13383 
IGNORE_CARRY_BUFFERS
13384 
OFF
13385 
IGNORE_CARRY
13386 
USR
13387 
AUTO_CASCADE_CHAINS
13388 
ON
13389 
AUTO_CASCADE
13390 
USR
13391 
IGNORE_CASCADE_BUFFERS
13392 
OFF
13393 
IGNORE_CASCADE
13394 
USR
13395 
WIDTH_BYTEENA
13396 
1
13397 
PARAMETER_UNKNOWN
13398 
DEF
13399 
OPERATION_MODE
13400 
DUAL_PORT
13401 
PARAMETER_UNKNOWN
13402 
USR
13403 
WIDTH_A
13404 
4
13405 
PARAMETER_UNKNOWN
13406 
USR
13407 
WIDTHAD_A
13408 
5
13409 
PARAMETER_UNKNOWN
13410 
USR
13411 
NUMWORDS_A
13412 
32
13413 
PARAMETER_UNKNOWN
13414 
USR
13415 
OUTDATA_REG_A
13416 
UNREGISTERED
13417 
PARAMETER_UNKNOWN
13418 
DEF
13419 
ADDRESS_ACLR_A
13420 
NONE
13421 
PARAMETER_UNKNOWN
13422 
USR
13423 
OUTDATA_ACLR_A
13424 
NONE
13425 
PARAMETER_UNKNOWN
13426 
DEF
13427 
WRCONTROL_ACLR_A
13428 
NONE
13429 
PARAMETER_UNKNOWN
13430 
USR
13431 
INDATA_ACLR_A
13432 
NONE
13433 
PARAMETER_UNKNOWN
13434 
USR
13435 
BYTEENA_ACLR_A
13436 
NONE
13437 
PARAMETER_UNKNOWN
13438 
DEF
13439 
WIDTH_B
13440 
4
13441 
PARAMETER_UNKNOWN
13442 
USR
13443 
WIDTHAD_B
13444 
5
13445 
PARAMETER_UNKNOWN
13446 
USR
13447 
NUMWORDS_B
13448 
32
13449 
PARAMETER_UNKNOWN
13450 
USR
13451 
INDATA_REG_B
13452 
CLOCK1
13453 
PARAMETER_UNKNOWN
13454 
DEF
13455 
WRCONTROL_WRADDRESS_REG_B
13456 
CLOCK1
13457 
PARAMETER_UNKNOWN
13458 
DEF
13459 
RDCONTROL_REG_B
13460 
CLOCK1
13461 
PARAMETER_UNKNOWN
13462 
DEF
13463 
ADDRESS_REG_B
13464 
CLOCK0
13465 
PARAMETER_UNKNOWN
13466 
USR
13467 
OUTDATA_REG_B
13468 
UNREGISTERED
13469 
PARAMETER_UNKNOWN
13470 
USR
13471 
BYTEENA_REG_B
13472 
CLOCK1
13473 
PARAMETER_UNKNOWN
13474 
DEF
13475 
INDATA_ACLR_B
13476 
NONE
13477 
PARAMETER_UNKNOWN
13478 
DEF
13479 
WRCONTROL_ACLR_B
13480 
NONE
13481 
PARAMETER_UNKNOWN
13482 
DEF
13483 
ADDRESS_ACLR_B
13484 
NONE
13485 
PARAMETER_UNKNOWN
13486 
USR
13487 
OUTDATA_ACLR_B
13488 
NONE
13489 
PARAMETER_UNKNOWN
13490 
USR
13491 
RDCONTROL_ACLR_B
13492 
NONE
13493 
PARAMETER_UNKNOWN
13494 
DEF
13495 
BYTEENA_ACLR_B
13496 
NONE
13497 
PARAMETER_UNKNOWN
13498 
DEF
13499 
WIDTH_BYTEENA_A
13500 
1
13501 
PARAMETER_UNKNOWN
13502 
DEF
13503 
WIDTH_BYTEENA_B
13504 
1
13505 
PARAMETER_UNKNOWN
13506 
DEF
13507 
RAM_BLOCK_TYPE
13508 
AUTO
13509 
PARAMETER_UNKNOWN
13510 
USR
13511 
BYTE_SIZE
13512 
8
13513 
PARAMETER_UNKNOWN
13514 
DEF
13515 
READ_DURING_WRITE_MODE_MIXED_PORTS
13516 
OLD_DATA
13517 
PARAMETER_UNKNOWN
13518 
USR
13519 
READ_DURING_WRITE_MODE_PORT_A
13520 
NEW_DATA_NO_NBE_READ
13521 
PARAMETER_UNKNOWN
13522 
DEF
13523 
READ_DURING_WRITE_MODE_PORT_B
13524 
NEW_DATA_NO_NBE_READ
13525 
PARAMETER_UNKNOWN
13526 
DEF
13527 
INIT_FILE
13528 
UNUSED
13529 
PARAMETER_UNKNOWN
13530 
DEF
13531 
INIT_FILE_LAYOUT
13532 
PORT_A
13533 
PARAMETER_UNKNOWN
13534 
DEF
13535 
MAXIMUM_DEPTH
13536 
 
13537 
PARAMETER_UNKNOWN
13538 
DEF
13539 
CLOCK_ENABLE_INPUT_A
13540 
NORMAL
13541 
PARAMETER_UNKNOWN
13542 
DEF
13543 
CLOCK_ENABLE_INPUT_B
13544 
NORMAL
13545 
PARAMETER_UNKNOWN
13546 
DEF
13547 
CLOCK_ENABLE_OUTPUT_A
13548 
NORMAL
13549 
PARAMETER_UNKNOWN
13550 
DEF
13551 
CLOCK_ENABLE_OUTPUT_B
13552 
NORMAL
13553 
PARAMETER_UNKNOWN
13554 
DEF
13555 
CLOCK_ENABLE_CORE_A
13556 
USE_INPUT_CLKEN
13557 
PARAMETER_UNKNOWN
13558 
DEF
13559 
CLOCK_ENABLE_CORE_B
13560 
USE_INPUT_CLKEN
13561 
PARAMETER_UNKNOWN
13562 
DEF
13563 
ENABLE_ECC
13564 
FALSE
13565 
PARAMETER_UNKNOWN
13566 
DEF
13567 
DEVICE_FAMILY
13568 
Stratix II
13569 
PARAMETER_UNKNOWN
13570 
USR
13571 
CBXI_PARAMETER
13572 
altsyncram_1ni1
13573 
PARAMETER_UNKNOWN
13574 
USR
13575 
}
13576 
# used_port {
13577 
wren_a
13578 
-1
13579 
3
13580 
q_b3
13581 
-1
13582 
3
13583 
q_b2
13584 
-1
13585 
3
13586 
q_b1
13587 
-1
13588 
3
13589 
q_b0
13590 
-1
13591 
3
13592 
data_a3
13593 
-1
13594 
3
13595 
data_a2
13596 
-1
13597 
3
13598 
data_a1
13599 
-1
13600 
3
13601 
data_a0
13602 
-1
13603 
3
13604 
clock0
13605 
-1
13606 
3
13607 
address_b4
13608 
-1
13609 
3
13610 
address_b3
13611 
-1
13612 
3
13613 
address_b2
13614 
-1
13615 
3
13616 
address_b1
13617 
-1
13618 
3
13619 
address_b0
13620 
-1
13621 
3
13622 
address_a4
13623 
-1
13624 
3
13625 
address_a3
13626 
-1
13627 
3
13628 
address_a2
13629 
-1
13630 
3
13631 
address_a1
13632 
-1
13633 
3
13634 
address_a0
13635 
-1
13636 
3
13637 
}
13638 
# include_file {
13639 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
13640 
c22bfd353214c01495b560fc34e47d79
13641 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
13642 
2263a3bdfffeb150af977ee13902f70
13643 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
13644 
bd0e2f5e01c1bd360461dceb53d48
13645 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
13646 
f39123b8592ab2dac019716e56b3ec18
13647 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
13648 
60d229340bc3c24acb0a137b4849830
13649 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
13650 
d4e3a69a331d3a99d3281790d99a1ebd
13651 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
13652 
e66a83eccf6717bed97c99d891ad085
13653 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
13654 
99d442b5b66c88db4daf94d99c6e4e77
13655 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
13656 
74e08939f96a7ea8e7a4d59a5b01fe7
13657 
}
13658 
# lmf
13659 
d:|altera|72|quartus|lmf|
13660 
d41d8cd98f0b24e980998ecf8427e
13661 
# macro_sequence
13662 
 
13663 
# end
13664 
# entity
13665 
altsyncram_1ni1
13666 
# storage
13667 
db|LB.(67).cnf
13668 
db|LB.(67).cnf
13669 
# case_insensitive
13670 
# source_file
13671 
db|altsyncram_1ni1.tdf
13672 
74eb1c105751a254e707067612eee1
13673 
6
13674 
# used_port {
13675 
wren_a
13676 
-1
13677 
3
13678 
q_b3
13679 
-1
13680 
3
13681 
q_b2
13682 
-1
13683 
3
13684 
q_b1
13685 
-1
13686 
3
13687 
q_b0
13688 
-1
13689 
3
13690 
data_a3
13691 
-1
13692 
3
13693 
data_a2
13694 
-1
13695 
3
13696 
data_a1
13697 
-1
13698 
3
13699 
data_a0
13700 
-1
13701 
3
13702 
clock0
13703 
-1
13704 
3
13705 
address_b4
13706 
-1
13707 
3
13708 
address_b3
13709 
-1
13710 
3
13711 
address_b2
13712 
-1
13713 
3
13714 
address_b1
13715 
-1
13716 
3
13717 
address_b0
13718 
-1
13719 
3
13720 
address_a4
13721 
-1
13722 
3
13723 
address_a3
13724 
-1
13725 
3
13726 
address_a2
13727 
-1
13728 
3
13729 
address_a1
13730 
-1
13731 
3
13732 
address_a0
13733 
-1
13734 
3
13735 
}
13736 
# lmf
13737 
d:|altera|72|quartus|lmf|
13738 
d41d8cd98f0b24e980998ecf8427e
13739 
# macro_sequence
13740 
 
13741 
# end
13742 
# entity
13743 
router
13744 
# storage
13745 
db|LB.(15).cnf
13746 
db|LB.(15).cnf
13747 
# logic_option {
13748 
AUTO_RAM_RECOGNITION
13749 
ON
13750 
}
13751 
# case_insensitive
13752 
# source_file
13753 
Router|router.vhd
13754 
790f9bb8ab97e85116d6f228d7f15e
13755 
4
13756 
# internal_option {
13757 
HDL_INITIAL_FANOUT_LIMIT
13758 
OFF
13759 
AUTO_RESOURCE_SHARING
13760 
OFF
13761 
AUTO_RAM_RECOGNITION
13762 
ON
13763 
AUTO_ROM_RECOGNITION
13764 
ON
13765 
}
13766 
# user_parameter {
13767 
data_width
13768 
64
13769 
PARAMETER_SIGNED_DEC
13770 
USR
13771 
ctrl_width
13772 
8
13773 
PARAMETER_SIGNED_DEC
13774 
USR
13775 
 constraint(in_data)
13776 
63 downto 0
13777 
PARAMETER_STRING
13778 
USR
13779 
 constraint(in_ctrl)
13780 
7 downto 0
13781 
PARAMETER_STRING
13782 
USR
13783 
 constraint(out_data)
13784 
63 downto 0
13785 
PARAMETER_STRING
13786 
USR
13787 
 constraint(out_ctrl)
13788 
7 downto 0
13789 
PARAMETER_STRING
13790 
USR
13791 
}
13792 
# include_file {
13793 
config.vhd
13794 
a9aaccd982e3760a0ac88fe1caf2098
13795 
}
13796 
# lmf
13797 
d:|altera|72|quartus|lmf|maxplus2.lmf
13798 
9a59d39b0706640b4b2718e8a1ff1f
13799 
# macro_sequence
13800 
 
13801 
# end
13802 
# entity
13803 
balance_top
13804 
# storage
13805 
db|LB.(10).cnf
13806 
db|LB.(10).cnf
13807 
# logic_option {
13808 
AUTO_RAM_RECOGNITION
13809 
ON
13810 
}
13811 
# case_insensitive
13812 
# source_file
13813 
Balance|balance_top.vhd
13814 
501f221246739bda9c83d56543b089
13815 
4
13816 
# internal_option {
13817 
HDL_INITIAL_FANOUT_LIMIT
13818 
OFF
13819 
AUTO_RESOURCE_SHARING
13820 
OFF
13821 
AUTO_RAM_RECOGNITION
13822 
ON
13823 
AUTO_ROM_RECOGNITION
13824 
ON
13825 
}
13826 
# user_parameter {
13827 
data_width
13828 
64
13829 
PARAMETER_SIGNED_DEC
13830 
USR
13831 
ctrl_width
13832 
8
13833 
PARAMETER_SIGNED_DEC
13834 
USR
13835 
 constraint(in_data)
13836 
63 downto 0
13837 
PARAMETER_STRING
13838 
USR
13839 
 constraint(in_ctrl)
13840 
7 downto 0
13841 
PARAMETER_STRING
13842 
USR
13843 
 constraint(out_data)
13844 
63 downto 0
13845 
PARAMETER_STRING
13846 
USR
13847 
 constraint(out_ctrl)
13848 
7 downto 0
13849 
PARAMETER_STRING
13850 
USR
13851 
 constraint(in_next_mac)
13852 
47 downto 0
13853 
PARAMETER_STRING
13854 
USR
13855 
 constraint(in_exit_port)
13856 
7 downto 0
13857 
PARAMETER_STRING
13858 
USR
13859 
 constraint(key)
13860 
11 downto 0
13861 
PARAMETER_STRING
13862 
USR
13863 
}
13864 
# lmf
13865 
d:|altera|72|quartus|lmf|maxplus2.lmf
13866 
9a59d39b0706640b4b2718e8a1ff1f
13867 
# macro_sequence
13868 
 
13869 
# end
13870 
# entity
13871 
n_mac
13872 
# storage
13873 
db|LB.(12).cnf
13874 
db|LB.(12).cnf
13875 
# logic_option {
13876 
AUTO_RAM_RECOGNITION
13877 
ON
13878 
}
13879 
# case_insensitive
13880 
# source_file
13881 
Balance|n_mac.vhd
13882 
796f3eac336ccb4f5f8d5480d2df31ef
13883 
4
13884 
# internal_option {
13885 
HDL_INITIAL_FANOUT_LIMIT
13886 
OFF
13887 
AUTO_RESOURCE_SHARING
13888 
OFF
13889 
AUTO_RAM_RECOGNITION
13890 
ON
13891 
AUTO_ROM_RECOGNITION
13892 
ON
13893 
}
13894 
# user_parameter {
13895 
data_width
13896 
64
13897 
PARAMETER_SIGNED_DEC
13898 
USR
13899 
ctrl_width
13900 
8
13901 
PARAMETER_SIGNED_DEC
13902 
USR
13903 
 constraint(in_data)
13904 
63 downto 0
13905 
PARAMETER_STRING
13906 
USR
13907 
 constraint(in_ctrl)
13908 
7 downto 0
13909 
PARAMETER_STRING
13910 
USR
13911 
 constraint(key)
13912 
11 downto 0
13913 
PARAMETER_STRING
13914 
USR
13915 
}
13916 
# include_file {
13917 
config.vhd
13918 
a9aaccd982e3760a0ac88fe1caf2098
13919 
}
13920 
# lmf
13921 
d:|altera|72|quartus|lmf|maxplus2.lmf
13922 
9a59d39b0706640b4b2718e8a1ff1f
13923 
# macro_sequence
13924 
 
13925 
# end
13926 
# entity
13927 
table
13928 
# storage
13929 
db|LB.(37).cnf
13930 
db|LB.(37).cnf
13931 
# logic_option {
13932 
AUTO_RAM_RECOGNITION
13933 
ON
13934 
}
13935 
# case_insensitive
13936 
# source_file
13937 
TABLE|table.vhd
13938 
99ba827d38554a20466973e8a947d64
13939 
4
13940 
# internal_option {
13941 
HDL_INITIAL_FANOUT_LIMIT
13942 
OFF
13943 
AUTO_RESOURCE_SHARING
13944 
OFF
13945 
AUTO_RAM_RECOGNITION
13946 
ON
13947 
AUTO_ROM_RECOGNITION
13948 
ON
13949 
}
13950 
# user_parameter {
13951 
addr_width
13952 
10
13953 
PARAMETER_SIGNED_DEC
13954 
USR
13955 
 constraint(in_mac)
13956 
47 downto 0
13957 
PARAMETER_STRING
13958 
USR
13959 
 constraint(in_weight)
13960 
7 downto 0
13961 
PARAMETER_STRING
13962 
USR
13963 
 constraint(in_port)
13964 
7 downto 0
13965 
PARAMETER_STRING
13966 
USR
13967 
 constraint(in_key)
13968 
11 downto 0
13969 
PARAMETER_STRING
13970 
USR
13971 
 constraint(out_mac)
13972 
47 downto 0
13973 
PARAMETER_STRING
13974 
USR
13975 
 constraint(out_port)
13976 
7 downto 0
13977 
PARAMETER_STRING
13978 
USR
13979 
}
13980 
# lmf
13981 
d:|altera|72|quartus|lmf|maxplus2.lmf
13982 
9a59d39b0706640b4b2718e8a1ff1f
13983 
# macro_sequence
13984 
 
13985 
# end
13986 
# entity
13987 
mac_ram_table
13988 
# storage
13989 
db|LB.(39).cnf
13990 
db|LB.(39).cnf
13991 
# logic_option {
13992 
AUTO_RAM_RECOGNITION
13993 
ON
13994 
}
13995 
# case_insensitive
13996 
# source_file
13997 
TABLE|mac_ram_table.vhd
13998 
bd61a43fb12dc5879cba8182e699b3
13999 
4
14000 
# internal_option {
14001 
HDL_INITIAL_FANOUT_LIMIT
14002 
OFF
14003 
AUTO_RESOURCE_SHARING
14004 
OFF
14005 
AUTO_RAM_RECOGNITION
14006 
ON
14007 
AUTO_ROM_RECOGNITION
14008 
ON
14009 
}
14010 
# user_parameter {
14011 
addr_width
14012 
10
14013 
PARAMETER_SIGNED_DEC
14014 
USR
14015 
 constraint(in_mac_no_prt)
14016 
63 downto 0
14017 
PARAMETER_STRING
14018 
USR
14019 
 constraint(in_address)
14020 
9 downto 0
14021 
PARAMETER_STRING
14022 
USR
14023 
 constraint(match_address)
14024 
9 downto 0
14025 
PARAMETER_STRING
14026 
USR
14027 
 constraint(in_key)
14028 
9 downto 0
14029 
PARAMETER_STRING
14030 
USR
14031 
 constraint(last_address)
14032 
9 downto 0
14033 
PARAMETER_STRING
14034 
USR
14035 
 constraint(out_port)
14036 
7 downto 0
14037 
PARAMETER_STRING
14038 
USR
14039 
 constraint(out_mac)
14040 
47 downto 0
14041 
PARAMETER_STRING
14042 
USR
14043 
}
14044 
# include_file {
14045 
config.vhd
14046 
a9aaccd982e3760a0ac88fe1caf2098
14047 
}
14048 
# hierarchies {
14049 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst
14050 
}
14051 
# lmf
14052 
d:|altera|72|quartus|lmf|maxplus2.lmf
14053 
9a59d39b0706640b4b2718e8a1ff1f
14054 
# macro_sequence
14055 
 
14056 
# end
14057 
# entity
14058 
ram_256x48
14059 
# storage
14060 
db|LB.(68).cnf
14061 
db|LB.(68).cnf
14062 
# logic_option {
14063 
AUTO_RAM_RECOGNITION
14064 
ON
14065 
}
14066 
# case_insensitive
14067 
# source_file
14068 
TABLE|ram_256x48.vhd
14069 
426f75de89a79a2d63f5e1d26516c465
14070 
4
14071 
# internal_option {
14072 
HDL_INITIAL_FANOUT_LIMIT
14073 
OFF
14074 
AUTO_RESOURCE_SHARING
14075 
OFF
14076 
AUTO_RAM_RECOGNITION
14077 
ON
14078 
AUTO_ROM_RECOGNITION
14079 
ON
14080 
}
14081 
# user_parameter {
14082 
data_width
14083 
56
14084 
PARAMETER_SIGNED_DEC
14085 
USR
14086 
addr_width
14087 
10
14088 
PARAMETER_SIGNED_DEC
14089 
USR
14090 
 constraint(data)
14091 
55 downto 0
14092 
PARAMETER_STRING
14093 
USR
14094 
 constraint(q)
14095 
55 downto 0
14096 
PARAMETER_STRING
14097 
USR
14098 
}
14099 
# hierarchies {
14100 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst|ram_256x48:ram_256x48_search_Inst
14101 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst|ram_256x48:ram_256x48_Inst
14102 
}
14103 
# lmf
14104 
d:|altera|72|quartus|lmf|maxplus2.lmf
14105 
9a59d39b0706640b4b2718e8a1ff1f
14106 
# macro_sequence
14107 
 
14108 
# end
14109 
# entity
14110 
small_fifo
14111 
# storage
14112 
db|LB.(69).cnf
14113 
db|LB.(69).cnf
14114 
# logic_option {
14115 
AUTO_RAM_RECOGNITION
14116 
ON
14117 
}
14118 
# case_sensitive
14119 
# source_file
14120 
small_fifo.v
14121 
1177d4c5f95945d866fbc28febfb18a6
14122 
7
14123 
# internal_option {
14124 
HDL_INITIAL_FANOUT_LIMIT
14125 
OFF
14126 
AUTO_RESOURCE_SHARING
14127 
OFF
14128 
AUTO_RAM_RECOGNITION
14129 
ON
14130 
AUTO_ROM_RECOGNITION
14131 
ON
14132 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
14133 
OFF
14134 
}
14135 
# user_parameter {
14136 
WIDTH
14137 
10
14138 
PARAMETER_SIGNED_DEC
14139 
USR
14140 
MAX_DEPTH_BITS
14141 
5
14142 
PARAMETER_SIGNED_DEC
14143 
USR
14144 
NEARLY_FULL
14145 
31
14146 
PARAMETER_SIGNED_DEC
14147 
DEF
14148 
}
14149 
# hierarchies {
14150 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst|small_fifo:WRITE_command_Inst
14151 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst|valid_address:valid_address_Inst|small_fifo:write_command_Inst
14152 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst|valid_address:valid_address_Inst|small_fifo:remove_command_Inst
14153 
}
14154 
# lmf
14155 
d:|altera|72|quartus|lmf|
14156 
d41d8cd98f0b24e980998ecf8427e
14157 
# macro_sequence
14158 
 
14159 
# end
14160 
# entity
14161 
ram_256x48
14162 
# storage
14163 
db|LB.(70).cnf
14164 
db|LB.(70).cnf
14165 
# logic_option {
14166 
AUTO_RAM_RECOGNITION
14167 
ON
14168 
}
14169 
# case_insensitive
14170 
# source_file
14171 
TABLE|ram_256x48.vhd
14172 
426f75de89a79a2d63f5e1d26516c465
14173 
4
14174 
# internal_option {
14175 
HDL_INITIAL_FANOUT_LIMIT
14176 
OFF
14177 
AUTO_RESOURCE_SHARING
14178 
OFF
14179 
AUTO_RAM_RECOGNITION
14180 
ON
14181 
AUTO_ROM_RECOGNITION
14182 
ON
14183 
}
14184 
# user_parameter {
14185 
data_width
14186 
2
14187 
PARAMETER_SIGNED_DEC
14188 
USR
14189 
addr_width
14190 
10
14191 
PARAMETER_SIGNED_DEC
14192 
USR
14193 
 constraint(data)
14194 
1 downto 0
14195 
PARAMETER_STRING
14196 
USR
14197 
 constraint(q)
14198 
1 downto 0
14199 
PARAMETER_STRING
14200 
USR
14201 
}
14202 
# hierarchies {
14203 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst|ram_256x48:Aging_Valid_256x48_Inst
14204 
}
14205 
# lmf
14206 
d:|altera|72|quartus|lmf|maxplus2.lmf
14207 
9a59d39b0706640b4b2718e8a1ff1f
14208 
# macro_sequence
14209 
 
14210 
# end
14211 
# entity
14212 
valid_address
14213 
# storage
14214 
db|LB.(45).cnf
14215 
db|LB.(45).cnf
14216 
# logic_option {
14217 
AUTO_RAM_RECOGNITION
14218 
ON
14219 
}
14220 
# case_insensitive
14221 
# source_file
14222 
TABLE|valid_address.vhd
14223 
c1bc15ed58be801a41e52a679764176
14224 
4
14225 
# internal_option {
14226 
HDL_INITIAL_FANOUT_LIMIT
14227 
OFF
14228 
AUTO_RESOURCE_SHARING
14229 
OFF
14230 
AUTO_RAM_RECOGNITION
14231 
ON
14232 
AUTO_ROM_RECOGNITION
14233 
ON
14234 
}
14235 
# user_parameter {
14236 
addr_width
14237 
10
14238 
PARAMETER_SIGNED_DEC
14239 
USR
14240 
 constraint(in_wr_address)
14241 
9 downto 0
14242 
PARAMETER_STRING
14243 
USR
14244 
 constraint(in_key)
14245 
9 downto 0
14246 
PARAMETER_STRING
14247 
USR
14248 
 constraint(in_rm_address_no)
14249 
9 downto 0
14250 
PARAMETER_STRING
14251 
USR
14252 
 constraint(out_address)
14253 
9 downto 0
14254 
PARAMETER_STRING
14255 
USR
14256 
}
14257 
# hierarchies {
14258 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst|valid_address:valid_address_Inst
14259 
}
14260 
# lmf
14261 
d:|altera|72|quartus|lmf|maxplus2.lmf
14262 
9a59d39b0706640b4b2718e8a1ff1f
14263 
# macro_sequence
14264 
 
14265 
# end
14266 
# entity
14267 
ram_256x48
14268 
# storage
14269 
db|LB.(71).cnf
14270 
db|LB.(71).cnf
14271 
# logic_option {
14272 
AUTO_RAM_RECOGNITION
14273 
ON
14274 
}
14275 
# case_insensitive
14276 
# source_file
14277 
TABLE|ram_256x48.vhd
14278 
426f75de89a79a2d63f5e1d26516c465
14279 
4
14280 
# internal_option {
14281 
HDL_INITIAL_FANOUT_LIMIT
14282 
OFF
14283 
AUTO_RESOURCE_SHARING
14284 
OFF
14285 
AUTO_RAM_RECOGNITION
14286 
ON
14287 
AUTO_ROM_RECOGNITION
14288 
ON
14289 
}
14290 
# user_parameter {
14291 
data_width
14292 
10
14293 
PARAMETER_SIGNED_DEC
14294 
USR
14295 
addr_width
14296 
10
14297 
PARAMETER_SIGNED_DEC
14298 
USR
14299 
 constraint(data)
14300 
9 downto 0
14301 
PARAMETER_STRING
14302 
USR
14303 
 constraint(q)
14304 
9 downto 0
14305 
PARAMETER_STRING
14306 
USR
14307 
}
14308 
# hierarchies {
14309 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst|valid_address:valid_address_Inst|ram_256x48:valid_mac_Map_256x48_Inst
14310 
manager:inst|table:table_Inst|mac_ram_table:ram_Inst|valid_address:valid_address_Inst|ram_256x48:valid_mac_256x48_Inst
14311 
}
14312 
# lmf
14313 
d:|altera|72|quartus|lmf|maxplus2.lmf
14314 
9a59d39b0706640b4b2718e8a1ff1f
14315 
# macro_sequence
14316 
 
14317 
# end
14318 
# entity
14319 
table
14320 
# storage
14321 
db|LB.(72).cnf
14322 
db|LB.(72).cnf
14323 
# logic_option {
14324 
AUTO_RAM_RECOGNITION
14325 
ON
14326 
}
14327 
# case_insensitive
14328 
# source_file
14329 
TABLE|table.vhd
14330 
99ba827d38554a20466973e8a947d64
14331 
4
14332 
# internal_option {
14333 
HDL_INITIAL_FANOUT_LIMIT
14334 
OFF
14335 
AUTO_RESOURCE_SHARING
14336 
OFF
14337 
AUTO_RAM_RECOGNITION
14338 
ON
14339 
AUTO_ROM_RECOGNITION
14340 
ON
14341 
}
14342 
# user_parameter {
14343 
addr_width
14344 
10
14345 
PARAMETER_SIGNED_DEC
14346 
USR
14347 
 constraint(in_mac)
14348 
47 downto 0
14349 
PARAMETER_STRING
14350 
USR
14351 
 constraint(in_weight)
14352 
7 downto 0
14353 
PARAMETER_STRING
14354 
USR
14355 
 constraint(in_port)
14356 
7 downto 0
14357 
PARAMETER_STRING
14358 
USR
14359 
 constraint(in_key)
14360 
9 downto 0
14361 
PARAMETER_STRING
14362 
USR
14363 
 constraint(out_mac)
14364 
47 downto 0
14365 
PARAMETER_STRING
14366 
USR
14367 
 constraint(out_port)
14368 
7 downto 0
14369 
PARAMETER_STRING
14370 
USR
14371 
}
14372 
# hierarchies {
14373 
manager:inst|table:table_Inst
14374 
}
14375 
# lmf
14376 
d:|altera|72|quartus|lmf|maxplus2.lmf
14377 
9a59d39b0706640b4b2718e8a1ff1f
14378 
# macro_sequence
14379 
 
14380 
# end
14381 
# entity
14382 
balancer_top
14383 
# storage
14384 
db|LB.(1).cnf
14385 
db|LB.(1).cnf
14386 
# logic_option {
14387 
AUTO_RAM_RECOGNITION
14388 
ON
14389 
}
14390 
# case_insensitive
14391 
# source_file
14392 
balancer_top.vhd
14393 
fbc6ea34994e16f24d2564658a25119
14394 
4
14395 
# internal_option {
14396 
HDL_INITIAL_FANOUT_LIMIT
14397 
OFF
14398 
AUTO_RESOURCE_SHARING
14399 
OFF
14400 
AUTO_RAM_RECOGNITION
14401 
ON
14402 
AUTO_ROM_RECOGNITION
14403 
ON
14404 
}
14405 
# user_parameter {
14406 
data_width
14407 
64
14408 
PARAMETER_UNKNOWN
14409 
USR
14410 
ctrl_width
14411 
8
14412 
PARAMETER_UNKNOWN
14413 
USR
14414 
}
14415 
# lmf
14416 
d:|altera|72|quartus|lmf|maxplus2.lmf
14417 
9a59d39b0706640b4b2718e8a1ff1f
14418 
# macro_sequence
14419 
 
14420 
# end
14421 
# entity
14422 
altsyncram
14423 
# storage
14424 
db|LB.(74).cnf
14425 
db|LB.(74).cnf
14426 
# case_insensitive
14427 
# source_file
14428 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
14429 
1a8e44bce3df5c9cae2128978e887541
14430 
6
14431 
# user_parameter {
14432 
BYTE_SIZE_BLOCK
14433 
8
14434 
PARAMETER_UNKNOWN
14435 
DEF
14436 
AUTO_CARRY_CHAINS
14437 
ON
14438 
AUTO_CARRY
14439 
USR
14440 
IGNORE_CARRY_BUFFERS
14441 
OFF
14442 
IGNORE_CARRY
14443 
USR
14444 
AUTO_CASCADE_CHAINS
14445 
ON
14446 
AUTO_CASCADE
14447 
USR
14448 
IGNORE_CASCADE_BUFFERS
14449 
OFF
14450 
IGNORE_CASCADE
14451 
USR
14452 
WIDTH_BYTEENA
14453 
1
14454 
PARAMETER_UNKNOWN
14455 
DEF
14456 
OPERATION_MODE
14457 
DUAL_PORT
14458 
PARAMETER_UNKNOWN
14459 
USR
14460 
WIDTH_A
14461 
56
14462 
PARAMETER_UNKNOWN
14463 
USR
14464 
WIDTHAD_A
14465 
10
14466 
PARAMETER_UNKNOWN
14467 
USR
14468 
NUMWORDS_A
14469 
1024
14470 
PARAMETER_UNKNOWN
14471 
USR
14472 
OUTDATA_REG_A
14473 
UNREGISTERED
14474 
PARAMETER_UNKNOWN
14475 
DEF
14476 
ADDRESS_ACLR_A
14477 
NONE
14478 
PARAMETER_UNKNOWN
14479 
USR
14480 
OUTDATA_ACLR_A
14481 
NONE
14482 
PARAMETER_UNKNOWN
14483 
DEF
14484 
WRCONTROL_ACLR_A
14485 
NONE
14486 
PARAMETER_UNKNOWN
14487 
USR
14488 
INDATA_ACLR_A
14489 
NONE
14490 
PARAMETER_UNKNOWN
14491 
USR
14492 
BYTEENA_ACLR_A
14493 
NONE
14494 
PARAMETER_UNKNOWN
14495 
DEF
14496 
WIDTH_B
14497 
56
14498 
PARAMETER_UNKNOWN
14499 
USR
14500 
WIDTHAD_B
14501 
10
14502 
PARAMETER_UNKNOWN
14503 
USR
14504 
NUMWORDS_B
14505 
1024
14506 
PARAMETER_UNKNOWN
14507 
USR
14508 
INDATA_REG_B
14509 
CLOCK1
14510 
PARAMETER_UNKNOWN
14511 
DEF
14512 
WRCONTROL_WRADDRESS_REG_B
14513 
CLOCK1
14514 
PARAMETER_UNKNOWN
14515 
DEF
14516 
RDCONTROL_REG_B
14517 
CLOCK1
14518 
PARAMETER_UNKNOWN
14519 
DEF
14520 
ADDRESS_REG_B
14521 
CLOCK0
14522 
PARAMETER_UNKNOWN
14523 
USR
14524 
OUTDATA_REG_B
14525 
UNREGISTERED
14526 
PARAMETER_UNKNOWN
14527 
USR
14528 
BYTEENA_REG_B
14529 
CLOCK1
14530 
PARAMETER_UNKNOWN
14531 
DEF
14532 
INDATA_ACLR_B
14533 
NONE
14534 
PARAMETER_UNKNOWN
14535 
DEF
14536 
WRCONTROL_ACLR_B
14537 
NONE
14538 
PARAMETER_UNKNOWN
14539 
DEF
14540 
ADDRESS_ACLR_B
14541 
NONE
14542 
PARAMETER_UNKNOWN
14543 
USR
14544 
OUTDATA_ACLR_B
14545 
NONE
14546 
PARAMETER_UNKNOWN
14547 
USR
14548 
RDCONTROL_ACLR_B
14549 
NONE
14550 
PARAMETER_UNKNOWN
14551 
DEF
14552 
BYTEENA_ACLR_B
14553 
NONE
14554 
PARAMETER_UNKNOWN
14555 
DEF
14556 
WIDTH_BYTEENA_A
14557 
1
14558 
PARAMETER_UNKNOWN
14559 
DEF
14560 
WIDTH_BYTEENA_B
14561 
1
14562 
PARAMETER_UNKNOWN
14563 
DEF
14564 
RAM_BLOCK_TYPE
14565 
AUTO
14566 
PARAMETER_UNKNOWN
14567 
USR
14568 
BYTE_SIZE
14569 
8
14570 
PARAMETER_UNKNOWN
14571 
DEF
14572 
READ_DURING_WRITE_MODE_MIXED_PORTS
14573 
OLD_DATA
14574 
PARAMETER_UNKNOWN
14575 
USR
14576 
READ_DURING_WRITE_MODE_PORT_A
14577 
NEW_DATA_NO_NBE_READ
14578 
PARAMETER_UNKNOWN
14579 
DEF
14580 
READ_DURING_WRITE_MODE_PORT_B
14581 
NEW_DATA_NO_NBE_READ
14582 
PARAMETER_UNKNOWN
14583 
DEF
14584 
INIT_FILE
14585 
UNUSED
14586 
PARAMETER_UNKNOWN
14587 
DEF
14588 
INIT_FILE_LAYOUT
14589 
PORT_A
14590 
PARAMETER_UNKNOWN
14591 
DEF
14592 
MAXIMUM_DEPTH
14593 
 
14594 
PARAMETER_UNKNOWN
14595 
DEF
14596 
CLOCK_ENABLE_INPUT_A
14597 
NORMAL
14598 
PARAMETER_UNKNOWN
14599 
DEF
14600 
CLOCK_ENABLE_INPUT_B
14601 
NORMAL
14602 
PARAMETER_UNKNOWN
14603 
DEF
14604 
CLOCK_ENABLE_OUTPUT_A
14605 
NORMAL
14606 
PARAMETER_UNKNOWN
14607 
DEF
14608 
CLOCK_ENABLE_OUTPUT_B
14609 
NORMAL
14610 
PARAMETER_UNKNOWN
14611 
DEF
14612 
CLOCK_ENABLE_CORE_A
14613 
USE_INPUT_CLKEN
14614 
PARAMETER_UNKNOWN
14615 
DEF
14616 
CLOCK_ENABLE_CORE_B
14617 
USE_INPUT_CLKEN
14618 
PARAMETER_UNKNOWN
14619 
DEF
14620 
ENABLE_ECC
14621 
FALSE
14622 
PARAMETER_UNKNOWN
14623 
DEF
14624 
DEVICE_FAMILY
14625 
Stratix II
14626 
PARAMETER_UNKNOWN
14627 
USR
14628 
CBXI_PARAMETER
14629 
altsyncram_b3j1
14630 
PARAMETER_UNKNOWN
14631 
USR
14632 
}
14633 
# used_port {
14634 
wren_a
14635 
-1
14636 
3
14637 
q_b9
14638 
-1
14639 
3
14640 
q_b8
14641 
-1
14642 
3
14643 
q_b7
14644 
-1
14645 
3
14646 
q_b6
14647 
-1
14648 
3
14649 
q_b55
14650 
-1
14651 
3
14652 
q_b54
14653 
-1
14654 
3
14655 
q_b53
14656 
-1
14657 
3
14658 
q_b52
14659 
-1
14660 
3
14661 
q_b51
14662 
-1
14663 
3
14664 
q_b50
14665 
-1
14666 
3
14667 
q_b5
14668 
-1
14669 
3
14670 
q_b49
14671 
-1
14672 
3
14673 
q_b48
14674 
-1
14675 
3
14676 
q_b47
14677 
-1
14678 
3
14679 
q_b46
14680 
-1
14681 
3
14682 
q_b45
14683 
-1
14684 
3
14685 
q_b44
14686 
-1
14687 
3
14688 
q_b43
14689 
-1
14690 
3
14691 
q_b42
14692 
-1
14693 
3
14694 
q_b41
14695 
-1
14696 
3
14697 
q_b40
14698 
-1
14699 
3
14700 
q_b4
14701 
-1
14702 
3
14703 
q_b39
14704 
-1
14705 
3
14706 
q_b38
14707 
-1
14708 
3
14709 
q_b37
14710 
-1
14711 
3
14712 
q_b36
14713 
-1
14714 
3
14715 
q_b35
14716 
-1
14717 
3
14718 
q_b34
14719 
-1
14720 
3
14721 
q_b33
14722 
-1
14723 
3
14724 
q_b32
14725 
-1
14726 
3
14727 
q_b31
14728 
-1
14729 
3
14730 
q_b30
14731 
-1
14732 
3
14733 
q_b3
14734 
-1
14735 
3
14736 
q_b29
14737 
-1
14738 
3
14739 
q_b28
14740 
-1
14741 
3
14742 
q_b27
14743 
-1
14744 
3
14745 
q_b26
14746 
-1
14747 
3
14748 
q_b25
14749 
-1
14750 
3
14751 
q_b24
14752 
-1
14753 
3
14754 
q_b23
14755 
-1
14756 
3
14757 
q_b22
14758 
-1
14759 
3
14760 
q_b21
14761 
-1
14762 
3
14763 
q_b20
14764 
-1
14765 
3
14766 
q_b2
14767 
-1
14768 
3
14769 
q_b19
14770 
-1
14771 
3
14772 
q_b18
14773 
-1
14774 
3
14775 
q_b17
14776 
-1
14777 
3
14778 
q_b16
14779 
-1
14780 
3
14781 
q_b15
14782 
-1
14783 
3
14784 
q_b14
14785 
-1
14786 
3
14787 
q_b13
14788 
-1
14789 
3
14790 
q_b12
14791 
-1
14792 
3
14793 
q_b11
14794 
-1
14795 
3
14796 
q_b10
14797 
-1
14798 
3
14799 
q_b1
14800 
-1
14801 
3
14802 
q_b0
14803 
-1
14804 
3
14805 
data_a9
14806 
-1
14807 
3
14808 
data_a8
14809 
-1
14810 
3
14811 
data_a7
14812 
-1
14813 
3
14814 
data_a6
14815 
-1
14816 
3
14817 
data_a55
14818 
-1
14819 
3
14820 
data_a54
14821 
-1
14822 
3
14823 
data_a53
14824 
-1
14825 
3
14826 
data_a52
14827 
-1
14828 
3
14829 
data_a51
14830 
-1
14831 
3
14832 
data_a50
14833 
-1
14834 
3
14835 
data_a5
14836 
-1
14837 
3
14838 
data_a49
14839 
-1
14840 
3
14841 
data_a48
14842 
-1
14843 
3
14844 
data_a47
14845 
-1
14846 
3
14847 
data_a46
14848 
-1
14849 
3
14850 
data_a45
14851 
-1
14852 
3
14853 
data_a44
14854 
-1
14855 
3
14856 
data_a43
14857 
-1
14858 
3
14859 
data_a42
14860 
-1
14861 
3
14862 
data_a41
14863 
-1
14864 
3
14865 
data_a40
14866 
-1
14867 
3
14868 
data_a4
14869 
-1
14870 
3
14871 
data_a39
14872 
-1
14873 
3
14874 
data_a38
14875 
-1
14876 
3
14877 
data_a37
14878 
-1
14879 
3
14880 
data_a36
14881 
-1
14882 
3
14883 
data_a35
14884 
-1
14885 
3
14886 
data_a34
14887 
-1
14888 
3
14889 
data_a33
14890 
-1
14891 
3
14892 
data_a32
14893 
-1
14894 
3
14895 
data_a31
14896 
-1
14897 
3
14898 
data_a30
14899 
-1
14900 
3
14901 
data_a3
14902 
-1
14903 
3
14904 
data_a29
14905 
-1
14906 
3
14907 
data_a28
14908 
-1
14909 
3
14910 
data_a27
14911 
-1
14912 
3
14913 
data_a26
14914 
-1
14915 
3
14916 
data_a25
14917 
-1
14918 
3
14919 
data_a24
14920 
-1
14921 
3
14922 
data_a23
14923 
-1
14924 
3
14925 
data_a22
14926 
-1
14927 
3
14928 
data_a21
14929 
-1
14930 
3
14931 
data_a20
14932 
-1
14933 
3
14934 
data_a2
14935 
-1
14936 
3
14937 
data_a19
14938 
-1
14939 
3
14940 
data_a18
14941 
-1
14942 
3
14943 
data_a17
14944 
-1
14945 
3
14946 
data_a16
14947 
-1
14948 
3
14949 
data_a15
14950 
-1
14951 
3
14952 
data_a14
14953 
-1
14954 
3
14955 
data_a13
14956 
-1
14957 
3
14958 
data_a12
14959 
-1
14960 
3
14961 
data_a11
14962 
-1
14963 
3
14964 
data_a10
14965 
-1
14966 
3
14967 
data_a1
14968 
-1
14969 
3
14970 
data_a0
14971 
-1
14972 
3
14973 
clock0
14974 
-1
14975 
3
14976 
address_b9
14977 
-1
14978 
3
14979 
address_b8
14980 
-1
14981 
3
14982 
address_b7
14983 
-1
14984 
3
14985 
address_b6
14986 
-1
14987 
3
14988 
address_b5
14989 
-1
14990 
3
14991 
address_b4
14992 
-1
14993 
3
14994 
address_b3
14995 
-1
14996 
3
14997 
address_b2
14998 
-1
14999 
3
15000 
address_b1
15001 
-1
15002 
3
15003 
address_b0
15004 
-1
15005 
3
15006 
address_a9
15007 
-1
15008 
3
15009 
address_a8
15010 
-1
15011 
3
15012 
address_a7
15013 
-1
15014 
3
15015 
address_a6
15016 
-1
15017 
3
15018 
address_a5
15019 
-1
15020 
3
15021 
address_a4
15022 
-1
15023 
3
15024 
address_a3
15025 
-1
15026 
3
15027 
address_a2
15028 
-1
15029 
3
15030 
address_a1
15031 
-1
15032 
3
15033 
address_a0
15034 
-1
15035 
3
15036 
}
15037 
# include_file {
15038 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
15039 
c22bfd353214c01495b560fc34e47d79
15040 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
15041 
2263a3bdfffeb150af977ee13902f70
15042 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
15043 
bd0e2f5e01c1bd360461dceb53d48
15044 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
15045 
f39123b8592ab2dac019716e56b3ec18
15046 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
15047 
60d229340bc3c24acb0a137b4849830
15048 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
15049 
d4e3a69a331d3a99d3281790d99a1ebd
15050 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
15051 
e66a83eccf6717bed97c99d891ad085
15052 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
15053 
99d442b5b66c88db4daf94d99c6e4e77
15054 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
15055 
74e08939f96a7ea8e7a4d59a5b01fe7
15056 
}
15057 
# lmf
15058 
d:|altera|72|quartus|lmf|
15059 
d41d8cd98f0b24e980998ecf8427e
15060 
# macro_sequence
15061 
 
15062 
# end
15063 
# entity
15064 
altsyncram_b3j1
15065 
# storage
15066 
db|LB.(75).cnf
15067 
db|LB.(75).cnf
15068 
# case_insensitive
15069 
# source_file
15070 
db|altsyncram_b3j1.tdf
15071 
d371f33559735d287abdc0b4aeb52195
15072 
6
15073 
# used_port {
15074 
wren_a
15075 
-1
15076 
3
15077 
q_b9
15078 
-1
15079 
3
15080 
q_b8
15081 
-1
15082 
3
15083 
q_b7
15084 
-1
15085 
3
15086 
q_b6
15087 
-1
15088 
3
15089 
q_b55
15090 
-1
15091 
3
15092 
q_b54
15093 
-1
15094 
3
15095 
q_b53
15096 
-1
15097 
3
15098 
q_b52
15099 
-1
15100 
3
15101 
q_b51
15102 
-1
15103 
3
15104 
q_b50
15105 
-1
15106 
3
15107 
q_b5
15108 
-1
15109 
3
15110 
q_b49
15111 
-1
15112 
3
15113 
q_b48
15114 
-1
15115 
3
15116 
q_b47
15117 
-1
15118 
3
15119 
q_b46
15120 
-1
15121 
3
15122 
q_b45
15123 
-1
15124 
3
15125 
q_b44
15126 
-1
15127 
3
15128 
q_b43
15129 
-1
15130 
3
15131 
q_b42
15132 
-1
15133 
3
15134 
q_b41
15135 
-1
15136 
3
15137 
q_b40
15138 
-1
15139 
3
15140 
q_b4
15141 
-1
15142 
3
15143 
q_b39
15144 
-1
15145 
3
15146 
q_b38
15147 
-1
15148 
3
15149 
q_b37
15150 
-1
15151 
3
15152 
q_b36
15153 
-1
15154 
3
15155 
q_b35
15156 
-1
15157 
3
15158 
q_b34
15159 
-1
15160 
3
15161 
q_b33
15162 
-1
15163 
3
15164 
q_b32
15165 
-1
15166 
3
15167 
q_b31
15168 
-1
15169 
3
15170 
q_b30
15171 
-1
15172 
3
15173 
q_b3
15174 
-1
15175 
3
15176 
q_b29
15177 
-1
15178 
3
15179 
q_b28
15180 
-1
15181 
3
15182 
q_b27
15183 
-1
15184 
3
15185 
q_b26
15186 
-1
15187 
3
15188 
q_b25
15189 
-1
15190 
3
15191 
q_b24
15192 
-1
15193 
3
15194 
q_b23
15195 
-1
15196 
3
15197 
q_b22
15198 
-1
15199 
3
15200 
q_b21
15201 
-1
15202 
3
15203 
q_b20
15204 
-1
15205 
3
15206 
q_b2
15207 
-1
15208 
3
15209 
q_b19
15210 
-1
15211 
3
15212 
q_b18
15213 
-1
15214 
3
15215 
q_b17
15216 
-1
15217 
3
15218 
q_b16
15219 
-1
15220 
3
15221 
q_b15
15222 
-1
15223 
3
15224 
q_b14
15225 
-1
15226 
3
15227 
q_b13
15228 
-1
15229 
3
15230 
q_b12
15231 
-1
15232 
3
15233 
q_b11
15234 
-1
15235 
3
15236 
q_b10
15237 
-1
15238 
3
15239 
q_b1
15240 
-1
15241 
3
15242 
q_b0
15243 
-1
15244 
3
15245 
data_a9
15246 
-1
15247 
3
15248 
data_a8
15249 
-1
15250 
3
15251 
data_a7
15252 
-1
15253 
3
15254 
data_a6
15255 
-1
15256 
3
15257 
data_a55
15258 
-1
15259 
3
15260 
data_a54
15261 
-1
15262 
3
15263 
data_a53
15264 
-1
15265 
3
15266 
data_a52
15267 
-1
15268 
3
15269 
data_a51
15270 
-1
15271 
3
15272 
data_a50
15273 
-1
15274 
3
15275 
data_a5
15276 
-1
15277 
3
15278 
data_a49
15279 
-1
15280 
3
15281 
data_a48
15282 
-1
15283 
3
15284 
data_a47
15285 
-1
15286 
3
15287 
data_a46
15288 
-1
15289 
3
15290 
data_a45
15291 
-1
15292 
3
15293 
data_a44
15294 
-1
15295 
3
15296 
data_a43
15297 
-1
15298 
3
15299 
data_a42
15300 
-1
15301 
3
15302 
data_a41
15303 
-1
15304 
3
15305 
data_a40
15306 
-1
15307 
3
15308 
data_a4
15309 
-1
15310 
3
15311 
data_a39
15312 
-1
15313 
3
15314 
data_a38
15315 
-1
15316 
3
15317 
data_a37
15318 
-1
15319 
3
15320 
data_a36
15321 
-1
15322 
3
15323 
data_a35
15324 
-1
15325 
3
15326 
data_a34
15327 
-1
15328 
3
15329 
data_a33
15330 
-1
15331 
3
15332 
data_a32
15333 
-1
15334 
3
15335 
data_a31
15336 
-1
15337 
3
15338 
data_a30
15339 
-1
15340 
3
15341 
data_a3
15342 
-1
15343 
3
15344 
data_a29
15345 
-1
15346 
3
15347 
data_a28
15348 
-1
15349 
3
15350 
data_a27
15351 
-1
15352 
3
15353 
data_a26
15354 
-1
15355 
3
15356 
data_a25
15357 
-1
15358 
3
15359 
data_a24
15360 
-1
15361 
3
15362 
data_a23
15363 
-1
15364 
3
15365 
data_a22
15366 
-1
15367 
3
15368 
data_a21
15369 
-1
15370 
3
15371 
data_a20
15372 
-1
15373 
3
15374 
data_a2
15375 
-1
15376 
3
15377 
data_a19
15378 
-1
15379 
3
15380 
data_a18
15381 
-1
15382 
3
15383 
data_a17
15384 
-1
15385 
3
15386 
data_a16
15387 
-1
15388 
3
15389 
data_a15
15390 
-1
15391 
3
15392 
data_a14
15393 
-1
15394 
3
15395 
data_a13
15396 
-1
15397 
3
15398 
data_a12
15399 
-1
15400 
3
15401 
data_a11
15402 
-1
15403 
3
15404 
data_a10
15405 
-1
15406 
3
15407 
data_a1
15408 
-1
15409 
3
15410 
data_a0
15411 
-1
15412 
3
15413 
clock0
15414 
-1
15415 
3
15416 
address_b9
15417 
-1
15418 
3
15419 
address_b8
15420 
-1
15421 
3
15422 
address_b7
15423 
-1
15424 
3
15425 
address_b6
15426 
-1
15427 
3
15428 
address_b5
15429 
-1
15430 
3
15431 
address_b4
15432 
-1
15433 
3
15434 
address_b3
15435 
-1
15436 
3
15437 
address_b2
15438 
-1
15439 
3
15440 
address_b1
15441 
-1
15442 
3
15443 
address_b0
15444 
-1
15445 
3
15446 
address_a9
15447 
-1
15448 
3
15449 
address_a8
15450 
-1
15451 
3
15452 
address_a7
15453 
-1
15454 
3
15455 
address_a6
15456 
-1
15457 
3
15458 
address_a5
15459 
-1
15460 
3
15461 
address_a4
15462 
-1
15463 
3
15464 
address_a3
15465 
-1
15466 
3
15467 
address_a2
15468 
-1
15469 
3
15470 
address_a1
15471 
-1
15472 
3
15473 
address_a0
15474 
-1
15475 
3
15476 
}
15477 
# lmf
15478 
d:|altera|72|quartus|lmf|
15479 
d41d8cd98f0b24e980998ecf8427e
15480 
# macro_sequence
15481 
 
15482 
# end
15483 
# entity
15484 
altsyncram
15485 
# storage
15486 
db|LB.(76).cnf
15487 
db|LB.(76).cnf
15488 
# case_insensitive
15489 
# source_file
15490 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
15491 
1a8e44bce3df5c9cae2128978e887541
15492 
6
15493 
# user_parameter {
15494 
BYTE_SIZE_BLOCK
15495 
8
15496 
PARAMETER_UNKNOWN
15497 
DEF
15498 
AUTO_CARRY_CHAINS
15499 
ON
15500 
AUTO_CARRY
15501 
USR
15502 
IGNORE_CARRY_BUFFERS
15503 
OFF
15504 
IGNORE_CARRY
15505 
USR
15506 
AUTO_CASCADE_CHAINS
15507 
ON
15508 
AUTO_CASCADE
15509 
USR
15510 
IGNORE_CASCADE_BUFFERS
15511 
OFF
15512 
IGNORE_CASCADE
15513 
USR
15514 
WIDTH_BYTEENA
15515 
1
15516 
PARAMETER_UNKNOWN
15517 
DEF
15518 
OPERATION_MODE
15519 
DUAL_PORT
15520 
PARAMETER_UNKNOWN
15521 
USR
15522 
WIDTH_A
15523 
2
15524 
PARAMETER_UNKNOWN
15525 
USR
15526 
WIDTHAD_A
15527 
10
15528 
PARAMETER_UNKNOWN
15529 
USR
15530 
NUMWORDS_A
15531 
1024
15532 
PARAMETER_UNKNOWN
15533 
USR
15534 
OUTDATA_REG_A
15535 
UNREGISTERED
15536 
PARAMETER_UNKNOWN
15537 
DEF
15538 
ADDRESS_ACLR_A
15539 
NONE
15540 
PARAMETER_UNKNOWN
15541 
USR
15542 
OUTDATA_ACLR_A
15543 
NONE
15544 
PARAMETER_UNKNOWN
15545 
DEF
15546 
WRCONTROL_ACLR_A
15547 
NONE
15548 
PARAMETER_UNKNOWN
15549 
USR
15550 
INDATA_ACLR_A
15551 
NONE
15552 
PARAMETER_UNKNOWN
15553 
USR
15554 
BYTEENA_ACLR_A
15555 
NONE
15556 
PARAMETER_UNKNOWN
15557 
DEF
15558 
WIDTH_B
15559 
2
15560 
PARAMETER_UNKNOWN
15561 
USR
15562 
WIDTHAD_B
15563 
10
15564 
PARAMETER_UNKNOWN
15565 
USR
15566 
NUMWORDS_B
15567 
1024
15568 
PARAMETER_UNKNOWN
15569 
USR
15570 
INDATA_REG_B
15571 
CLOCK1
15572 
PARAMETER_UNKNOWN
15573 
DEF
15574 
WRCONTROL_WRADDRESS_REG_B
15575 
CLOCK1
15576 
PARAMETER_UNKNOWN
15577 
DEF
15578 
RDCONTROL_REG_B
15579 
CLOCK1
15580 
PARAMETER_UNKNOWN
15581 
DEF
15582 
ADDRESS_REG_B
15583 
CLOCK0
15584 
PARAMETER_UNKNOWN
15585 
USR
15586 
OUTDATA_REG_B
15587 
UNREGISTERED
15588 
PARAMETER_UNKNOWN
15589 
USR
15590 
BYTEENA_REG_B
15591 
CLOCK1
15592 
PARAMETER_UNKNOWN
15593 
DEF
15594 
INDATA_ACLR_B
15595 
NONE
15596 
PARAMETER_UNKNOWN
15597 
DEF
15598 
WRCONTROL_ACLR_B
15599 
NONE
15600 
PARAMETER_UNKNOWN
15601 
DEF
15602 
ADDRESS_ACLR_B
15603 
NONE
15604 
PARAMETER_UNKNOWN
15605 
USR
15606 
OUTDATA_ACLR_B
15607 
NONE
15608 
PARAMETER_UNKNOWN
15609 
USR
15610 
RDCONTROL_ACLR_B
15611 
NONE
15612 
PARAMETER_UNKNOWN
15613 
DEF
15614 
BYTEENA_ACLR_B
15615 
NONE
15616 
PARAMETER_UNKNOWN
15617 
DEF
15618 
WIDTH_BYTEENA_A
15619 
1
15620 
PARAMETER_UNKNOWN
15621 
DEF
15622 
WIDTH_BYTEENA_B
15623 
1
15624 
PARAMETER_UNKNOWN
15625 
DEF
15626 
RAM_BLOCK_TYPE
15627 
AUTO
15628 
PARAMETER_UNKNOWN
15629 
USR
15630 
BYTE_SIZE
15631 
8
15632 
PARAMETER_UNKNOWN
15633 
DEF
15634 
READ_DURING_WRITE_MODE_MIXED_PORTS
15635 
OLD_DATA
15636 
PARAMETER_UNKNOWN
15637 
USR
15638 
READ_DURING_WRITE_MODE_PORT_A
15639 
NEW_DATA_NO_NBE_READ
15640 
PARAMETER_UNKNOWN
15641 
DEF
15642 
READ_DURING_WRITE_MODE_PORT_B
15643 
NEW_DATA_NO_NBE_READ
15644 
PARAMETER_UNKNOWN
15645 
DEF
15646 
INIT_FILE
15647 
UNUSED
15648 
PARAMETER_UNKNOWN
15649 
DEF
15650 
INIT_FILE_LAYOUT
15651 
PORT_A
15652 
PARAMETER_UNKNOWN
15653 
DEF
15654 
MAXIMUM_DEPTH
15655 
 
15656 
PARAMETER_UNKNOWN
15657 
DEF
15658 
CLOCK_ENABLE_INPUT_A
15659 
NORMAL
15660 
PARAMETER_UNKNOWN
15661 
DEF
15662 
CLOCK_ENABLE_INPUT_B
15663 
NORMAL
15664 
PARAMETER_UNKNOWN
15665 
DEF
15666 
CLOCK_ENABLE_OUTPUT_A
15667 
NORMAL
15668 
PARAMETER_UNKNOWN
15669 
DEF
15670 
CLOCK_ENABLE_OUTPUT_B
15671 
NORMAL
15672 
PARAMETER_UNKNOWN
15673 
DEF
15674 
CLOCK_ENABLE_CORE_A
15675 
USE_INPUT_CLKEN
15676 
PARAMETER_UNKNOWN
15677 
DEF
15678 
CLOCK_ENABLE_CORE_B
15679 
USE_INPUT_CLKEN
15680 
PARAMETER_UNKNOWN
15681 
DEF
15682 
ENABLE_ECC
15683 
FALSE
15684 
PARAMETER_UNKNOWN
15685 
DEF
15686 
DEVICE_FAMILY
15687 
Stratix II
15688 
PARAMETER_UNKNOWN
15689 
USR
15690 
CBXI_PARAMETER
15691 
altsyncram_pvi1
15692 
PARAMETER_UNKNOWN
15693 
USR
15694 
}
15695 
# used_port {
15696 
wren_a
15697 
-1
15698 
3
15699 
q_b1
15700 
-1
15701 
3
15702 
q_b0
15703 
-1
15704 
3
15705 
data_a1
15706 
-1
15707 
3
15708 
data_a0
15709 
-1
15710 
3
15711 
clock0
15712 
-1
15713 
3
15714 
address_b9
15715 
-1
15716 
3
15717 
address_b8
15718 
-1
15719 
3
15720 
address_b7
15721 
-1
15722 
3
15723 
address_b6
15724 
-1
15725 
3
15726 
address_b5
15727 
-1
15728 
3
15729 
address_b4
15730 
-1
15731 
3
15732 
address_b3
15733 
-1
15734 
3
15735 
address_b2
15736 
-1
15737 
3
15738 
address_b1
15739 
-1
15740 
3
15741 
address_b0
15742 
-1
15743 
3
15744 
address_a9
15745 
-1
15746 
3
15747 
address_a8
15748 
-1
15749 
3
15750 
address_a7
15751 
-1
15752 
3
15753 
address_a6
15754 
-1
15755 
3
15756 
address_a5
15757 
-1
15758 
3
15759 
address_a4
15760 
-1
15761 
3
15762 
address_a3
15763 
-1
15764 
3
15765 
address_a2
15766 
-1
15767 
3
15768 
address_a1
15769 
-1
15770 
3
15771 
address_a0
15772 
-1
15773 
3
15774 
}
15775 
# include_file {
15776 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
15777 
c22bfd353214c01495b560fc34e47d79
15778 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
15779 
2263a3bdfffeb150af977ee13902f70
15780 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
15781 
bd0e2f5e01c1bd360461dceb53d48
15782 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
15783 
f39123b8592ab2dac019716e56b3ec18
15784 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
15785 
60d229340bc3c24acb0a137b4849830
15786 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
15787 
d4e3a69a331d3a99d3281790d99a1ebd
15788 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
15789 
e66a83eccf6717bed97c99d891ad085
15790 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
15791 
99d442b5b66c88db4daf94d99c6e4e77
15792 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
15793 
74e08939f96a7ea8e7a4d59a5b01fe7
15794 
}
15795 
# lmf
15796 
d:|altera|72|quartus|lmf|
15797 
d41d8cd98f0b24e980998ecf8427e
15798 
# macro_sequence
15799 
 
15800 
# end
15801 
# entity
15802 
altsyncram_pvi1
15803 
# storage
15804 
db|LB.(77).cnf
15805 
db|LB.(77).cnf
15806 
# case_insensitive
15807 
# source_file
15808 
db|altsyncram_pvi1.tdf
15809 
2bf54e369ed3de3f44ebd1d9c1ba2
15810 
6
15811 
# used_port {
15812 
wren_a
15813 
-1
15814 
3
15815 
q_b1
15816 
-1
15817 
3
15818 
q_b0
15819 
-1
15820 
3
15821 
data_a1
15822 
-1
15823 
3
15824 
data_a0
15825 
-1
15826 
3
15827 
clock0
15828 
-1
15829 
3
15830 
address_b9
15831 
-1
15832 
3
15833 
address_b8
15834 
-1
15835 
3
15836 
address_b7
15837 
-1
15838 
3
15839 
address_b6
15840 
-1
15841 
3
15842 
address_b5
15843 
-1
15844 
3
15845 
address_b4
15846 
-1
15847 
3
15848 
address_b3
15849 
-1
15850 
3
15851 
address_b2
15852 
-1
15853 
3
15854 
address_b1
15855 
-1
15856 
3
15857 
address_b0
15858 
-1
15859 
3
15860 
address_a9
15861 
-1
15862 
3
15863 
address_a8
15864 
-1
15865 
3
15866 
address_a7
15867 
-1
15868 
3
15869 
address_a6
15870 
-1
15871 
3
15872 
address_a5
15873 
-1
15874 
3
15875 
address_a4
15876 
-1
15877 
3
15878 
address_a3
15879 
-1
15880 
3
15881 
address_a2
15882 
-1
15883 
3
15884 
address_a1
15885 
-1
15886 
3
15887 
address_a0
15888 
-1
15889 
3
15890 
}
15891 
# lmf
15892 
d:|altera|72|quartus|lmf|
15893 
d41d8cd98f0b24e980998ecf8427e
15894 
# macro_sequence
15895 
 
15896 
# end
15897 
# entity
15898 
altsyncram
15899 
# storage
15900 
db|LB.(78).cnf
15901 
db|LB.(78).cnf
15902 
# case_insensitive
15903 
# source_file
15904 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
15905 
1a8e44bce3df5c9cae2128978e887541
15906 
6
15907 
# user_parameter {
15908 
BYTE_SIZE_BLOCK
15909 
8
15910 
PARAMETER_UNKNOWN
15911 
DEF
15912 
AUTO_CARRY_CHAINS
15913 
ON
15914 
AUTO_CARRY
15915 
USR
15916 
IGNORE_CARRY_BUFFERS
15917 
OFF
15918 
IGNORE_CARRY
15919 
USR
15920 
AUTO_CASCADE_CHAINS
15921 
ON
15922 
AUTO_CASCADE
15923 
USR
15924 
IGNORE_CASCADE_BUFFERS
15925 
OFF
15926 
IGNORE_CASCADE
15927 
USR
15928 
WIDTH_BYTEENA
15929 
1
15930 
PARAMETER_UNKNOWN
15931 
DEF
15932 
OPERATION_MODE
15933 
DUAL_PORT
15934 
PARAMETER_UNKNOWN
15935 
USR
15936 
WIDTH_A
15937 
10
15938 
PARAMETER_UNKNOWN
15939 
USR
15940 
WIDTHAD_A
15941 
5
15942 
PARAMETER_UNKNOWN
15943 
USR
15944 
NUMWORDS_A
15945 
32
15946 
PARAMETER_UNKNOWN
15947 
USR
15948 
OUTDATA_REG_A
15949 
UNREGISTERED
15950 
PARAMETER_UNKNOWN
15951 
DEF
15952 
ADDRESS_ACLR_A
15953 
NONE
15954 
PARAMETER_UNKNOWN
15955 
USR
15956 
OUTDATA_ACLR_A
15957 
NONE
15958 
PARAMETER_UNKNOWN
15959 
DEF
15960 
WRCONTROL_ACLR_A
15961 
NONE
15962 
PARAMETER_UNKNOWN
15963 
USR
15964 
INDATA_ACLR_A
15965 
NONE
15966 
PARAMETER_UNKNOWN
15967 
USR
15968 
BYTEENA_ACLR_A
15969 
NONE
15970 
PARAMETER_UNKNOWN
15971 
DEF
15972 
WIDTH_B
15973 
10
15974 
PARAMETER_UNKNOWN
15975 
USR
15976 
WIDTHAD_B
15977 
5
15978 
PARAMETER_UNKNOWN
15979 
USR
15980 
NUMWORDS_B
15981 
32
15982 
PARAMETER_UNKNOWN
15983 
USR
15984 
INDATA_REG_B
15985 
CLOCK1
15986 
PARAMETER_UNKNOWN
15987 
DEF
15988 
WRCONTROL_WRADDRESS_REG_B
15989 
CLOCK1
15990 
PARAMETER_UNKNOWN
15991 
DEF
15992 
RDCONTROL_REG_B
15993 
CLOCK1
15994 
PARAMETER_UNKNOWN
15995 
DEF
15996 
ADDRESS_REG_B
15997 
CLOCK0
15998 
PARAMETER_UNKNOWN
15999 
USR
16000 
OUTDATA_REG_B
16001 
UNREGISTERED
16002 
PARAMETER_UNKNOWN
16003 
USR
16004 
BYTEENA_REG_B
16005 
CLOCK1
16006 
PARAMETER_UNKNOWN
16007 
DEF
16008 
INDATA_ACLR_B
16009 
NONE
16010 
PARAMETER_UNKNOWN
16011 
DEF
16012 
WRCONTROL_ACLR_B
16013 
NONE
16014 
PARAMETER_UNKNOWN
16015 
DEF
16016 
ADDRESS_ACLR_B
16017 
NONE
16018 
PARAMETER_UNKNOWN
16019 
USR
16020 
OUTDATA_ACLR_B
16021 
NONE
16022 
PARAMETER_UNKNOWN
16023 
USR
16024 
RDCONTROL_ACLR_B
16025 
NONE
16026 
PARAMETER_UNKNOWN
16027 
DEF
16028 
BYTEENA_ACLR_B
16029 
NONE
16030 
PARAMETER_UNKNOWN
16031 
DEF
16032 
WIDTH_BYTEENA_A
16033 
1
16034 
PARAMETER_UNKNOWN
16035 
DEF
16036 
WIDTH_BYTEENA_B
16037 
1
16038 
PARAMETER_UNKNOWN
16039 
DEF
16040 
RAM_BLOCK_TYPE
16041 
AUTO
16042 
PARAMETER_UNKNOWN
16043 
USR
16044 
BYTE_SIZE
16045 
8
16046 
PARAMETER_UNKNOWN
16047 
DEF
16048 
READ_DURING_WRITE_MODE_MIXED_PORTS
16049 
OLD_DATA
16050 
PARAMETER_UNKNOWN
16051 
USR
16052 
READ_DURING_WRITE_MODE_PORT_A
16053 
NEW_DATA_NO_NBE_READ
16054 
PARAMETER_UNKNOWN
16055 
DEF
16056 
READ_DURING_WRITE_MODE_PORT_B
16057 
NEW_DATA_NO_NBE_READ
16058 
PARAMETER_UNKNOWN
16059 
DEF
16060 
INIT_FILE
16061 
UNUSED
16062 
PARAMETER_UNKNOWN
16063 
DEF
16064 
INIT_FILE_LAYOUT
16065 
PORT_A
16066 
PARAMETER_UNKNOWN
16067 
DEF
16068 
MAXIMUM_DEPTH
16069 
 
16070 
PARAMETER_UNKNOWN
16071 
DEF
16072 
CLOCK_ENABLE_INPUT_A
16073 
NORMAL
16074 
PARAMETER_UNKNOWN
16075 
DEF
16076 
CLOCK_ENABLE_INPUT_B
16077 
NORMAL
16078 
PARAMETER_UNKNOWN
16079 
DEF
16080 
CLOCK_ENABLE_OUTPUT_A
16081 
NORMAL
16082 
PARAMETER_UNKNOWN
16083 
DEF
16084 
CLOCK_ENABLE_OUTPUT_B
16085 
NORMAL
16086 
PARAMETER_UNKNOWN
16087 
DEF
16088 
CLOCK_ENABLE_CORE_A
16089 
USE_INPUT_CLKEN
16090 
PARAMETER_UNKNOWN
16091 
DEF
16092 
CLOCK_ENABLE_CORE_B
16093 
USE_INPUT_CLKEN
16094 
PARAMETER_UNKNOWN
16095 
DEF
16096 
ENABLE_ECC
16097 
FALSE
16098 
PARAMETER_UNKNOWN
16099 
DEF
16100 
DEVICE_FAMILY
16101 
Stratix II
16102 
PARAMETER_UNKNOWN
16103 
USR
16104 
CBXI_PARAMETER
16105 
altsyncram_rpi1
16106 
PARAMETER_UNKNOWN
16107 
USR
16108 
}
16109 
# used_port {
16110 
wren_a
16111 
-1
16112 
3
16113 
q_b9
16114 
-1
16115 
3
16116 
q_b8
16117 
-1
16118 
3
16119 
q_b7
16120 
-1
16121 
3
16122 
q_b6
16123 
-1
16124 
3
16125 
q_b5
16126 
-1
16127 
3
16128 
q_b4
16129 
-1
16130 
3
16131 
q_b3
16132 
-1
16133 
3
16134 
q_b2
16135 
-1
16136 
3
16137 
q_b1
16138 
-1
16139 
3
16140 
q_b0
16141 
-1
16142 
3
16143 
data_a9
16144 
-1
16145 
3
16146 
data_a8
16147 
-1
16148 
3
16149 
data_a7
16150 
-1
16151 
3
16152 
data_a6
16153 
-1
16154 
3
16155 
data_a5
16156 
-1
16157 
3
16158 
data_a4
16159 
-1
16160 
3
16161 
data_a3
16162 
-1
16163 
3
16164 
data_a2
16165 
-1
16166 
3
16167 
data_a1
16168 
-1
16169 
3
16170 
data_a0
16171 
-1
16172 
3
16173 
clock0
16174 
-1
16175 
3
16176 
address_b4
16177 
-1
16178 
3
16179 
address_b3
16180 
-1
16181 
3
16182 
address_b2
16183 
-1
16184 
3
16185 
address_b1
16186 
-1
16187 
3
16188 
address_b0
16189 
-1
16190 
3
16191 
address_a4
16192 
-1
16193 
3
16194 
address_a3
16195 
-1
16196 
3
16197 
address_a2
16198 
-1
16199 
3
16200 
address_a1
16201 
-1
16202 
3
16203 
address_a0
16204 
-1
16205 
3
16206 
}
16207 
# include_file {
16208 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
16209 
c22bfd353214c01495b560fc34e47d79
16210 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
16211 
2263a3bdfffeb150af977ee13902f70
16212 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
16213 
bd0e2f5e01c1bd360461dceb53d48
16214 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
16215 
f39123b8592ab2dac019716e56b3ec18
16216 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
16217 
60d229340bc3c24acb0a137b4849830
16218 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
16219 
d4e3a69a331d3a99d3281790d99a1ebd
16220 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
16221 
e66a83eccf6717bed97c99d891ad085
16222 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
16223 
99d442b5b66c88db4daf94d99c6e4e77
16224 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
16225 
74e08939f96a7ea8e7a4d59a5b01fe7
16226 
}
16227 
# lmf
16228 
d:|altera|72|quartus|lmf|
16229 
d41d8cd98f0b24e980998ecf8427e
16230 
# macro_sequence
16231 
 
16232 
# end
16233 
# entity
16234 
altsyncram_rpi1
16235 
# storage
16236 
db|LB.(79).cnf
16237 
db|LB.(79).cnf
16238 
# case_insensitive
16239 
# source_file
16240 
db|altsyncram_rpi1.tdf
16241 
9e37437b906db524dc4b5ac072bf46d
16242 
6
16243 
# used_port {
16244 
wren_a
16245 
-1
16246 
3
16247 
q_b9
16248 
-1
16249 
3
16250 
q_b8
16251 
-1
16252 
3
16253 
q_b7
16254 
-1
16255 
3
16256 
q_b6
16257 
-1
16258 
3
16259 
q_b5
16260 
-1
16261 
3
16262 
q_b4
16263 
-1
16264 
3
16265 
q_b3
16266 
-1
16267 
3
16268 
q_b2
16269 
-1
16270 
3
16271 
q_b1
16272 
-1
16273 
3
16274 
q_b0
16275 
-1
16276 
3
16277 
data_a9
16278 
-1
16279 
3
16280 
data_a8
16281 
-1
16282 
3
16283 
data_a7
16284 
-1
16285 
3
16286 
data_a6
16287 
-1
16288 
3
16289 
data_a5
16290 
-1
16291 
3
16292 
data_a4
16293 
-1
16294 
3
16295 
data_a3
16296 
-1
16297 
3
16298 
data_a2
16299 
-1
16300 
3
16301 
data_a1
16302 
-1
16303 
3
16304 
data_a0
16305 
-1
16306 
3
16307 
clock0
16308 
-1
16309 
3
16310 
address_b4
16311 
-1
16312 
3
16313 
address_b3
16314 
-1
16315 
3
16316 
address_b2
16317 
-1
16318 
3
16319 
address_b1
16320 
-1
16321 
3
16322 
address_b0
16323 
-1
16324 
3
16325 
address_a4
16326 
-1
16327 
3
16328 
address_a3
16329 
-1
16330 
3
16331 
address_a2
16332 
-1
16333 
3
16334 
address_a1
16335 
-1
16336 
3
16337 
address_a0
16338 
-1
16339 
3
16340 
}
16341 
# lmf
16342 
d:|altera|72|quartus|lmf|
16343 
d41d8cd98f0b24e980998ecf8427e
16344 
# macro_sequence
16345 
 
16346 
# end
16347 
# entity
16348 
altsyncram
16349 
# storage
16350 
db|LB.(80).cnf
16351 
db|LB.(80).cnf
16352 
# case_insensitive
16353 
# source_file
16354 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
16355 
1a8e44bce3df5c9cae2128978e887541
16356 
6
16357 
# user_parameter {
16358 
BYTE_SIZE_BLOCK
16359 
8
16360 
PARAMETER_UNKNOWN
16361 
DEF
16362 
AUTO_CARRY_CHAINS
16363 
ON
16364 
AUTO_CARRY
16365 
USR
16366 
IGNORE_CARRY_BUFFERS
16367 
OFF
16368 
IGNORE_CARRY
16369 
USR
16370 
AUTO_CASCADE_CHAINS
16371 
ON
16372 
AUTO_CASCADE
16373 
USR
16374 
IGNORE_CASCADE_BUFFERS
16375 
OFF
16376 
IGNORE_CASCADE
16377 
USR
16378 
WIDTH_BYTEENA
16379 
1
16380 
PARAMETER_UNKNOWN
16381 
DEF
16382 
OPERATION_MODE
16383 
DUAL_PORT
16384 
PARAMETER_UNKNOWN
16385 
USR
16386 
WIDTH_A
16387 
48
16388 
PARAMETER_UNKNOWN
16389 
USR
16390 
WIDTHAD_A
16391 
10
16392 
PARAMETER_UNKNOWN
16393 
USR
16394 
NUMWORDS_A
16395 
1024
16396 
PARAMETER_UNKNOWN
16397 
USR
16398 
OUTDATA_REG_A
16399 
UNREGISTERED
16400 
PARAMETER_UNKNOWN
16401 
DEF
16402 
ADDRESS_ACLR_A
16403 
NONE
16404 
PARAMETER_UNKNOWN
16405 
USR
16406 
OUTDATA_ACLR_A
16407 
NONE
16408 
PARAMETER_UNKNOWN
16409 
DEF
16410 
WRCONTROL_ACLR_A
16411 
NONE
16412 
PARAMETER_UNKNOWN
16413 
USR
16414 
INDATA_ACLR_A
16415 
NONE
16416 
PARAMETER_UNKNOWN
16417 
USR
16418 
BYTEENA_ACLR_A
16419 
NONE
16420 
PARAMETER_UNKNOWN
16421 
DEF
16422 
WIDTH_B
16423 
48
16424 
PARAMETER_UNKNOWN
16425 
USR
16426 
WIDTHAD_B
16427 
10
16428 
PARAMETER_UNKNOWN
16429 
USR
16430 
NUMWORDS_B
16431 
1024
16432 
PARAMETER_UNKNOWN
16433 
USR
16434 
INDATA_REG_B
16435 
CLOCK1
16436 
PARAMETER_UNKNOWN
16437 
DEF
16438 
WRCONTROL_WRADDRESS_REG_B
16439 
CLOCK1
16440 
PARAMETER_UNKNOWN
16441 
DEF
16442 
RDCONTROL_REG_B
16443 
CLOCK1
16444 
PARAMETER_UNKNOWN
16445 
DEF
16446 
ADDRESS_REG_B
16447 
CLOCK0
16448 
PARAMETER_UNKNOWN
16449 
USR
16450 
OUTDATA_REG_B
16451 
UNREGISTERED
16452 
PARAMETER_UNKNOWN
16453 
USR
16454 
BYTEENA_REG_B
16455 
CLOCK1
16456 
PARAMETER_UNKNOWN
16457 
DEF
16458 
INDATA_ACLR_B
16459 
NONE
16460 
PARAMETER_UNKNOWN
16461 
DEF
16462 
WRCONTROL_ACLR_B
16463 
NONE
16464 
PARAMETER_UNKNOWN
16465 
DEF
16466 
ADDRESS_ACLR_B
16467 
NONE
16468 
PARAMETER_UNKNOWN
16469 
USR
16470 
OUTDATA_ACLR_B
16471 
NONE
16472 
PARAMETER_UNKNOWN
16473 
USR
16474 
RDCONTROL_ACLR_B
16475 
NONE
16476 
PARAMETER_UNKNOWN
16477 
DEF
16478 
BYTEENA_ACLR_B
16479 
NONE
16480 
PARAMETER_UNKNOWN
16481 
DEF
16482 
WIDTH_BYTEENA_A
16483 
1
16484 
PARAMETER_UNKNOWN
16485 
DEF
16486 
WIDTH_BYTEENA_B
16487 
1
16488 
PARAMETER_UNKNOWN
16489 
DEF
16490 
RAM_BLOCK_TYPE
16491 
AUTO
16492 
PARAMETER_UNKNOWN
16493 
USR
16494 
BYTE_SIZE
16495 
8
16496 
PARAMETER_UNKNOWN
16497 
DEF
16498 
READ_DURING_WRITE_MODE_MIXED_PORTS
16499 
OLD_DATA
16500 
PARAMETER_UNKNOWN
16501 
USR
16502 
READ_DURING_WRITE_MODE_PORT_A
16503 
NEW_DATA_NO_NBE_READ
16504 
PARAMETER_UNKNOWN
16505 
DEF
16506 
READ_DURING_WRITE_MODE_PORT_B
16507 
NEW_DATA_NO_NBE_READ
16508 
PARAMETER_UNKNOWN
16509 
DEF
16510 
INIT_FILE
16511 
UNUSED
16512 
PARAMETER_UNKNOWN
16513 
DEF
16514 
INIT_FILE_LAYOUT
16515 
PORT_A
16516 
PARAMETER_UNKNOWN
16517 
DEF
16518 
MAXIMUM_DEPTH
16519 
 
16520 
PARAMETER_UNKNOWN
16521 
DEF
16522 
CLOCK_ENABLE_INPUT_A
16523 
NORMAL
16524 
PARAMETER_UNKNOWN
16525 
DEF
16526 
CLOCK_ENABLE_INPUT_B
16527 
NORMAL
16528 
PARAMETER_UNKNOWN
16529 
DEF
16530 
CLOCK_ENABLE_OUTPUT_A
16531 
NORMAL
16532 
PARAMETER_UNKNOWN
16533 
DEF
16534 
CLOCK_ENABLE_OUTPUT_B
16535 
NORMAL
16536 
PARAMETER_UNKNOWN
16537 
DEF
16538 
CLOCK_ENABLE_CORE_A
16539 
USE_INPUT_CLKEN
16540 
PARAMETER_UNKNOWN
16541 
DEF
16542 
CLOCK_ENABLE_CORE_B
16543 
USE_INPUT_CLKEN
16544 
PARAMETER_UNKNOWN
16545 
DEF
16546 
ENABLE_ECC
16547 
FALSE
16548 
PARAMETER_UNKNOWN
16549 
DEF
16550 
DEVICE_FAMILY
16551 
Stratix II
16552 
PARAMETER_UNKNOWN
16553 
USR
16554 
CBXI_PARAMETER
16555 
altsyncram_d3j1
16556 
PARAMETER_UNKNOWN
16557 
USR
16558 
}
16559 
# used_port {
16560 
wren_a
16561 
-1
16562 
3
16563 
q_b9
16564 
-1
16565 
3
16566 
q_b8
16567 
-1
16568 
3
16569 
q_b7
16570 
-1
16571 
3
16572 
q_b6
16573 
-1
16574 
3
16575 
q_b5
16576 
-1
16577 
3
16578 
q_b47
16579 
-1
16580 
3
16581 
q_b46
16582 
-1
16583 
3
16584 
q_b45
16585 
-1
16586 
3
16587 
q_b44
16588 
-1
16589 
3
16590 
q_b43
16591 
-1
16592 
3
16593 
q_b42
16594 
-1
16595 
3
16596 
q_b41
16597 
-1
16598 
3
16599 
q_b40
16600 
-1
16601 
3
16602 
q_b4
16603 
-1
16604 
3
16605 
q_b39
16606 
-1
16607 
3
16608 
q_b38
16609 
-1
16610 
3
16611 
q_b37
16612 
-1
16613 
3
16614 
q_b36
16615 
-1
16616 
3
16617 
q_b35
16618 
-1
16619 
3
16620 
q_b34
16621 
-1
16622 
3
16623 
q_b33
16624 
-1
16625 
3
16626 
q_b32
16627 
-1
16628 
3
16629 
q_b31
16630 
-1
16631 
3
16632 
q_b30
16633 
-1
16634 
3
16635 
q_b3
16636 
-1
16637 
3
16638 
q_b29
16639 
-1
16640 
3
16641 
q_b28
16642 
-1
16643 
3
16644 
q_b27
16645 
-1
16646 
3
16647 
q_b26
16648 
-1
16649 
3
16650 
q_b25
16651 
-1
16652 
3
16653 
q_b24
16654 
-1
16655 
3
16656 
q_b23
16657 
-1
16658 
3
16659 
q_b22
16660 
-1
16661 
3
16662 
q_b21
16663 
-1
16664 
3
16665 
q_b20
16666 
-1
16667 
3
16668 
q_b2
16669 
-1
16670 
3
16671 
q_b19
16672 
-1
16673 
3
16674 
q_b18
16675 
-1
16676 
3
16677 
q_b17
16678 
-1
16679 
3
16680 
q_b16
16681 
-1
16682 
3
16683 
q_b15
16684 
-1
16685 
3
16686 
q_b14
16687 
-1
16688 
3
16689 
q_b13
16690 
-1
16691 
3
16692 
q_b12
16693 
-1
16694 
3
16695 
q_b11
16696 
-1
16697 
3
16698 
q_b10
16699 
-1
16700 
3
16701 
q_b1
16702 
-1
16703 
3
16704 
q_b0
16705 
-1
16706 
3
16707 
data_a9
16708 
-1
16709 
3
16710 
data_a8
16711 
-1
16712 
3
16713 
data_a7
16714 
-1
16715 
3
16716 
data_a6
16717 
-1
16718 
3
16719 
data_a5
16720 
-1
16721 
3
16722 
data_a47
16723 
-1
16724 
3
16725 
data_a46
16726 
-1
16727 
3
16728 
data_a45
16729 
-1
16730 
3
16731 
data_a44
16732 
-1
16733 
3
16734 
data_a43
16735 
-1
16736 
3
16737 
data_a42
16738 
-1
16739 
3
16740 
data_a41
16741 
-1
16742 
3
16743 
data_a40
16744 
-1
16745 
3
16746 
data_a4
16747 
-1
16748 
3
16749 
data_a39
16750 
-1
16751 
3
16752 
data_a38
16753 
-1
16754 
3
16755 
data_a37
16756 
-1
16757 
3
16758 
data_a36
16759 
-1
16760 
3
16761 
data_a35
16762 
-1
16763 
3
16764 
data_a34
16765 
-1
16766 
3
16767 
data_a33
16768 
-1
16769 
3
16770 
data_a32
16771 
-1
16772 
3
16773 
data_a31
16774 
-1
16775 
3
16776 
data_a30
16777 
-1
16778 
3
16779 
data_a3
16780 
-1
16781 
3
16782 
data_a29
16783 
-1
16784 
3
16785 
data_a28
16786 
-1
16787 
3
16788 
data_a27
16789 
-1
16790 
3
16791 
data_a26
16792 
-1
16793 
3
16794 
data_a25
16795 
-1
16796 
3
16797 
data_a24
16798 
-1
16799 
3
16800 
data_a23
16801 
-1
16802 
3
16803 
data_a22
16804 
-1
16805 
3
16806 
data_a21
16807 
-1
16808 
3
16809 
data_a20
16810 
-1
16811 
3
16812 
data_a2
16813 
-1
16814 
3
16815 
data_a19
16816 
-1
16817 
3
16818 
data_a18
16819 
-1
16820 
3
16821 
data_a17
16822 
-1
16823 
3
16824 
data_a16
16825 
-1
16826 
3
16827 
data_a15
16828 
-1
16829 
3
16830 
data_a14
16831 
-1
16832 
3
16833 
data_a13
16834 
-1
16835 
3
16836 
data_a12
16837 
-1
16838 
3
16839 
data_a11
16840 
-1
16841 
3
16842 
data_a10
16843 
-1
16844 
3
16845 
data_a1
16846 
-1
16847 
3
16848 
data_a0
16849 
-1
16850 
3
16851 
clock0
16852 
-1
16853 
3
16854 
address_b9
16855 
-1
16856 
3
16857 
address_b8
16858 
-1
16859 
3
16860 
address_b7
16861 
-1
16862 
3
16863 
address_b6
16864 
-1
16865 
3
16866 
address_b5
16867 
-1
16868 
3
16869 
address_b4
16870 
-1
16871 
3
16872 
address_b3
16873 
-1
16874 
3
16875 
address_b2
16876 
-1
16877 
3
16878 
address_b1
16879 
-1
16880 
3
16881 
address_b0
16882 
-1
16883 
3
16884 
address_a9
16885 
-1
16886 
3
16887 
address_a8
16888 
-1
16889 
3
16890 
address_a7
16891 
-1
16892 
3
16893 
address_a6
16894 
-1
16895 
3
16896 
address_a5
16897 
-1
16898 
3
16899 
address_a4
16900 
-1
16901 
3
16902 
address_a3
16903 
-1
16904 
3
16905 
address_a2
16906 
-1
16907 
3
16908 
address_a1
16909 
-1
16910 
3
16911 
address_a0
16912 
-1
16913 
3
16914 
}
16915 
# include_file {
16916 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
16917 
c22bfd353214c01495b560fc34e47d79
16918 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
16919 
2263a3bdfffeb150af977ee13902f70
16920 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
16921 
bd0e2f5e01c1bd360461dceb53d48
16922 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
16923 
f39123b8592ab2dac019716e56b3ec18
16924 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
16925 
60d229340bc3c24acb0a137b4849830
16926 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
16927 
d4e3a69a331d3a99d3281790d99a1ebd
16928 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
16929 
e66a83eccf6717bed97c99d891ad085
16930 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
16931 
99d442b5b66c88db4daf94d99c6e4e77
16932 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
16933 
74e08939f96a7ea8e7a4d59a5b01fe7
16934 
}
16935 
# lmf
16936 
d:|altera|72|quartus|lmf|
16937 
d41d8cd98f0b24e980998ecf8427e
16938 
# macro_sequence
16939 
 
16940 
# end
16941 
# entity
16942 
altsyncram_d3j1
16943 
# storage
16944 
db|LB.(81).cnf
16945 
db|LB.(81).cnf
16946 
# case_insensitive
16947 
# source_file
16948 
db|altsyncram_d3j1.tdf
16949 
8f80d0d0a98235b7211bc201bd4b1bb
16950 
6
16951 
# used_port {
16952 
wren_a
16953 
-1
16954 
3
16955 
q_b9
16956 
-1
16957 
3
16958 
q_b8
16959 
-1
16960 
3
16961 
q_b7
16962 
-1
16963 
3
16964 
q_b6
16965 
-1
16966 
3
16967 
q_b5
16968 
-1
16969 
3
16970 
q_b47
16971 
-1
16972 
3
16973 
q_b46
16974 
-1
16975 
3
16976 
q_b45
16977 
-1
16978 
3
16979 
q_b44
16980 
-1
16981 
3
16982 
q_b43
16983 
-1
16984 
3
16985 
q_b42
16986 
-1
16987 
3
16988 
q_b41
16989 
-1
16990 
3
16991 
q_b40
16992 
-1
16993 
3
16994 
q_b4
16995 
-1
16996 
3
16997 
q_b39
16998 
-1
16999 
3
17000 
q_b38
17001 
-1
17002 
3
17003 
q_b37
17004 
-1
17005 
3
17006 
q_b36
17007 
-1
17008 
3
17009 
q_b35
17010 
-1
17011 
3
17012 
q_b34
17013 
-1
17014 
3
17015 
q_b33
17016 
-1
17017 
3
17018 
q_b32
17019 
-1
17020 
3
17021 
q_b31
17022 
-1
17023 
3
17024 
q_b30
17025 
-1
17026 
3
17027 
q_b3
17028 
-1
17029 
3
17030 
q_b29
17031 
-1
17032 
3
17033 
q_b28
17034 
-1
17035 
3
17036 
q_b27
17037 
-1
17038 
3
17039 
q_b26
17040 
-1
17041 
3
17042 
q_b25
17043 
-1
17044 
3
17045 
q_b24
17046 
-1
17047 
3
17048 
q_b23
17049 
-1
17050 
3
17051 
q_b22
17052 
-1
17053 
3
17054 
q_b21
17055 
-1
17056 
3
17057 
q_b20
17058 
-1
17059 
3
17060 
q_b2
17061 
-1
17062 
3
17063 
q_b19
17064 
-1
17065 
3
17066 
q_b18
17067 
-1
17068 
3
17069 
q_b17
17070 
-1
17071 
3
17072 
q_b16
17073 
-1
17074 
3
17075 
q_b15
17076 
-1
17077 
3
17078 
q_b14
17079 
-1
17080 
3
17081 
q_b13
17082 
-1
17083 
3
17084 
q_b12
17085 
-1
17086 
3
17087 
q_b11
17088 
-1
17089 
3
17090 
q_b10
17091 
-1
17092 
3
17093 
q_b1
17094 
-1
17095 
3
17096 
q_b0
17097 
-1
17098 
3
17099 
data_a9
17100 
-1
17101 
3
17102 
data_a8
17103 
-1
17104 
3
17105 
data_a7
17106 
-1
17107 
3
17108 
data_a6
17109 
-1
17110 
3
17111 
data_a5
17112 
-1
17113 
3
17114 
data_a47
17115 
-1
17116 
3
17117 
data_a46
17118 
-1
17119 
3
17120 
data_a45
17121 
-1
17122 
3
17123 
data_a44
17124 
-1
17125 
3
17126 
data_a43
17127 
-1
17128 
3
17129 
data_a42
17130 
-1
17131 
3
17132 
data_a41
17133 
-1
17134 
3
17135 
data_a40
17136 
-1
17137 
3
17138 
data_a4
17139 
-1
17140 
3
17141 
data_a39
17142 
-1
17143 
3
17144 
data_a38
17145 
-1
17146 
3
17147 
data_a37
17148 
-1
17149 
3
17150 
data_a36
17151 
-1
17152 
3
17153 
data_a35
17154 
-1
17155 
3
17156 
data_a34
17157 
-1
17158 
3
17159 
data_a33
17160 
-1
17161 
3
17162 
data_a32
17163 
-1
17164 
3
17165 
data_a31
17166 
-1
17167 
3
17168 
data_a30
17169 
-1
17170 
3
17171 
data_a3
17172 
-1
17173 
3
17174 
data_a29
17175 
-1
17176 
3
17177 
data_a28
17178 
-1
17179 
3
17180 
data_a27
17181 
-1
17182 
3
17183 
data_a26
17184 
-1
17185 
3
17186 
data_a25
17187 
-1
17188 
3
17189 
data_a24
17190 
-1
17191 
3
17192 
data_a23
17193 
-1
17194 
3
17195 
data_a22
17196 
-1
17197 
3
17198 
data_a21
17199 
-1
17200 
3
17201 
data_a20
17202 
-1
17203 
3
17204 
data_a2
17205 
-1
17206 
3
17207 
data_a19
17208 
-1
17209 
3
17210 
data_a18
17211 
-1
17212 
3
17213 
data_a17
17214 
-1
17215 
3
17216 
data_a16
17217 
-1
17218 
3
17219 
data_a15
17220 
-1
17221 
3
17222 
data_a14
17223 
-1
17224 
3
17225 
data_a13
17226 
-1
17227 
3
17228 
data_a12
17229 
-1
17230 
3
17231 
data_a11
17232 
-1
17233 
3
17234 
data_a10
17235 
-1
17236 
3
17237 
data_a1
17238 
-1
17239 
3
17240 
data_a0
17241 
-1
17242 
3
17243 
clock0
17244 
-1
17245 
3
17246 
address_b9
17247 
-1
17248 
3
17249 
address_b8
17250 
-1
17251 
3
17252 
address_b7
17253 
-1
17254 
3
17255 
address_b6
17256 
-1
17257 
3
17258 
address_b5
17259 
-1
17260 
3
17261 
address_b4
17262 
-1
17263 
3
17264 
address_b3
17265 
-1
17266 
3
17267 
address_b2
17268 
-1
17269 
3
17270 
address_b1
17271 
-1
17272 
3
17273 
address_b0
17274 
-1
17275 
3
17276 
address_a9
17277 
-1
17278 
3
17279 
address_a8
17280 
-1
17281 
3
17282 
address_a7
17283 
-1
17284 
3
17285 
address_a6
17286 
-1
17287 
3
17288 
address_a5
17289 
-1
17290 
3
17291 
address_a4
17292 
-1
17293 
3
17294 
address_a3
17295 
-1
17296 
3
17297 
address_a2
17298 
-1
17299 
3
17300 
address_a1
17301 
-1
17302 
3
17303 
address_a0
17304 
-1
17305 
3
17306 
}
17307 
# lmf
17308 
d:|altera|72|quartus|lmf|
17309 
d41d8cd98f0b24e980998ecf8427e
17310 
# macro_sequence
17311 
 
17312 
# end
17313 
# entity
17314 
altsyncram
17315 
# storage
17316 
db|LB.(82).cnf
17317 
db|LB.(82).cnf
17318 
# case_insensitive
17319 
# source_file
17320 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
17321 
1a8e44bce3df5c9cae2128978e887541
17322 
6
17323 
# user_parameter {
17324 
BYTE_SIZE_BLOCK
17325 
8
17326 
PARAMETER_UNKNOWN
17327 
DEF
17328 
AUTO_CARRY_CHAINS
17329 
ON
17330 
AUTO_CARRY
17331 
USR
17332 
IGNORE_CARRY_BUFFERS
17333 
OFF
17334 
IGNORE_CARRY
17335 
USR
17336 
AUTO_CASCADE_CHAINS
17337 
ON
17338 
AUTO_CASCADE
17339 
USR
17340 
IGNORE_CASCADE_BUFFERS
17341 
OFF
17342 
IGNORE_CASCADE
17343 
USR
17344 
WIDTH_BYTEENA
17345 
1
17346 
PARAMETER_UNKNOWN
17347 
DEF
17348 
OPERATION_MODE
17349 
DUAL_PORT
17350 
PARAMETER_UNKNOWN
17351 
USR
17352 
WIDTH_A
17353 
10
17354 
PARAMETER_UNKNOWN
17355 
USR
17356 
WIDTHAD_A
17357 
10
17358 
PARAMETER_UNKNOWN
17359 
USR
17360 
NUMWORDS_A
17361 
1024
17362 
PARAMETER_UNKNOWN
17363 
USR
17364 
OUTDATA_REG_A
17365 
UNREGISTERED
17366 
PARAMETER_UNKNOWN
17367 
DEF
17368 
ADDRESS_ACLR_A
17369 
NONE
17370 
PARAMETER_UNKNOWN
17371 
USR
17372 
OUTDATA_ACLR_A
17373 
NONE
17374 
PARAMETER_UNKNOWN
17375 
DEF
17376 
WRCONTROL_ACLR_A
17377 
NONE
17378 
PARAMETER_UNKNOWN
17379 
USR
17380 
INDATA_ACLR_A
17381 
NONE
17382 
PARAMETER_UNKNOWN
17383 
USR
17384 
BYTEENA_ACLR_A
17385 
NONE
17386 
PARAMETER_UNKNOWN
17387 
DEF
17388 
WIDTH_B
17389 
10
17390 
PARAMETER_UNKNOWN
17391 
USR
17392 
WIDTHAD_B
17393 
10
17394 
PARAMETER_UNKNOWN
17395 
USR
17396 
NUMWORDS_B
17397 
1024
17398 
PARAMETER_UNKNOWN
17399 
USR
17400 
INDATA_REG_B
17401 
CLOCK1
17402 
PARAMETER_UNKNOWN
17403 
DEF
17404 
WRCONTROL_WRADDRESS_REG_B
17405 
CLOCK1
17406 
PARAMETER_UNKNOWN
17407 
DEF
17408 
RDCONTROL_REG_B
17409 
CLOCK1
17410 
PARAMETER_UNKNOWN
17411 
DEF
17412 
ADDRESS_REG_B
17413 
CLOCK0
17414 
PARAMETER_UNKNOWN
17415 
USR
17416 
OUTDATA_REG_B
17417 
UNREGISTERED
17418 
PARAMETER_UNKNOWN
17419 
USR
17420 
BYTEENA_REG_B
17421 
CLOCK1
17422 
PARAMETER_UNKNOWN
17423 
DEF
17424 
INDATA_ACLR_B
17425 
NONE
17426 
PARAMETER_UNKNOWN
17427 
DEF
17428 
WRCONTROL_ACLR_B
17429 
NONE
17430 
PARAMETER_UNKNOWN
17431 
DEF
17432 
ADDRESS_ACLR_B
17433 
NONE
17434 
PARAMETER_UNKNOWN
17435 
USR
17436 
OUTDATA_ACLR_B
17437 
NONE
17438 
PARAMETER_UNKNOWN
17439 
USR
17440 
RDCONTROL_ACLR_B
17441 
NONE
17442 
PARAMETER_UNKNOWN
17443 
DEF
17444 
BYTEENA_ACLR_B
17445 
NONE
17446 
PARAMETER_UNKNOWN
17447 
DEF
17448 
WIDTH_BYTEENA_A
17449 
1
17450 
PARAMETER_UNKNOWN
17451 
DEF
17452 
WIDTH_BYTEENA_B
17453 
1
17454 
PARAMETER_UNKNOWN
17455 
DEF
17456 
RAM_BLOCK_TYPE
17457 
AUTO
17458 
PARAMETER_UNKNOWN
17459 
USR
17460 
BYTE_SIZE
17461 
8
17462 
PARAMETER_UNKNOWN
17463 
DEF
17464 
READ_DURING_WRITE_MODE_MIXED_PORTS
17465 
OLD_DATA
17466 
PARAMETER_UNKNOWN
17467 
USR
17468 
READ_DURING_WRITE_MODE_PORT_A
17469 
NEW_DATA_NO_NBE_READ
17470 
PARAMETER_UNKNOWN
17471 
DEF
17472 
READ_DURING_WRITE_MODE_PORT_B
17473 
NEW_DATA_NO_NBE_READ
17474 
PARAMETER_UNKNOWN
17475 
DEF
17476 
INIT_FILE
17477 
UNUSED
17478 
PARAMETER_UNKNOWN
17479 
DEF
17480 
INIT_FILE_LAYOUT
17481 
PORT_A
17482 
PARAMETER_UNKNOWN
17483 
DEF
17484 
MAXIMUM_DEPTH
17485 
 
17486 
PARAMETER_UNKNOWN
17487 
DEF
17488 
CLOCK_ENABLE_INPUT_A
17489 
NORMAL
17490 
PARAMETER_UNKNOWN
17491 
DEF
17492 
CLOCK_ENABLE_INPUT_B
17493 
NORMAL
17494 
PARAMETER_UNKNOWN
17495 
DEF
17496 
CLOCK_ENABLE_OUTPUT_A
17497 
NORMAL
17498 
PARAMETER_UNKNOWN
17499 
DEF
17500 
CLOCK_ENABLE_OUTPUT_B
17501 
NORMAL
17502 
PARAMETER_UNKNOWN
17503 
DEF
17504 
CLOCK_ENABLE_CORE_A
17505 
USE_INPUT_CLKEN
17506 
PARAMETER_UNKNOWN
17507 
DEF
17508 
CLOCK_ENABLE_CORE_B
17509 
USE_INPUT_CLKEN
17510 
PARAMETER_UNKNOWN
17511 
DEF
17512 
ENABLE_ECC
17513 
FALSE
17514 
PARAMETER_UNKNOWN
17515 
DEF
17516 
DEVICE_FAMILY
17517 
Stratix II
17518 
PARAMETER_UNKNOWN
17519 
USR
17520 
CBXI_PARAMETER
17521 
altsyncram_n2j1
17522 
PARAMETER_UNKNOWN
17523 
USR
17524 
}
17525 
# used_port {
17526 
wren_a
17527 
-1
17528 
3
17529 
q_b9
17530 
-1
17531 
3
17532 
q_b8
17533 
-1
17534 
3
17535 
q_b7
17536 
-1
17537 
3
17538 
q_b6
17539 
-1
17540 
3
17541 
q_b5
17542 
-1
17543 
3
17544 
q_b4
17545 
-1
17546 
3
17547 
q_b3
17548 
-1
17549 
3
17550 
q_b2
17551 
-1
17552 
3
17553 
q_b1
17554 
-1
17555 
3
17556 
q_b0
17557 
-1
17558 
3
17559 
data_a9
17560 
-1
17561 
3
17562 
data_a8
17563 
-1
17564 
3
17565 
data_a7
17566 
-1
17567 
3
17568 
data_a6
17569 
-1
17570 
3
17571 
data_a5
17572 
-1
17573 
3
17574 
data_a4
17575 
-1
17576 
3
17577 
data_a3
17578 
-1
17579 
3
17580 
data_a2
17581 
-1
17582 
3
17583 
data_a1
17584 
-1
17585 
3
17586 
data_a0
17587 
-1
17588 
3
17589 
clock0
17590 
-1
17591 
3
17592 
address_b9
17593 
-1
17594 
3
17595 
address_b8
17596 
-1
17597 
3
17598 
address_b7
17599 
-1
17600 
3
17601 
address_b6
17602 
-1
17603 
3
17604 
address_b5
17605 
-1
17606 
3
17607 
address_b4
17608 
-1
17609 
3
17610 
address_b3
17611 
-1
17612 
3
17613 
address_b2
17614 
-1
17615 
3
17616 
address_b1
17617 
-1
17618 
3
17619 
address_b0
17620 
-1
17621 
3
17622 
address_a9
17623 
-1
17624 
3
17625 
address_a8
17626 
-1
17627 
3
17628 
address_a7
17629 
-1
17630 
3
17631 
address_a6
17632 
-1
17633 
3
17634 
address_a5
17635 
-1
17636 
3
17637 
address_a4
17638 
-1
17639 
3
17640 
address_a3
17641 
-1
17642 
3
17643 
address_a2
17644 
-1
17645 
3
17646 
address_a1
17647 
-1
17648 
3
17649 
address_a0
17650 
-1
17651 
3
17652 
}
17653 
# include_file {
17654 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
17655 
c22bfd353214c01495b560fc34e47d79
17656 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
17657 
2263a3bdfffeb150af977ee13902f70
17658 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
17659 
bd0e2f5e01c1bd360461dceb53d48
17660 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
17661 
f39123b8592ab2dac019716e56b3ec18
17662 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
17663 
60d229340bc3c24acb0a137b4849830
17664 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
17665 
d4e3a69a331d3a99d3281790d99a1ebd
17666 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
17667 
e66a83eccf6717bed97c99d891ad085
17668 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
17669 
99d442b5b66c88db4daf94d99c6e4e77
17670 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
17671 
74e08939f96a7ea8e7a4d59a5b01fe7
17672 
}
17673 
# lmf
17674 
d:|altera|72|quartus|lmf|
17675 
d41d8cd98f0b24e980998ecf8427e
17676 
# macro_sequence
17677 
 
17678 
# end
17679 
# entity
17680 
altsyncram_n2j1
17681 
# storage
17682 
db|LB.(83).cnf
17683 
db|LB.(83).cnf
17684 
# case_insensitive
17685 
# source_file
17686 
db|altsyncram_n2j1.tdf
17687 
3e1f88e99b786d236767eed97b28919c
17688 
6
17689 
# used_port {
17690 
wren_a
17691 
-1
17692 
3
17693 
q_b9
17694 
-1
17695 
3
17696 
q_b8
17697 
-1
17698 
3
17699 
q_b7
17700 
-1
17701 
3
17702 
q_b6
17703 
-1
17704 
3
17705 
q_b5
17706 
-1
17707 
3
17708 
q_b4
17709 
-1
17710 
3
17711 
q_b3
17712 
-1
17713 
3
17714 
q_b2
17715 
-1
17716 
3
17717 
q_b1
17718 
-1
17719 
3
17720 
q_b0
17721 
-1
17722 
3
17723 
data_a9
17724 
-1
17725 
3
17726 
data_a8
17727 
-1
17728 
3
17729 
data_a7
17730 
-1
17731 
3
17732 
data_a6
17733 
-1
17734 
3
17735 
data_a5
17736 
-1
17737 
3
17738 
data_a4
17739 
-1
17740 
3
17741 
data_a3
17742 
-1
17743 
3
17744 
data_a2
17745 
-1
17746 
3
17747 
data_a1
17748 
-1
17749 
3
17750 
data_a0
17751 
-1
17752 
3
17753 
clock0
17754 
-1
17755 
3
17756 
address_b9
17757 
-1
17758 
3
17759 
address_b8
17760 
-1
17761 
3
17762 
address_b7
17763 
-1
17764 
3
17765 
address_b6
17766 
-1
17767 
3
17768 
address_b5
17769 
-1
17770 
3
17771 
address_b4
17772 
-1
17773 
3
17774 
address_b3
17775 
-1
17776 
3
17777 
address_b2
17778 
-1
17779 
3
17780 
address_b1
17781 
-1
17782 
3
17783 
address_b0
17784 
-1
17785 
3
17786 
address_a9
17787 
-1
17788 
3
17789 
address_a8
17790 
-1
17791 
3
17792 
address_a7
17793 
-1
17794 
3
17795 
address_a6
17796 
-1
17797 
3
17798 
address_a5
17799 
-1
17800 
3
17801 
address_a4
17802 
-1
17803 
3
17804 
address_a3
17805 
-1
17806 
3
17807 
address_a2
17808 
-1
17809 
3
17810 
address_a1
17811 
-1
17812 
3
17813 
address_a0
17814 
-1
17815 
3
17816 
}
17817 
# lmf
17818 
d:|altera|72|quartus|lmf|
17819 
d41d8cd98f0b24e980998ecf8427e
17820 
# macro_sequence
17821 
 
17822 
# end
17823 
# entity
17824 
small_fifo
17825 
# storage
17826 
db|LB.(85).cnf
17827 
db|LB.(85).cnf
17828 
# logic_option {
17829 
AUTO_RAM_RECOGNITION
17830 
ON
17831 
}
17832 
# case_sensitive
17833 
# source_file
17834 
small_fifo.v
17835 
1177d4c5f95945d866fbc28febfb18a6
17836 
7
17837 
# internal_option {
17838 
HDL_INITIAL_FANOUT_LIMIT
17839 
OFF
17840 
AUTO_RESOURCE_SHARING
17841 
OFF
17842 
AUTO_RAM_RECOGNITION
17843 
ON
17844 
AUTO_ROM_RECOGNITION
17845 
ON
17846 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
17847 
OFF
17848 
}
17849 
# user_parameter {
17850 
WIDTH
17851 
72
17852 
PARAMETER_SIGNED_DEC
17853 
USR
17854 
MAX_DEPTH_BITS
17855 
2
17856 
PARAMETER_SIGNED_DEC
17857 
USR
17858 
NEARLY_FULL
17859 
3
17860 
PARAMETER_SIGNED_DEC
17861 
USR
17862 
}
17863 
# lmf
17864 
d:|altera|72|quartus|lmf|
17865 
d41d8cd98f0b24e980998ecf8427e
17866 
# macro_sequence
17867 
 
17868 
# end
17869 
# entity
17870 
altsyncram
17871 
# storage
17872 
db|LB.(86).cnf
17873 
db|LB.(86).cnf
17874 
# case_insensitive
17875 
# source_file
17876 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
17877 
1a8e44bce3df5c9cae2128978e887541
17878 
6
17879 
# user_parameter {
17880 
BYTE_SIZE_BLOCK
17881 
8
17882 
PARAMETER_UNKNOWN
17883 
DEF
17884 
AUTO_CARRY_CHAINS
17885 
ON
17886 
AUTO_CARRY
17887 
USR
17888 
IGNORE_CARRY_BUFFERS
17889 
OFF
17890 
IGNORE_CARRY
17891 
USR
17892 
AUTO_CASCADE_CHAINS
17893 
ON
17894 
AUTO_CASCADE
17895 
USR
17896 
IGNORE_CASCADE_BUFFERS
17897 
OFF
17898 
IGNORE_CASCADE
17899 
USR
17900 
WIDTH_BYTEENA
17901 
1
17902 
PARAMETER_UNKNOWN
17903 
DEF
17904 
OPERATION_MODE
17905 
DUAL_PORT
17906 
PARAMETER_UNKNOWN
17907 
USR
17908 
WIDTH_A
17909 
72
17910 
PARAMETER_UNKNOWN
17911 
USR
17912 
WIDTHAD_A
17913 
2
17914 
PARAMETER_UNKNOWN
17915 
USR
17916 
NUMWORDS_A
17917 
4
17918 
PARAMETER_UNKNOWN
17919 
USR
17920 
OUTDATA_REG_A
17921 
UNREGISTERED
17922 
PARAMETER_UNKNOWN
17923 
DEF
17924 
ADDRESS_ACLR_A
17925 
NONE
17926 
PARAMETER_UNKNOWN
17927 
USR
17928 
OUTDATA_ACLR_A
17929 
NONE
17930 
PARAMETER_UNKNOWN
17931 
DEF
17932 
WRCONTROL_ACLR_A
17933 
NONE
17934 
PARAMETER_UNKNOWN
17935 
USR
17936 
INDATA_ACLR_A
17937 
NONE
17938 
PARAMETER_UNKNOWN
17939 
USR
17940 
BYTEENA_ACLR_A
17941 
NONE
17942 
PARAMETER_UNKNOWN
17943 
DEF
17944 
WIDTH_B
17945 
72
17946 
PARAMETER_UNKNOWN
17947 
USR
17948 
WIDTHAD_B
17949 
2
17950 
PARAMETER_UNKNOWN
17951 
USR
17952 
NUMWORDS_B
17953 
4
17954 
PARAMETER_UNKNOWN
17955 
USR
17956 
INDATA_REG_B
17957 
CLOCK1
17958 
PARAMETER_UNKNOWN
17959 
DEF
17960 
WRCONTROL_WRADDRESS_REG_B
17961 
CLOCK1
17962 
PARAMETER_UNKNOWN
17963 
DEF
17964 
RDCONTROL_REG_B
17965 
CLOCK1
17966 
PARAMETER_UNKNOWN
17967 
DEF
17968 
ADDRESS_REG_B
17969 
CLOCK0
17970 
PARAMETER_UNKNOWN
17971 
USR
17972 
OUTDATA_REG_B
17973 
UNREGISTERED
17974 
PARAMETER_UNKNOWN
17975 
USR
17976 
BYTEENA_REG_B
17977 
CLOCK1
17978 
PARAMETER_UNKNOWN
17979 
DEF
17980 
INDATA_ACLR_B
17981 
NONE
17982 
PARAMETER_UNKNOWN
17983 
DEF
17984 
WRCONTROL_ACLR_B
17985 
NONE
17986 
PARAMETER_UNKNOWN
17987 
DEF
17988 
ADDRESS_ACLR_B
17989 
NONE
17990 
PARAMETER_UNKNOWN
17991 
USR
17992 
OUTDATA_ACLR_B
17993 
NONE
17994 
PARAMETER_UNKNOWN
17995 
USR
17996 
RDCONTROL_ACLR_B
17997 
NONE
17998 
PARAMETER_UNKNOWN
17999 
DEF
18000 
BYTEENA_ACLR_B
18001 
NONE
18002 
PARAMETER_UNKNOWN
18003 
DEF
18004 
WIDTH_BYTEENA_A
18005 
1
18006 
PARAMETER_UNKNOWN
18007 
DEF
18008 
WIDTH_BYTEENA_B
18009 
1
18010 
PARAMETER_UNKNOWN
18011 
DEF
18012 
RAM_BLOCK_TYPE
18013 
AUTO
18014 
PARAMETER_UNKNOWN
18015 
USR
18016 
BYTE_SIZE
18017 
8
18018 
PARAMETER_UNKNOWN
18019 
DEF
18020 
READ_DURING_WRITE_MODE_MIXED_PORTS
18021 
OLD_DATA
18022 
PARAMETER_UNKNOWN
18023 
USR
18024 
READ_DURING_WRITE_MODE_PORT_A
18025 
NEW_DATA_NO_NBE_READ
18026 
PARAMETER_UNKNOWN
18027 
DEF
18028 
READ_DURING_WRITE_MODE_PORT_B
18029 
NEW_DATA_NO_NBE_READ
18030 
PARAMETER_UNKNOWN
18031 
DEF
18032 
INIT_FILE
18033 
UNUSED
18034 
PARAMETER_UNKNOWN
18035 
DEF
18036 
INIT_FILE_LAYOUT
18037 
PORT_A
18038 
PARAMETER_UNKNOWN
18039 
DEF
18040 
MAXIMUM_DEPTH
18041 
 
18042 
PARAMETER_UNKNOWN
18043 
DEF
18044 
CLOCK_ENABLE_INPUT_A
18045 
NORMAL
18046 
PARAMETER_UNKNOWN
18047 
DEF
18048 
CLOCK_ENABLE_INPUT_B
18049 
NORMAL
18050 
PARAMETER_UNKNOWN
18051 
DEF
18052 
CLOCK_ENABLE_OUTPUT_A
18053 
NORMAL
18054 
PARAMETER_UNKNOWN
18055 
DEF
18056 
CLOCK_ENABLE_OUTPUT_B
18057 
NORMAL
18058 
PARAMETER_UNKNOWN
18059 
DEF
18060 
CLOCK_ENABLE_CORE_A
18061 
USE_INPUT_CLKEN
18062 
PARAMETER_UNKNOWN
18063 
DEF
18064 
CLOCK_ENABLE_CORE_B
18065 
USE_INPUT_CLKEN
18066 
PARAMETER_UNKNOWN
18067 
DEF
18068 
ENABLE_ECC
18069 
FALSE
18070 
PARAMETER_UNKNOWN
18071 
DEF
18072 
DEVICE_FAMILY
18073 
Stratix II
18074 
PARAMETER_UNKNOWN
18075 
USR
18076 
CBXI_PARAMETER
18077 
altsyncram_4ni1
18078 
PARAMETER_UNKNOWN
18079 
USR
18080 
}
18081 
# used_port {
18082 
wren_a
18083 
-1
18084 
3
18085 
q_b9
18086 
-1
18087 
3
18088 
q_b8
18089 
-1
18090 
3
18091 
q_b71
18092 
-1
18093 
3
18094 
q_b70
18095 
-1
18096 
3
18097 
q_b7
18098 
-1
18099 
3
18100 
q_b69
18101 
-1
18102 
3
18103 
q_b68
18104 
-1
18105 
3
18106 
q_b67
18107 
-1
18108 
3
18109 
q_b66
18110 
-1
18111 
3
18112 
q_b65
18113 
-1
18114 
3
18115 
q_b64
18116 
-1
18117 
3
18118 
q_b63
18119 
-1
18120 
3
18121 
q_b62
18122 
-1
18123 
3
18124 
q_b61
18125 
-1
18126 
3
18127 
q_b60
18128 
-1
18129 
3
18130 
q_b6
18131 
-1
18132 
3
18133 
q_b59
18134 
-1
18135 
3
18136 
q_b58
18137 
-1
18138 
3
18139 
q_b57
18140 
-1
18141 
3
18142 
q_b56
18143 
-1
18144 
3
18145 
q_b55
18146 
-1
18147 
3
18148 
q_b54
18149 
-1
18150 
3
18151 
q_b53
18152 
-1
18153 
3
18154 
q_b52
18155 
-1
18156 
3
18157 
q_b51
18158 
-1
18159 
3
18160 
q_b50
18161 
-1
18162 
3
18163 
q_b5
18164 
-1
18165 
3
18166 
q_b49
18167 
-1
18168 
3
18169 
q_b48
18170 
-1
18171 
3
18172 
q_b47
18173 
-1
18174 
3
18175 
q_b46
18176 
-1
18177 
3
18178 
q_b45
18179 
-1
18180 
3
18181 
q_b44
18182 
-1
18183 
3
18184 
q_b43
18185 
-1
18186 
3
18187 
q_b42
18188 
-1
18189 
3
18190 
q_b41
18191 
-1
18192 
3
18193 
q_b40
18194 
-1
18195 
3
18196 
q_b4
18197 
-1
18198 
3
18199 
q_b39
18200 
-1
18201 
3
18202 
q_b38
18203 
-1
18204 
3
18205 
q_b37
18206 
-1
18207 
3
18208 
q_b36
18209 
-1
18210 
3
18211 
q_b35
18212 
-1
18213 
3
18214 
q_b34
18215 
-1
18216 
3
18217 
q_b33
18218 
-1
18219 
3
18220 
q_b32
18221 
-1
18222 
3
18223 
q_b31
18224 
-1
18225 
3
18226 
q_b30
18227 
-1
18228 
3
18229 
q_b3
18230 
-1
18231 
3
18232 
q_b29
18233 
-1
18234 
3
18235 
q_b28
18236 
-1
18237 
3
18238 
q_b27
18239 
-1
18240 
3
18241 
q_b26
18242 
-1
18243 
3
18244 
q_b25
18245 
-1
18246 
3
18247 
q_b24
18248 
-1
18249 
3
18250 
q_b23
18251 
-1
18252 
3
18253 
q_b22
18254 
-1
18255 
3
18256 
q_b21
18257 
-1
18258 
3
18259 
q_b20
18260 
-1
18261 
3
18262 
q_b2
18263 
-1
18264 
3
18265 
q_b19
18266 
-1
18267 
3
18268 
q_b18
18269 
-1
18270 
3
18271 
q_b17
18272 
-1
18273 
3
18274 
q_b16
18275 
-1
18276 
3
18277 
q_b15
18278 
-1
18279 
3
18280 
q_b14
18281 
-1
18282 
3
18283 
q_b13
18284 
-1
18285 
3
18286 
q_b12
18287 
-1
18288 
3
18289 
q_b11
18290 
-1
18291 
3
18292 
q_b10
18293 
-1
18294 
3
18295 
q_b1
18296 
-1
18297 
3
18298 
q_b0
18299 
-1
18300 
3
18301 
data_a9
18302 
-1
18303 
3
18304 
data_a8
18305 
-1
18306 
3
18307 
data_a71
18308 
-1
18309 
3
18310 
data_a70
18311 
-1
18312 
3
18313 
data_a7
18314 
-1
18315 
3
18316 
data_a69
18317 
-1
18318 
3
18319 
data_a68
18320 
-1
18321 
3
18322 
data_a67
18323 
-1
18324 
3
18325 
data_a66
18326 
-1
18327 
3
18328 
data_a65
18329 
-1
18330 
3
18331 
data_a64
18332 
-1
18333 
3
18334 
data_a63
18335 
-1
18336 
3
18337 
data_a62
18338 
-1
18339 
3
18340 
data_a61
18341 
-1
18342 
3
18343 
data_a60
18344 
-1
18345 
3
18346 
data_a6
18347 
-1
18348 
3
18349 
data_a59
18350 
-1
18351 
3
18352 
data_a58
18353 
-1
18354 
3
18355 
data_a57
18356 
-1
18357 
3
18358 
data_a56
18359 
-1
18360 
3
18361 
data_a55
18362 
-1
18363 
3
18364 
data_a54
18365 
-1
18366 
3
18367 
data_a53
18368 
-1
18369 
3
18370 
data_a52
18371 
-1
18372 
3
18373 
data_a51
18374 
-1
18375 
3
18376 
data_a50
18377 
-1
18378 
3
18379 
data_a5
18380 
-1
18381 
3
18382 
data_a49
18383 
-1
18384 
3
18385 
data_a48
18386 
-1
18387 
3
18388 
data_a47
18389 
-1
18390 
3
18391 
data_a46
18392 
-1
18393 
3
18394 
data_a45
18395 
-1
18396 
3
18397 
data_a44
18398 
-1
18399 
3
18400 
data_a43
18401 
-1
18402 
3
18403 
data_a42
18404 
-1
18405 
3
18406 
data_a41
18407 
-1
18408 
3
18409 
data_a40
18410 
-1
18411 
3
18412 
data_a4
18413 
-1
18414 
3
18415 
data_a39
18416 
-1
18417 
3
18418 
data_a38
18419 
-1
18420 
3
18421 
data_a37
18422 
-1
18423 
3
18424 
data_a36
18425 
-1
18426 
3
18427 
data_a35
18428 
-1
18429 
3
18430 
data_a34
18431 
-1
18432 
3
18433 
data_a33
18434 
-1
18435 
3
18436 
data_a32
18437 
-1
18438 
3
18439 
data_a31
18440 
-1
18441 
3
18442 
data_a30
18443 
-1
18444 
3
18445 
data_a3
18446 
-1
18447 
3
18448 
data_a29
18449 
-1
18450 
3
18451 
data_a28
18452 
-1
18453 
3
18454 
data_a27
18455 
-1
18456 
3
18457 
data_a26
18458 
-1
18459 
3
18460 
data_a25
18461 
-1
18462 
3
18463 
data_a24
18464 
-1
18465 
3
18466 
data_a23
18467 
-1
18468 
3
18469 
data_a22
18470 
-1
18471 
3
18472 
data_a21
18473 
-1
18474 
3
18475 
data_a20
18476 
-1
18477 
3
18478 
data_a2
18479 
-1
18480 
3
18481 
data_a19
18482 
-1
18483 
3
18484 
data_a18
18485 
-1
18486 
3
18487 
data_a17
18488 
-1
18489 
3
18490 
data_a16
18491 
-1
18492 
3
18493 
data_a15
18494 
-1
18495 
3
18496 
data_a14
18497 
-1
18498 
3
18499 
data_a13
18500 
-1
18501 
3
18502 
data_a12
18503 
-1
18504 
3
18505 
data_a11
18506 
-1
18507 
3
18508 
data_a10
18509 
-1
18510 
3
18511 
data_a1
18512 
-1
18513 
3
18514 
data_a0
18515 
-1
18516 
3
18517 
clock0
18518 
-1
18519 
3
18520 
address_b1
18521 
-1
18522 
3
18523 
address_b0
18524 
-1
18525 
3
18526 
address_a1
18527 
-1
18528 
3
18529 
address_a0
18530 
-1
18531 
3
18532 
}
18533 
# include_file {
18534 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
18535 
c22bfd353214c01495b560fc34e47d79
18536 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
18537 
2263a3bdfffeb150af977ee13902f70
18538 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
18539 
bd0e2f5e01c1bd360461dceb53d48
18540 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
18541 
f39123b8592ab2dac019716e56b3ec18
18542 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
18543 
60d229340bc3c24acb0a137b4849830
18544 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
18545 
d4e3a69a331d3a99d3281790d99a1ebd
18546 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
18547 
e66a83eccf6717bed97c99d891ad085
18548 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
18549 
99d442b5b66c88db4daf94d99c6e4e77
18550 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
18551 
74e08939f96a7ea8e7a4d59a5b01fe7
18552 
}
18553 
# lmf
18554 
d:|altera|72|quartus|lmf|
18555 
d41d8cd98f0b24e980998ecf8427e
18556 
# macro_sequence
18557 
 
18558 
# end
18559 
# entity
18560 
altsyncram_4ni1
18561 
# storage
18562 
db|LB.(87).cnf
18563 
db|LB.(87).cnf
18564 
# case_insensitive
18565 
# source_file
18566 
db|altsyncram_4ni1.tdf
18567 
13b9a2ce53d565ed1c2a868678281c3
18568 
6
18569 
# used_port {
18570 
wren_a
18571 
-1
18572 
3
18573 
q_b9
18574 
-1
18575 
3
18576 
q_b8
18577 
-1
18578 
3
18579 
q_b71
18580 
-1
18581 
3
18582 
q_b70
18583 
-1
18584 
3
18585 
q_b7
18586 
-1
18587 
3
18588 
q_b69
18589 
-1
18590 
3
18591 
q_b68
18592 
-1
18593 
3
18594 
q_b67
18595 
-1
18596 
3
18597 
q_b66
18598 
-1
18599 
3
18600 
q_b65
18601 
-1
18602 
3
18603 
q_b64
18604 
-1
18605 
3
18606 
q_b63
18607 
-1
18608 
3
18609 
q_b62
18610 
-1
18611 
3
18612 
q_b61
18613 
-1
18614 
3
18615 
q_b60
18616 
-1
18617 
3
18618 
q_b6
18619 
-1
18620 
3
18621 
q_b59
18622 
-1
18623 
3
18624 
q_b58
18625 
-1
18626 
3
18627 
q_b57
18628 
-1
18629 
3
18630 
q_b56
18631 
-1
18632 
3
18633 
q_b55
18634 
-1
18635 
3
18636 
q_b54
18637 
-1
18638 
3
18639 
q_b53
18640 
-1
18641 
3
18642 
q_b52
18643 
-1
18644 
3
18645 
q_b51
18646 
-1
18647 
3
18648 
q_b50
18649 
-1
18650 
3
18651 
q_b5
18652 
-1
18653 
3
18654 
q_b49
18655 
-1
18656 
3
18657 
q_b48
18658 
-1
18659 
3
18660 
q_b47
18661 
-1
18662 
3
18663 
q_b46
18664 
-1
18665 
3
18666 
q_b45
18667 
-1
18668 
3
18669 
q_b44
18670 
-1
18671 
3
18672 
q_b43
18673 
-1
18674 
3
18675 
q_b42
18676 
-1
18677 
3
18678 
q_b41
18679 
-1
18680 
3
18681 
q_b40
18682 
-1
18683 
3
18684 
q_b4
18685 
-1
18686 
3
18687 
q_b39
18688 
-1
18689 
3
18690 
q_b38
18691 
-1
18692 
3
18693 
q_b37
18694 
-1
18695 
3
18696 
q_b36
18697 
-1
18698 
3
18699 
q_b35
18700 
-1
18701 
3
18702 
q_b34
18703 
-1
18704 
3
18705 
q_b33
18706 
-1
18707 
3
18708 
q_b32
18709 
-1
18710 
3
18711 
q_b31
18712 
-1
18713 
3
18714 
q_b30
18715 
-1
18716 
3
18717 
q_b3
18718 
-1
18719 
3
18720 
q_b29
18721 
-1
18722 
3
18723 
q_b28
18724 
-1
18725 
3
18726 
q_b27
18727 
-1
18728 
3
18729 
q_b26
18730 
-1
18731 
3
18732 
q_b25
18733 
-1
18734 
3
18735 
q_b24
18736 
-1
18737 
3
18738 
q_b23
18739 
-1
18740 
3
18741 
q_b22
18742 
-1
18743 
3
18744 
q_b21
18745 
-1
18746 
3
18747 
q_b20
18748 
-1
18749 
3
18750 
q_b2
18751 
-1
18752 
3
18753 
q_b19
18754 
-1
18755 
3
18756 
q_b18
18757 
-1
18758 
3
18759 
q_b17
18760 
-1
18761 
3
18762 
q_b16
18763 
-1
18764 
3
18765 
q_b15
18766 
-1
18767 
3
18768 
q_b14
18769 
-1
18770 
3
18771 
q_b13
18772 
-1
18773 
3
18774 
q_b12
18775 
-1
18776 
3
18777 
q_b11
18778 
-1
18779 
3
18780 
q_b10
18781 
-1
18782 
3
18783 
q_b1
18784 
-1
18785 
3
18786 
q_b0
18787 
-1
18788 
3
18789 
data_a9
18790 
-1
18791 
3
18792 
data_a8
18793 
-1
18794 
3
18795 
data_a71
18796 
-1
18797 
3
18798 
data_a70
18799 
-1
18800 
3
18801 
data_a7
18802 
-1
18803 
3
18804 
data_a69
18805 
-1
18806 
3
18807 
data_a68
18808 
-1
18809 
3
18810 
data_a67
18811 
-1
18812 
3
18813 
data_a66
18814 
-1
18815 
3
18816 
data_a65
18817 
-1
18818 
3
18819 
data_a64
18820 
-1
18821 
3
18822 
data_a63
18823 
-1
18824 
3
18825 
data_a62
18826 
-1
18827 
3
18828 
data_a61
18829 
-1
18830 
3
18831 
data_a60
18832 
-1
18833 
3
18834 
data_a6
18835 
-1
18836 
3
18837 
data_a59
18838 
-1
18839 
3
18840 
data_a58
18841 
-1
18842 
3
18843 
data_a57
18844 
-1
18845 
3
18846 
data_a56
18847 
-1
18848 
3
18849 
data_a55
18850 
-1
18851 
3
18852 
data_a54
18853 
-1
18854 
3
18855 
data_a53
18856 
-1
18857 
3
18858 
data_a52
18859 
-1
18860 
3
18861 
data_a51
18862 
-1
18863 
3
18864 
data_a50
18865 
-1
18866 
3
18867 
data_a5
18868 
-1
18869 
3
18870 
data_a49
18871 
-1
18872 
3
18873 
data_a48
18874 
-1
18875 
3
18876 
data_a47
18877 
-1
18878 
3
18879 
data_a46
18880 
-1
18881 
3
18882 
data_a45
18883 
-1
18884 
3
18885 
data_a44
18886 
-1
18887 
3
18888 
data_a43
18889 
-1
18890 
3
18891 
data_a42
18892 
-1
18893 
3
18894 
data_a41
18895 
-1
18896 
3
18897 
data_a40
18898 
-1
18899 
3
18900 
data_a4
18901 
-1
18902 
3
18903 
data_a39
18904 
-1
18905 
3
18906 
data_a38
18907 
-1
18908 
3
18909 
data_a37
18910 
-1
18911 
3
18912 
data_a36
18913 
-1
18914 
3
18915 
data_a35
18916 
-1
18917 
3
18918 
data_a34
18919 
-1
18920 
3
18921 
data_a33
18922 
-1
18923 
3
18924 
data_a32
18925 
-1
18926 
3
18927 
data_a31
18928 
-1
18929 
3
18930 
data_a30
18931 
-1
18932 
3
18933 
data_a3
18934 
-1
18935 
3
18936 
data_a29
18937 
-1
18938 
3
18939 
data_a28
18940 
-1
18941 
3
18942 
data_a27
18943 
-1
18944 
3
18945 
data_a26
18946 
-1
18947 
3
18948 
data_a25
18949 
-1
18950 
3
18951 
data_a24
18952 
-1
18953 
3
18954 
data_a23
18955 
-1
18956 
3
18957 
data_a22
18958 
-1
18959 
3
18960 
data_a21
18961 
-1
18962 
3
18963 
data_a20
18964 
-1
18965 
3
18966 
data_a2
18967 
-1
18968 
3
18969 
data_a19
18970 
-1
18971 
3
18972 
data_a18
18973 
-1
18974 
3
18975 
data_a17
18976 
-1
18977 
3
18978 
data_a16
18979 
-1
18980 
3
18981 
data_a15
18982 
-1
18983 
3
18984 
data_a14
18985 
-1
18986 
3
18987 
data_a13
18988 
-1
18989 
3
18990 
data_a12
18991 
-1
18992 
3
18993 
data_a11
18994 
-1
18995 
3
18996 
data_a10
18997 
-1
18998 
3
18999 
data_a1
19000 
-1
19001 
3
19002 
data_a0
19003 
-1
19004 
3
19005 
clock0
19006 
-1
19007 
3
19008 
address_b1
19009 
-1
19010 
3
19011 
address_b0
19012 
-1
19013 
3
19014 
address_a1
19015 
-1
19016 
3
19017 
address_a0
19018 
-1
19019 
3
19020 
}
19021 
# lmf
19022 
d:|altera|72|quartus|lmf|
19023 
d41d8cd98f0b24e980998ecf8427e
19024 
# macro_sequence
19025 
 
19026 
# end
19027 
# entity
19028 
pass
19029 
# storage
19030 
db|LB.(16).cnf
19031 
db|LB.(16).cnf
19032 
# logic_option {
19033 
AUTO_RAM_RECOGNITION
19034 
ON
19035 
}
19036 
# case_insensitive
19037 
# source_file
19038 
PASS|pass.vhd
19039 
5d3bf8b3bd10bc617c86223ef474edc
19040 
4
19041 
# internal_option {
19042 
HDL_INITIAL_FANOUT_LIMIT
19043 
OFF
19044 
AUTO_RESOURCE_SHARING
19045 
OFF
19046 
AUTO_RAM_RECOGNITION
19047 
ON
19048 
AUTO_ROM_RECOGNITION
19049 
ON
19050 
}
19051 
# user_parameter {
19052 
data_width
19053 
64
19054 
PARAMETER_UNKNOWN
19055 
USR
19056 
ctrl_width
19057 
8
19058 
PARAMETER_UNKNOWN
19059 
USR
19060 
}
19061 
# lmf
19062 
d:|altera|72|quartus|lmf|maxplus2.lmf
19063 
9a59d39b0706640b4b2718e8a1ff1f
19064 
# macro_sequence
19065 
 
19066 
# end
19067 
# entity
19068 
small_fifo
19069 
# storage
19070 
db|LB.(90).cnf
19071 
db|LB.(90).cnf
19072 
# logic_option {
19073 
AUTO_RAM_RECOGNITION
19074 
ON
19075 
}
19076 
# case_sensitive
19077 
# source_file
19078 
small_fifo.v
19079 
1177d4c5f95945d866fbc28febfb18a6
19080 
7
19081 
# internal_option {
19082 
HDL_INITIAL_FANOUT_LIMIT
19083 
OFF
19084 
AUTO_RESOURCE_SHARING
19085 
OFF
19086 
AUTO_RAM_RECOGNITION
19087 
ON
19088 
AUTO_ROM_RECOGNITION
19089 
ON
19090 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
19091 
OFF
19092 
}
19093 
# user_parameter {
19094 
WIDTH
19095 
72
19096 
PARAMETER_SIGNED_DEC
19097 
USR
19098 
MAX_DEPTH_BITS
19099 
4
19100 
PARAMETER_SIGNED_DEC
19101 
USR
19102 
NEARLY_FULL
19103 
15
19104 
PARAMETER_SIGNED_DEC
19105 
USR
19106 
}
19107 
# lmf
19108 
d:|altera|72|quartus|lmf|
19109 
d41d8cd98f0b24e980998ecf8427e
19110 
# macro_sequence
19111 
 
19112 
# end
19113 
# entity
19114 
small_fifo
19115 
# storage
19116 
db|LB.(91).cnf
19117 
db|LB.(91).cnf
19118 
# logic_option {
19119 
AUTO_RAM_RECOGNITION
19120 
ON
19121 
}
19122 
# case_sensitive
19123 
# source_file
19124 
small_fifo.v
19125 
1177d4c5f95945d866fbc28febfb18a6
19126 
7
19127 
# internal_option {
19128 
HDL_INITIAL_FANOUT_LIMIT
19129 
OFF
19130 
AUTO_RESOURCE_SHARING
19131 
OFF
19132 
AUTO_RAM_RECOGNITION
19133 
ON
19134 
AUTO_ROM_RECOGNITION
19135 
ON
19136 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
19137 
OFF
19138 
}
19139 
# user_parameter {
19140 
WIDTH
19141 
8
19142 
PARAMETER_SIGNED_DEC
19143 
USR
19144 
MAX_DEPTH_BITS
19145 
2
19146 
PARAMETER_SIGNED_DEC
19147 
USR
19148 
NEARLY_FULL
19149 
3
19150 
PARAMETER_SIGNED_DEC
19151 
USR
19152 
}
19153 
# lmf
19154 
d:|altera|72|quartus|lmf|
19155 
d41d8cd98f0b24e980998ecf8427e
19156 
# macro_sequence
19157 
 
19158 
# end
19159 
# entity
19160 
altsyncram
19161 
# storage
19162 
db|LB.(92).cnf
19163 
db|LB.(92).cnf
19164 
# case_insensitive
19165 
# source_file
19166 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
19167 
1a8e44bce3df5c9cae2128978e887541
19168 
6
19169 
# user_parameter {
19170 
BYTE_SIZE_BLOCK
19171 
8
19172 
PARAMETER_UNKNOWN
19173 
DEF
19174 
AUTO_CARRY_CHAINS
19175 
ON
19176 
AUTO_CARRY
19177 
USR
19178 
IGNORE_CARRY_BUFFERS
19179 
OFF
19180 
IGNORE_CARRY
19181 
USR
19182 
AUTO_CASCADE_CHAINS
19183 
ON
19184 
AUTO_CASCADE
19185 
USR
19186 
IGNORE_CASCADE_BUFFERS
19187 
OFF
19188 
IGNORE_CASCADE
19189 
USR
19190 
WIDTH_BYTEENA
19191 
1
19192 
PARAMETER_UNKNOWN
19193 
DEF
19194 
OPERATION_MODE
19195 
DUAL_PORT
19196 
PARAMETER_UNKNOWN
19197 
USR
19198 
WIDTH_A
19199 
72
19200 
PARAMETER_UNKNOWN
19201 
USR
19202 
WIDTHAD_A
19203 
4
19204 
PARAMETER_UNKNOWN
19205 
USR
19206 
NUMWORDS_A
19207 
16
19208 
PARAMETER_UNKNOWN
19209 
USR
19210 
OUTDATA_REG_A
19211 
UNREGISTERED
19212 
PARAMETER_UNKNOWN
19213 
DEF
19214 
ADDRESS_ACLR_A
19215 
NONE
19216 
PARAMETER_UNKNOWN
19217 
USR
19218 
OUTDATA_ACLR_A
19219 
NONE
19220 
PARAMETER_UNKNOWN
19221 
DEF
19222 
WRCONTROL_ACLR_A
19223 
NONE
19224 
PARAMETER_UNKNOWN
19225 
USR
19226 
INDATA_ACLR_A
19227 
NONE
19228 
PARAMETER_UNKNOWN
19229 
USR
19230 
BYTEENA_ACLR_A
19231 
NONE
19232 
PARAMETER_UNKNOWN
19233 
DEF
19234 
WIDTH_B
19235 
72
19236 
PARAMETER_UNKNOWN
19237 
USR
19238 
WIDTHAD_B
19239 
4
19240 
PARAMETER_UNKNOWN
19241 
USR
19242 
NUMWORDS_B
19243 
16
19244 
PARAMETER_UNKNOWN
19245 
USR
19246 
INDATA_REG_B
19247 
CLOCK1
19248 
PARAMETER_UNKNOWN
19249 
DEF
19250 
WRCONTROL_WRADDRESS_REG_B
19251 
CLOCK1
19252 
PARAMETER_UNKNOWN
19253 
DEF
19254 
RDCONTROL_REG_B
19255 
CLOCK1
19256 
PARAMETER_UNKNOWN
19257 
DEF
19258 
ADDRESS_REG_B
19259 
CLOCK0
19260 
PARAMETER_UNKNOWN
19261 
USR
19262 
OUTDATA_REG_B
19263 
UNREGISTERED
19264 
PARAMETER_UNKNOWN
19265 
USR
19266 
BYTEENA_REG_B
19267 
CLOCK1
19268 
PARAMETER_UNKNOWN
19269 
DEF
19270 
INDATA_ACLR_B
19271 
NONE
19272 
PARAMETER_UNKNOWN
19273 
DEF
19274 
WRCONTROL_ACLR_B
19275 
NONE
19276 
PARAMETER_UNKNOWN
19277 
DEF
19278 
ADDRESS_ACLR_B
19279 
NONE
19280 
PARAMETER_UNKNOWN
19281 
USR
19282 
OUTDATA_ACLR_B
19283 
NONE
19284 
PARAMETER_UNKNOWN
19285 
USR
19286 
RDCONTROL_ACLR_B
19287 
NONE
19288 
PARAMETER_UNKNOWN
19289 
DEF
19290 
BYTEENA_ACLR_B
19291 
NONE
19292 
PARAMETER_UNKNOWN
19293 
DEF
19294 
WIDTH_BYTEENA_A
19295 
1
19296 
PARAMETER_UNKNOWN
19297 
DEF
19298 
WIDTH_BYTEENA_B
19299 
1
19300 
PARAMETER_UNKNOWN
19301 
DEF
19302 
RAM_BLOCK_TYPE
19303 
AUTO
19304 
PARAMETER_UNKNOWN
19305 
USR
19306 
BYTE_SIZE
19307 
8
19308 
PARAMETER_UNKNOWN
19309 
DEF
19310 
READ_DURING_WRITE_MODE_MIXED_PORTS
19311 
OLD_DATA
19312 
PARAMETER_UNKNOWN
19313 
USR
19314 
READ_DURING_WRITE_MODE_PORT_A
19315 
NEW_DATA_NO_NBE_READ
19316 
PARAMETER_UNKNOWN
19317 
DEF
19318 
READ_DURING_WRITE_MODE_PORT_B
19319 
NEW_DATA_NO_NBE_READ
19320 
PARAMETER_UNKNOWN
19321 
DEF
19322 
INIT_FILE
19323 
UNUSED
19324 
PARAMETER_UNKNOWN
19325 
DEF
19326 
INIT_FILE_LAYOUT
19327 
PORT_A
19328 
PARAMETER_UNKNOWN
19329 
DEF
19330 
MAXIMUM_DEPTH
19331 
 
19332 
PARAMETER_UNKNOWN
19333 
DEF
19334 
CLOCK_ENABLE_INPUT_A
19335 
NORMAL
19336 
PARAMETER_UNKNOWN
19337 
DEF
19338 
CLOCK_ENABLE_INPUT_B
19339 
NORMAL
19340 
PARAMETER_UNKNOWN
19341 
DEF
19342 
CLOCK_ENABLE_OUTPUT_A
19343 
NORMAL
19344 
PARAMETER_UNKNOWN
19345 
DEF
19346 
CLOCK_ENABLE_OUTPUT_B
19347 
NORMAL
19348 
PARAMETER_UNKNOWN
19349 
DEF
19350 
CLOCK_ENABLE_CORE_A
19351 
USE_INPUT_CLKEN
19352 
PARAMETER_UNKNOWN
19353 
DEF
19354 
CLOCK_ENABLE_CORE_B
19355 
USE_INPUT_CLKEN
19356 
PARAMETER_UNKNOWN
19357 
DEF
19358 
ENABLE_ECC
19359 
FALSE
19360 
PARAMETER_UNKNOWN
19361 
DEF
19362 
DEVICE_FAMILY
19363 
Stratix II
19364 
PARAMETER_UNKNOWN
19365 
USR
19366 
CBXI_PARAMETER
19367 
altsyncram_dqi1
19368 
PARAMETER_UNKNOWN
19369 
USR
19370 
}
19371 
# used_port {
19372 
wren_a
19373 
-1
19374 
3
19375 
q_b9
19376 
-1
19377 
3
19378 
q_b8
19379 
-1
19380 
3
19381 
q_b71
19382 
-1
19383 
3
19384 
q_b70
19385 
-1
19386 
3
19387 
q_b7
19388 
-1
19389 
3
19390 
q_b69
19391 
-1
19392 
3
19393 
q_b68
19394 
-1
19395 
3
19396 
q_b67
19397 
-1
19398 
3
19399 
q_b66
19400 
-1
19401 
3
19402 
q_b65
19403 
-1
19404 
3
19405 
q_b64
19406 
-1
19407 
3
19408 
q_b63
19409 
-1
19410 
3
19411 
q_b62
19412 
-1
19413 
3
19414 
q_b61
19415 
-1
19416 
3
19417 
q_b60
19418 
-1
19419 
3
19420 
q_b6
19421 
-1
19422 
3
19423 
q_b59
19424 
-1
19425 
3
19426 
q_b58
19427 
-1
19428 
3
19429 
q_b57
19430 
-1
19431 
3
19432 
q_b56
19433 
-1
19434 
3
19435 
q_b55
19436 
-1
19437 
3
19438 
q_b54
19439 
-1
19440 
3
19441 
q_b53
19442 
-1
19443 
3
19444 
q_b52
19445 
-1
19446 
3
19447 
q_b51
19448 
-1
19449 
3
19450 
q_b50
19451 
-1
19452 
3
19453 
q_b5
19454 
-1
19455 
3
19456 
q_b49
19457 
-1
19458 
3
19459 
q_b48
19460 
-1
19461 
3
19462 
q_b47
19463 
-1
19464 
3
19465 
q_b46
19466 
-1
19467 
3
19468 
q_b45
19469 
-1
19470 
3
19471 
q_b44
19472 
-1
19473 
3
19474 
q_b43
19475 
-1
19476 
3
19477 
q_b42
19478 
-1
19479 
3
19480 
q_b41
19481 
-1
19482 
3
19483 
q_b40
19484 
-1
19485 
3
19486 
q_b4
19487 
-1
19488 
3
19489 
q_b39
19490 
-1
19491 
3
19492 
q_b38
19493 
-1
19494 
3
19495 
q_b37
19496 
-1
19497 
3
19498 
q_b36
19499 
-1
19500 
3
19501 
q_b35
19502 
-1
19503 
3
19504 
q_b34
19505 
-1
19506 
3
19507 
q_b33
19508 
-1
19509 
3
19510 
q_b32
19511 
-1
19512 
3
19513 
q_b31
19514 
-1
19515 
3
19516 
q_b30
19517 
-1
19518 
3
19519 
q_b3
19520 
-1
19521 
3
19522 
q_b29
19523 
-1
19524 
3
19525 
q_b28
19526 
-1
19527 
3
19528 
q_b27
19529 
-1
19530 
3
19531 
q_b26
19532 
-1
19533 
3
19534 
q_b25
19535 
-1
19536 
3
19537 
q_b24
19538 
-1
19539 
3
19540 
q_b23
19541 
-1
19542 
3
19543 
q_b22
19544 
-1
19545 
3
19546 
q_b21
19547 
-1
19548 
3
19549 
q_b20
19550 
-1
19551 
3
19552 
q_b2
19553 
-1
19554 
3
19555 
q_b19
19556 
-1
19557 
3
19558 
q_b18
19559 
-1
19560 
3
19561 
q_b17
19562 
-1
19563 
3
19564 
q_b16
19565 
-1
19566 
3
19567 
q_b15
19568 
-1
19569 
3
19570 
q_b14
19571 
-1
19572 
3
19573 
q_b13
19574 
-1
19575 
3
19576 
q_b12
19577 
-1
19578 
3
19579 
q_b11
19580 
-1
19581 
3
19582 
q_b10
19583 
-1
19584 
3
19585 
q_b1
19586 
-1
19587 
3
19588 
q_b0
19589 
-1
19590 
3
19591 
data_a9
19592 
-1
19593 
3
19594 
data_a8
19595 
-1
19596 
3
19597 
data_a71
19598 
-1
19599 
3
19600 
data_a70
19601 
-1
19602 
3
19603 
data_a7
19604 
-1
19605 
3
19606 
data_a69
19607 
-1
19608 
3
19609 
data_a68
19610 
-1
19611 
3
19612 
data_a67
19613 
-1
19614 
3
19615 
data_a66
19616 
-1
19617 
3
19618 
data_a65
19619 
-1
19620 
3
19621 
data_a64
19622 
-1
19623 
3
19624 
data_a63
19625 
-1
19626 
3
19627 
data_a62
19628 
-1
19629 
3
19630 
data_a61
19631 
-1
19632 
3
19633 
data_a60
19634 
-1
19635 
3
19636 
data_a6
19637 
-1
19638 
3
19639 
data_a59
19640 
-1
19641 
3
19642 
data_a58
19643 
-1
19644 
3
19645 
data_a57
19646 
-1
19647 
3
19648 
data_a56
19649 
-1
19650 
3
19651 
data_a55
19652 
-1
19653 
3
19654 
data_a54
19655 
-1
19656 
3
19657 
data_a53
19658 
-1
19659 
3
19660 
data_a52
19661 
-1
19662 
3
19663 
data_a51
19664 
-1
19665 
3
19666 
data_a50
19667 
-1
19668 
3
19669 
data_a5
19670 
-1
19671 
3
19672 
data_a49
19673 
-1
19674 
3
19675 
data_a48
19676 
-1
19677 
3
19678 
data_a47
19679 
-1
19680 
3
19681 
data_a46
19682 
-1
19683 
3
19684 
data_a45
19685 
-1
19686 
3
19687 
data_a44
19688 
-1
19689 
3
19690 
data_a43
19691 
-1
19692 
3
19693 
data_a42
19694 
-1
19695 
3
19696 
data_a41
19697 
-1
19698 
3
19699 
data_a40
19700 
-1
19701 
3
19702 
data_a4
19703 
-1
19704 
3
19705 
data_a39
19706 
-1
19707 
3
19708 
data_a38
19709 
-1
19710 
3
19711 
data_a37
19712 
-1
19713 
3
19714 
data_a36
19715 
-1
19716 
3
19717 
data_a35
19718 
-1
19719 
3
19720 
data_a34
19721 
-1
19722 
3
19723 
data_a33
19724 
-1
19725 
3
19726 
data_a32
19727 
-1
19728 
3
19729 
data_a31
19730 
-1
19731 
3
19732 
data_a30
19733 
-1
19734 
3
19735 
data_a3
19736 
-1
19737 
3
19738 
data_a29
19739 
-1
19740 
3
19741 
data_a28
19742 
-1
19743 
3
19744 
data_a27
19745 
-1
19746 
3
19747 
data_a26
19748 
-1
19749 
3
19750 
data_a25
19751 
-1
19752 
3
19753 
data_a24
19754 
-1
19755 
3
19756 
data_a23
19757 
-1
19758 
3
19759 
data_a22
19760 
-1
19761 
3
19762 
data_a21
19763 
-1
19764 
3
19765 
data_a20
19766 
-1
19767 
3
19768 
data_a2
19769 
-1
19770 
3
19771 
data_a19
19772 
-1
19773 
3
19774 
data_a18
19775 
-1
19776 
3
19777 
data_a17
19778 
-1
19779 
3
19780 
data_a16
19781 
-1
19782 
3
19783 
data_a15
19784 
-1
19785 
3
19786 
data_a14
19787 
-1
19788 
3
19789 
data_a13
19790 
-1
19791 
3
19792 
data_a12
19793 
-1
19794 
3
19795 
data_a11
19796 
-1
19797 
3
19798 
data_a10
19799 
-1
19800 
3
19801 
data_a1
19802 
-1
19803 
3
19804 
data_a0
19805 
-1
19806 
3
19807 
clock0
19808 
-1
19809 
3
19810 
address_b3
19811 
-1
19812 
3
19813 
address_b2
19814 
-1
19815 
3
19816 
address_b1
19817 
-1
19818 
3
19819 
address_b0
19820 
-1
19821 
3
19822 
address_a3
19823 
-1
19824 
3
19825 
address_a2
19826 
-1
19827 
3
19828 
address_a1
19829 
-1
19830 
3
19831 
address_a0
19832 
-1
19833 
3
19834 
}
19835 
# include_file {
19836 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
19837 
c22bfd353214c01495b560fc34e47d79
19838 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
19839 
2263a3bdfffeb150af977ee13902f70
19840 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
19841 
bd0e2f5e01c1bd360461dceb53d48
19842 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
19843 
f39123b8592ab2dac019716e56b3ec18
19844 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
19845 
60d229340bc3c24acb0a137b4849830
19846 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
19847 
d4e3a69a331d3a99d3281790d99a1ebd
19848 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
19849 
e66a83eccf6717bed97c99d891ad085
19850 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
19851 
99d442b5b66c88db4daf94d99c6e4e77
19852 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
19853 
74e08939f96a7ea8e7a4d59a5b01fe7
19854 
}
19855 
# lmf
19856 
d:|altera|72|quartus|lmf|
19857 
d41d8cd98f0b24e980998ecf8427e
19858 
# macro_sequence
19859 
 
19860 
# end
19861 
# entity
19862 
altsyncram_dqi1
19863 
# storage
19864 
db|LB.(93).cnf
19865 
db|LB.(93).cnf
19866 
# case_insensitive
19867 
# source_file
19868 
db|altsyncram_dqi1.tdf
19869 
14a28c5b8a34b08c38a86fad52a40a0
19870 
6
19871 
# used_port {
19872 
wren_a
19873 
-1
19874 
3
19875 
q_b9
19876 
-1
19877 
3
19878 
q_b8
19879 
-1
19880 
3
19881 
q_b71
19882 
-1
19883 
3
19884 
q_b70
19885 
-1
19886 
3
19887 
q_b7
19888 
-1
19889 
3
19890 
q_b69
19891 
-1
19892 
3
19893 
q_b68
19894 
-1
19895 
3
19896 
q_b67
19897 
-1
19898 
3
19899 
q_b66
19900 
-1
19901 
3
19902 
q_b65
19903 
-1
19904 
3
19905 
q_b64
19906 
-1
19907 
3
19908 
q_b63
19909 
-1
19910 
3
19911 
q_b62
19912 
-1
19913 
3
19914 
q_b61
19915 
-1
19916 
3
19917 
q_b60
19918 
-1
19919 
3
19920 
q_b6
19921 
-1
19922 
3
19923 
q_b59
19924 
-1
19925 
3
19926 
q_b58
19927 
-1
19928 
3
19929 
q_b57
19930 
-1
19931 
3
19932 
q_b56
19933 
-1
19934 
3
19935 
q_b55
19936 
-1
19937 
3
19938 
q_b54
19939 
-1
19940 
3
19941 
q_b53
19942 
-1
19943 
3
19944 
q_b52
19945 
-1
19946 
3
19947 
q_b51
19948 
-1
19949 
3
19950 
q_b50
19951 
-1
19952 
3
19953 
q_b5
19954 
-1
19955 
3
19956 
q_b49
19957 
-1
19958 
3
19959 
q_b48
19960 
-1
19961 
3
19962 
q_b47
19963 
-1
19964 
3
19965 
q_b46
19966 
-1
19967 
3
19968 
q_b45
19969 
-1
19970 
3
19971 
q_b44
19972 
-1
19973 
3
19974 
q_b43
19975 
-1
19976 
3
19977 
q_b42
19978 
-1
19979 
3
19980 
q_b41
19981 
-1
19982 
3
19983 
q_b40
19984 
-1
19985 
3
19986 
q_b4
19987 
-1
19988 
3
19989 
q_b39
19990 
-1
19991 
3
19992 
q_b38
19993 
-1
19994 
3
19995 
q_b37
19996 
-1
19997 
3
19998 
q_b36
19999 
-1
20000 
3
20001 
q_b35
20002 
-1
20003 
3
20004 
q_b34
20005 
-1
20006 
3
20007 
q_b33
20008 
-1
20009 
3
20010 
q_b32
20011 
-1
20012 
3
20013 
q_b31
20014 
-1
20015 
3
20016 
q_b30
20017 
-1
20018 
3
20019 
q_b3
20020 
-1
20021 
3
20022 
q_b29
20023 
-1
20024 
3
20025 
q_b28
20026 
-1
20027 
3
20028 
q_b27
20029 
-1
20030 
3
20031 
q_b26
20032 
-1
20033 
3
20034 
q_b25
20035 
-1
20036 
3
20037 
q_b24
20038 
-1
20039 
3
20040 
q_b23
20041 
-1
20042 
3
20043 
q_b22
20044 
-1
20045 
3
20046 
q_b21
20047 
-1
20048 
3
20049 
q_b20
20050 
-1
20051 
3
20052 
q_b2
20053 
-1
20054 
3
20055 
q_b19
20056 
-1
20057 
3
20058 
q_b18
20059 
-1
20060 
3
20061 
q_b17
20062 
-1
20063 
3
20064 
q_b16
20065 
-1
20066 
3
20067 
q_b15
20068 
-1
20069 
3
20070 
q_b14
20071 
-1
20072 
3
20073 
q_b13
20074 
-1
20075 
3
20076 
q_b12
20077 
-1
20078 
3
20079 
q_b11
20080 
-1
20081 
3
20082 
q_b10
20083 
-1
20084 
3
20085 
q_b1
20086 
-1
20087 
3
20088 
q_b0
20089 
-1
20090 
3
20091 
data_a9
20092 
-1
20093 
3
20094 
data_a8
20095 
-1
20096 
3
20097 
data_a71
20098 
-1
20099 
3
20100 
data_a70
20101 
-1
20102 
3
20103 
data_a7
20104 
-1
20105 
3
20106 
data_a69
20107 
-1
20108 
3
20109 
data_a68
20110 
-1
20111 
3
20112 
data_a67
20113 
-1
20114 
3
20115 
data_a66
20116 
-1
20117 
3
20118 
data_a65
20119 
-1
20120 
3
20121 
data_a64
20122 
-1
20123 
3
20124 
data_a63
20125 
-1
20126 
3
20127 
data_a62
20128 
-1
20129 
3
20130 
data_a61
20131 
-1
20132 
3
20133 
data_a60
20134 
-1
20135 
3
20136 
data_a6
20137 
-1
20138 
3
20139 
data_a59
20140 
-1
20141 
3
20142 
data_a58
20143 
-1
20144 
3
20145 
data_a57
20146 
-1
20147 
3
20148 
data_a56
20149 
-1
20150 
3
20151 
data_a55
20152 
-1
20153 
3
20154 
data_a54
20155 
-1
20156 
3
20157 
data_a53
20158 
-1
20159 
3
20160 
data_a52
20161 
-1
20162 
3
20163 
data_a51
20164 
-1
20165 
3
20166 
data_a50
20167 
-1
20168 
3
20169 
data_a5
20170 
-1
20171 
3
20172 
data_a49
20173 
-1
20174 
3
20175 
data_a48
20176 
-1
20177 
3
20178 
data_a47
20179 
-1
20180 
3
20181 
data_a46
20182 
-1
20183 
3
20184 
data_a45
20185 
-1
20186 
3
20187 
data_a44
20188 
-1
20189 
3
20190 
data_a43
20191 
-1
20192 
3
20193 
data_a42
20194 
-1
20195 
3
20196 
data_a41
20197 
-1
20198 
3
20199 
data_a40
20200 
-1
20201 
3
20202 
data_a4
20203 
-1
20204 
3
20205 
data_a39
20206 
-1
20207 
3
20208 
data_a38
20209 
-1
20210 
3
20211 
data_a37
20212 
-1
20213 
3
20214 
data_a36
20215 
-1
20216 
3
20217 
data_a35
20218 
-1
20219 
3
20220 
data_a34
20221 
-1
20222 
3
20223 
data_a33
20224 
-1
20225 
3
20226 
data_a32
20227 
-1
20228 
3
20229 
data_a31
20230 
-1
20231 
3
20232 
data_a30
20233 
-1
20234 
3
20235 
data_a3
20236 
-1
20237 
3
20238 
data_a29
20239 
-1
20240 
3
20241 
data_a28
20242 
-1
20243 
3
20244 
data_a27
20245 
-1
20246 
3
20247 
data_a26
20248 
-1
20249 
3
20250 
data_a25
20251 
-1
20252 
3
20253 
data_a24
20254 
-1
20255 
3
20256 
data_a23
20257 
-1
20258 
3
20259 
data_a22
20260 
-1
20261 
3
20262 
data_a21
20263 
-1
20264 
3
20265 
data_a20
20266 
-1
20267 
3
20268 
data_a2
20269 
-1
20270 
3
20271 
data_a19
20272 
-1
20273 
3
20274 
data_a18
20275 
-1
20276 
3
20277 
data_a17
20278 
-1
20279 
3
20280 
data_a16
20281 
-1
20282 
3
20283 
data_a15
20284 
-1
20285 
3
20286 
data_a14
20287 
-1
20288 
3
20289 
data_a13
20290 
-1
20291 
3
20292 
data_a12
20293 
-1
20294 
3
20295 
data_a11
20296 
-1
20297 
3
20298 
data_a10
20299 
-1
20300 
3
20301 
data_a1
20302 
-1
20303 
3
20304 
data_a0
20305 
-1
20306 
3
20307 
clock0
20308 
-1
20309 
3
20310 
address_b3
20311 
-1
20312 
3
20313 
address_b2
20314 
-1
20315 
3
20316 
address_b1
20317 
-1
20318 
3
20319 
address_b0
20320 
-1
20321 
3
20322 
address_a3
20323 
-1
20324 
3
20325 
address_a2
20326 
-1
20327 
3
20328 
address_a1
20329 
-1
20330 
3
20331 
address_a0
20332 
-1
20333 
3
20334 
}
20335 
# lmf
20336 
d:|altera|72|quartus|lmf|
20337 
d41d8cd98f0b24e980998ecf8427e
20338 
# macro_sequence
20339 
 
20340 
# end
20341 
# entity
20342 
output_port_lookup
20343 
# storage
20344 
db|LB.(84).cnf
20345 
db|LB.(84).cnf
20346 
# logic_option {
20347 
AUTO_RAM_RECOGNITION
20348 
ON
20349 
}
20350 
# case_sensitive
20351 
# source_file
20352 
output_port_lookup.v
20353 
ef7bfa42c2b176f3887a072fa5a28da
20354 
7
20355 
# internal_option {
20356 
HDL_INITIAL_FANOUT_LIMIT
20357 
OFF
20358 
AUTO_RESOURCE_SHARING
20359 
OFF
20360 
AUTO_RAM_RECOGNITION
20361 
ON
20362 
AUTO_ROM_RECOGNITION
20363 
ON
20364 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
20365 
OFF
20366 
}
20367 
# user_parameter {
20368 
DATA_WIDTH
20369 
64
20370 
PARAMETER_UNKNOWN
20371 
USR
20372 
CTRL_WIDTH
20373 
8
20374 
PARAMETER_SIGNED_DEC
20375 
DEF
20376 
UDP_REG_SRC_WIDTH
20377 
2
20378 
PARAMETER_SIGNED_DEC
20379 
DEF
20380 
INPUT_ARBITER_STAGE_NUM
20381 
2
20382 
PARAMETER_SIGNED_DEC
20383 
DEF
20384 
NUM_OUTPUT_QUEUES
20385 
8
20386 
PARAMETER_SIGNED_DEC
20387 
DEF
20388 
STAGE_NUM
20389 
4
20390 
PARAMETER_SIGNED_DEC
20391 
DEF
20392 
NUM_IQ_BITS
20393 
3
20394 
PARAMETER_SIGNED_DEC
20395 
DEF
20396 
}
20397 
# lmf
20398 
d:|altera|72|quartus|lmf|
20399 
d41d8cd98f0b24e980998ecf8427e
20400 
# macro_sequence
20401 
 
20402 
# end
20403 
# entity
20404 
ethernet_parser_64bit
20405 
# storage
20406 
db|LB.(89).cnf
20407 
db|LB.(89).cnf
20408 
# logic_option {
20409 
AUTO_RAM_RECOGNITION
20410 
ON
20411 
}
20412 
# case_sensitive
20413 
# source_file
20414 
ethernet_parser_64bit.v
20415 
c52f75649cd9618e6869b278a8adf624
20416 
7
20417 
# internal_option {
20418 
HDL_INITIAL_FANOUT_LIMIT
20419 
OFF
20420 
AUTO_RESOURCE_SHARING
20421 
OFF
20422 
AUTO_RAM_RECOGNITION
20423 
ON
20424 
AUTO_ROM_RECOGNITION
20425 
ON
20426 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
20427 
OFF
20428 
}
20429 
# user_parameter {
20430 
DATA_WIDTH
20431 
64
20432 
PARAMETER_SIGNED_DEC
20433 
USR
20434 
CTRL_WIDTH
20435 
8
20436 
PARAMETER_SIGNED_DEC
20437 
USR
20438 
NUM_IQ_BITS
20439 
3
20440 
PARAMETER_SIGNED_DEC
20441 
USR
20442 
INPUT_ARBITER_STAGE_NUM
20443 
2
20444 
PARAMETER_SIGNED_DEC
20445 
USR
20446 
}
20447 
# lmf
20448 
d:|altera|72|quartus|lmf|
20449 
d41d8cd98f0b24e980998ecf8427e
20450 
# macro_sequence
20451 
 
20452 
# end
20453 
# entity
20454 
ethernet_parser
20455 
# storage
20456 
db|LB.(88).cnf
20457 
db|LB.(88).cnf
20458 
# logic_option {
20459 
AUTO_RAM_RECOGNITION
20460 
ON
20461 
}
20462 
# case_sensitive
20463 
# source_file
20464 
ethernet_parser.v
20465 
f55e40ac21869f98d669104d294bf92
20466 
7
20467 
# internal_option {
20468 
HDL_INITIAL_FANOUT_LIMIT
20469 
OFF
20470 
AUTO_RESOURCE_SHARING
20471 
OFF
20472 
AUTO_RAM_RECOGNITION
20473 
ON
20474 
AUTO_ROM_RECOGNITION
20475 
ON
20476 
IGNORE_VERILOG_INITIAL_CONSTRUCTS
20477 
OFF
20478 
}
20479 
# user_parameter {
20480 
DATA_WIDTH
20481 
64
20482 
PARAMETER_SIGNED_DEC
20483 
USR
20484 
CTRL_WIDTH
20485 
8
20486 
PARAMETER_SIGNED_DEC
20487 
USR
20488 
NUM_IQ_BITS
20489 
3
20490 
PARAMETER_SIGNED_DEC
20491 
USR
20492 
INPUT_ARBITER_STAGE_NUM
20493 
2
20494 
PARAMETER_SIGNED_DEC
20495 
USR
20496 
}
20497 
# lmf
20498 
d:|altera|72|quartus|lmf|
20499 
d41d8cd98f0b24e980998ecf8427e
20500 
# macro_sequence
20501 
 
20502 
# end
20503 
# entity
20504 
int2ext_top
20505 
# storage
20506 
db|LB.(17).cnf
20507 
db|LB.(17).cnf
20508 
# logic_option {
20509 
AUTO_RAM_RECOGNITION
20510 
ON
20511 
}
20512 
# case_insensitive
20513 
# source_file
20514 
int2ext|int2ext_top.vhd
20515 
c7c1a836c5d91dde3ec12e1827c74d6e
20516 
4
20517 
# internal_option {
20518 
HDL_INITIAL_FANOUT_LIMIT
20519 
OFF
20520 
AUTO_RESOURCE_SHARING
20521 
OFF
20522 
AUTO_RAM_RECOGNITION
20523 
ON
20524 
AUTO_ROM_RECOGNITION
20525 
ON
20526 
}
20527 
# user_parameter {
20528 
data_width
20529 
64
20530 
PARAMETER_UNKNOWN
20531 
USR
20532 
ctrl_width
20533 
8
20534 
PARAMETER_UNKNOWN
20535 
USR
20536 
}
20537 
# lmf
20538 
d:|altera|72|quartus|lmf|maxplus2.lmf
20539 
9a59d39b0706640b4b2718e8a1ff1f
20540 
# macro_sequence
20541 
 
20542 
# end
20543 
# entity
20544 
altsyncram
20545 
# storage
20546 
db|LB.(95).cnf
20547 
db|LB.(95).cnf
20548 
# case_insensitive
20549 
# source_file
20550 
d:|altera|72|quartus|libraries|megafunctions|altsyncram.tdf
20551 
1a8e44bce3df5c9cae2128978e887541
20552 
6
20553 
# user_parameter {
20554 
BYTE_SIZE_BLOCK
20555 
8
20556 
PARAMETER_UNKNOWN
20557 
DEF
20558 
AUTO_CARRY_CHAINS
20559 
ON
20560 
AUTO_CARRY
20561 
USR
20562 
IGNORE_CARRY_BUFFERS
20563 
OFF
20564 
IGNORE_CARRY
20565 
USR
20566 
AUTO_CASCADE_CHAINS
20567 
ON
20568 
AUTO_CASCADE
20569 
USR
20570 
IGNORE_CASCADE_BUFFERS
20571 
OFF
20572 
IGNORE_CASCADE
20573 
USR
20574 
WIDTH_BYTEENA
20575 
1
20576 
PARAMETER_UNKNOWN
20577 
DEF
20578 
OPERATION_MODE
20579 
DUAL_PORT
20580 
PARAMETER_UNKNOWN
20581 
USR
20582 
WIDTH_A
20583 
64
20584 
PARAMETER_UNKNOWN
20585 
USR
20586 
WIDTHAD_A
20587 
8
20588 
PARAMETER_UNKNOWN
20589 
USR
20590 
NUMWORDS_A
20591 
256
20592 
PARAMETER_UNKNOWN
20593 
USR
20594 
OUTDATA_REG_A
20595 
UNREGISTERED
20596 
PARAMETER_UNKNOWN
20597 
DEF
20598 
ADDRESS_ACLR_A
20599 
NONE
20600 
PARAMETER_UNKNOWN
20601 
USR
20602 
OUTDATA_ACLR_A
20603 
NONE
20604 
PARAMETER_UNKNOWN
20605 
DEF
20606 
WRCONTROL_ACLR_A
20607 
NONE
20608 
PARAMETER_UNKNOWN
20609 
USR
20610 
INDATA_ACLR_A
20611 
NONE
20612 
PARAMETER_UNKNOWN
20613 
USR
20614 
BYTEENA_ACLR_A
20615 
NONE
20616 
PARAMETER_UNKNOWN
20617 
DEF
20618 
WIDTH_B
20619 
64
20620 
PARAMETER_UNKNOWN
20621 
USR
20622 
WIDTHAD_B
20623 
8
20624 
PARAMETER_UNKNOWN
20625 
USR
20626 
NUMWORDS_B
20627 
256
20628 
PARAMETER_UNKNOWN
20629 
USR
20630 
INDATA_REG_B
20631 
CLOCK1
20632 
PARAMETER_UNKNOWN
20633 
DEF
20634 
WRCONTROL_WRADDRESS_REG_B
20635 
CLOCK1
20636 
PARAMETER_UNKNOWN
20637 
DEF
20638 
RDCONTROL_REG_B
20639 
CLOCK1
20640 
PARAMETER_UNKNOWN
20641 
DEF
20642 
ADDRESS_REG_B
20643 
CLOCK0
20644 
PARAMETER_UNKNOWN
20645 
USR
20646 
OUTDATA_REG_B
20647 
UNREGISTERED
20648 
PARAMETER_UNKNOWN
20649 
USR
20650 
BYTEENA_REG_B
20651 
CLOCK1
20652 
PARAMETER_UNKNOWN
20653 
DEF
20654 
INDATA_ACLR_B
20655 
NONE
20656 
PARAMETER_UNKNOWN
20657 
DEF
20658 
WRCONTROL_ACLR_B
20659 
NONE
20660 
PARAMETER_UNKNOWN
20661 
DEF
20662 
ADDRESS_ACLR_B
20663 
NONE
20664 
PARAMETER_UNKNOWN
20665 
USR
20666 
OUTDATA_ACLR_B
20667 
NONE
20668 
PARAMETER_UNKNOWN
20669 
USR
20670 
RDCONTROL_ACLR_B
20671 
NONE
20672 
PARAMETER_UNKNOWN
20673 
DEF
20674 
BYTEENA_ACLR_B
20675 
NONE
20676 
PARAMETER_UNKNOWN
20677 
DEF
20678 
WIDTH_BYTEENA_A
20679 
1
20680 
PARAMETER_UNKNOWN
20681 
DEF
20682 
WIDTH_BYTEENA_B
20683 
1
20684 
PARAMETER_UNKNOWN
20685 
DEF
20686 
RAM_BLOCK_TYPE
20687 
AUTO
20688 
PARAMETER_UNKNOWN
20689 
USR
20690 
BYTE_SIZE
20691 
8
20692 
PARAMETER_UNKNOWN
20693 
DEF
20694 
READ_DURING_WRITE_MODE_MIXED_PORTS
20695 
OLD_DATA
20696 
PARAMETER_UNKNOWN
20697 
USR
20698 
READ_DURING_WRITE_MODE_PORT_A
20699 
NEW_DATA_NO_NBE_READ
20700 
PARAMETER_UNKNOWN
20701 
DEF
20702 
READ_DURING_WRITE_MODE_PORT_B
20703 
NEW_DATA_NO_NBE_READ
20704 
PARAMETER_UNKNOWN
20705 
DEF
20706 
INIT_FILE
20707 
UNUSED
20708 
PARAMETER_UNKNOWN
20709 
DEF
20710 
INIT_FILE_LAYOUT
20711 
PORT_A
20712 
PARAMETER_UNKNOWN
20713 
DEF
20714 
MAXIMUM_DEPTH
20715 
 
20716 
PARAMETER_UNKNOWN
20717 
DEF
20718 
CLOCK_ENABLE_INPUT_A
20719 
NORMAL
20720 
PARAMETER_UNKNOWN
20721 
DEF
20722 
CLOCK_ENABLE_INPUT_B
20723 
NORMAL
20724 
PARAMETER_UNKNOWN
20725 
DEF
20726 
CLOCK_ENABLE_OUTPUT_A
20727 
NORMAL
20728 
PARAMETER_UNKNOWN
20729 
DEF
20730 
CLOCK_ENABLE_OUTPUT_B
20731 
NORMAL
20732 
PARAMETER_UNKNOWN
20733 
DEF
20734 
CLOCK_ENABLE_CORE_A
20735 
USE_INPUT_CLKEN
20736 
PARAMETER_UNKNOWN
20737 
DEF
20738 
CLOCK_ENABLE_CORE_B
20739 
USE_INPUT_CLKEN
20740 
PARAMETER_UNKNOWN
20741 
DEF
20742 
ENABLE_ECC
20743 
FALSE
20744 
PARAMETER_UNKNOWN
20745 
DEF
20746 
DEVICE_FAMILY
20747 
Stratix II
20748 
PARAMETER_UNKNOWN
20749 
USR
20750 
CBXI_PARAMETER
20751 
altsyncram_3ui1
20752 
PARAMETER_UNKNOWN
20753 
USR
20754 
}
20755 
# used_port {
20756 
wren_a
20757 
-1
20758 
3
20759 
q_b9
20760 
-1
20761 
3
20762 
q_b8
20763 
-1
20764 
3
20765 
q_b7
20766 
-1
20767 
3
20768 
q_b63
20769 
-1
20770 
3
20771 
q_b62
20772 
-1
20773 
3
20774 
q_b61
20775 
-1
20776 
3
20777 
q_b60
20778 
-1
20779 
3
20780 
q_b6
20781 
-1
20782 
3
20783 
q_b59
20784 
-1
20785 
3
20786 
q_b58
20787 
-1
20788 
3
20789 
q_b57
20790 
-1
20791 
3
20792 
q_b56
20793 
-1
20794 
3
20795 
q_b55
20796 
-1
20797 
3
20798 
q_b54
20799 
-1
20800 
3
20801 
q_b53
20802 
-1
20803 
3
20804 
q_b52
20805 
-1
20806 
3
20807 
q_b51
20808 
-1
20809 
3
20810 
q_b50
20811 
-1
20812 
3
20813 
q_b5
20814 
-1
20815 
3
20816 
q_b49
20817 
-1
20818 
3
20819 
q_b48
20820 
-1
20821 
3
20822 
q_b47
20823 
-1
20824 
3
20825 
q_b46
20826 
-1
20827 
3
20828 
q_b45
20829 
-1
20830 
3
20831 
q_b44
20832 
-1
20833 
3
20834 
q_b43
20835 
-1
20836 
3
20837 
q_b42
20838 
-1
20839 
3
20840 
q_b41
20841 
-1
20842 
3
20843 
q_b40
20844 
-1
20845 
3
20846 
q_b4
20847 
-1
20848 
3
20849 
q_b39
20850 
-1
20851 
3
20852 
q_b38
20853 
-1
20854 
3
20855 
q_b37
20856 
-1
20857 
3
20858 
q_b36
20859 
-1
20860 
3
20861 
q_b35
20862 
-1
20863 
3
20864 
q_b34
20865 
-1
20866 
3
20867 
q_b33
20868 
-1
20869 
3
20870 
q_b32
20871 
-1
20872 
3
20873 
q_b31
20874 
-1
20875 
3
20876 
q_b30
20877 
-1
20878 
3
20879 
q_b3
20880 
-1
20881 
3
20882 
q_b29
20883 
-1
20884 
3
20885 
q_b28
20886 
-1
20887 
3
20888 
q_b27
20889 
-1
20890 
3
20891 
q_b26
20892 
-1
20893 
3
20894 
q_b25
20895 
-1
20896 
3
20897 
q_b24
20898 
-1
20899 
3
20900 
q_b23
20901 
-1
20902 
3
20903 
q_b22
20904 
-1
20905 
3
20906 
q_b21
20907 
-1
20908 
3
20909 
q_b20
20910 
-1
20911 
3
20912 
q_b2
20913 
-1
20914 
3
20915 
q_b19
20916 
-1
20917 
3
20918 
q_b18
20919 
-1
20920 
3
20921 
q_b17
20922 
-1
20923 
3
20924 
q_b16
20925 
-1
20926 
3
20927 
q_b15
20928 
-1
20929 
3
20930 
q_b14
20931 
-1
20932 
3
20933 
q_b13
20934 
-1
20935 
3
20936 
q_b12
20937 
-1
20938 
3
20939 
q_b11
20940 
-1
20941 
3
20942 
q_b10
20943 
-1
20944 
3
20945 
q_b1
20946 
-1
20947 
3
20948 
q_b0
20949 
-1
20950 
3
20951 
data_a9
20952 
-1
20953 
3
20954 
data_a8
20955 
-1
20956 
3
20957 
data_a7
20958 
-1
20959 
3
20960 
data_a63
20961 
-1
20962 
3
20963 
data_a62
20964 
-1
20965 
3
20966 
data_a61
20967 
-1
20968 
3
20969 
data_a60
20970 
-1
20971 
3
20972 
data_a6
20973 
-1
20974 
3
20975 
data_a59
20976 
-1
20977 
3
20978 
data_a58
20979 
-1
20980 
3
20981 
data_a57
20982 
-1
20983 
3
20984 
data_a56
20985 
-1
20986 
3
20987 
data_a55
20988 
-1
20989 
3
20990 
data_a54
20991 
-1
20992 
3
20993 
data_a53
20994 
-1
20995 
3
20996 
data_a52
20997 
-1
20998 
3
20999 
data_a51
21000 
-1
21001 
3
21002 
data_a50
21003 
-1
21004 
3
21005 
data_a5
21006 
-1
21007 
3
21008 
data_a49
21009 
-1
21010 
3
21011 
data_a48
21012 
-1
21013 
3
21014 
data_a47
21015 
-1
21016 
3
21017 
data_a46
21018 
-1
21019 
3
21020 
data_a45
21021 
-1
21022 
3
21023 
data_a44
21024 
-1
21025 
3
21026 
data_a43
21027 
-1
21028 
3
21029 
data_a42
21030 
-1
21031 
3
21032 
data_a41
21033 
-1
21034 
3
21035 
data_a40
21036 
-1
21037 
3
21038 
data_a4
21039 
-1
21040 
3
21041 
data_a39
21042 
-1
21043 
3
21044 
data_a38
21045 
-1
21046 
3
21047 
data_a37
21048 
-1
21049 
3
21050 
data_a36
21051 
-1
21052 
3
21053 
data_a35
21054 
-1
21055 
3
21056 
data_a34
21057 
-1
21058 
3
21059 
data_a33
21060 
-1
21061 
3
21062 
data_a32
21063 
-1
21064 
3
21065 
data_a31
21066 
-1
21067 
3
21068 
data_a30
21069 
-1
21070 
3
21071 
data_a3
21072 
-1
21073 
3
21074 
data_a29
21075 
-1
21076 
3
21077 
data_a28
21078 
-1
21079 
3
21080 
data_a27
21081 
-1
21082 
3
21083 
data_a26
21084 
-1
21085 
3
21086 
data_a25
21087 
-1
21088 
3
21089 
data_a24
21090 
-1
21091 
3
21092 
data_a23
21093 
-1
21094 
3
21095 
data_a22
21096 
-1
21097 
3
21098 
data_a21
21099 
-1
21100 
3
21101 
data_a20
21102 
-1
21103 
3
21104 
data_a2
21105 
-1
21106 
3
21107 
data_a19
21108 
-1
21109 
3
21110 
data_a18
21111 
-1
21112 
3
21113 
data_a17
21114 
-1
21115 
3
21116 
data_a16
21117 
-1
21118 
3
21119 
data_a15
21120 
-1
21121 
3
21122 
data_a14
21123 
-1
21124 
3
21125 
data_a13
21126 
-1
21127 
3
21128 
data_a12
21129 
-1
21130 
3
21131 
data_a11
21132 
-1
21133 
3
21134 
data_a10
21135 
-1
21136 
3
21137 
data_a1
21138 
-1
21139 
3
21140 
data_a0
21141 
-1
21142 
3
21143 
clock0
21144 
-1
21145 
3
21146 
address_b7
21147 
-1
21148 
3
21149 
address_b6
21150 
-1
21151 
3
21152 
address_b5
21153 
-1
21154 
3
21155 
address_b4
21156 
-1
21157 
3
21158 
address_b3
21159 
-1
21160 
3
21161 
address_b2
21162 
-1
21163 
3
21164 
address_b1
21165 
-1
21166 
3
21167 
address_b0
21168 
-1
21169 
3
21170 
address_a7
21171 
-1
21172 
3
21173 
address_a6
21174 
-1
21175 
3
21176 
address_a5
21177 
-1
21178 
3
21179 
address_a4
21180 
-1
21181 
3
21182 
address_a3
21183 
-1
21184 
3
21185 
address_a2
21186 
-1
21187 
3
21188 
address_a1
21189 
-1
21190 
3
21191 
address_a0
21192 
-1
21193 
3
21194 
}
21195 
# include_file {
21196 
d:|altera|72|quartus|libraries|megafunctions|lpm_mux.inc
21197 
c22bfd353214c01495b560fc34e47d79
21198 
d:|altera|72|quartus|libraries|megafunctions|stratix_ram_block.inc
21199 
2263a3bdfffeb150af977ee13902f70
21200 
d:|altera|72|quartus|libraries|megafunctions|lpm_decode.inc
21201 
bd0e2f5e01c1bd360461dceb53d48
21202 
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
21203 
f39123b8592ab2dac019716e56b3ec18
21204 
d:|altera|72|quartus|libraries|megafunctions|a_rdenreg.inc
21205 
60d229340bc3c24acb0a137b4849830
21206 
d:|altera|72|quartus|libraries|megafunctions|altrom.inc
21207 
d4e3a69a331d3a99d3281790d99a1ebd
21208 
d:|altera|72|quartus|libraries|megafunctions|altram.inc
21209 
e66a83eccf6717bed97c99d891ad085
21210 
d:|altera|72|quartus|libraries|megafunctions|altdpram.inc
21211 
99d442b5b66c88db4daf94d99c6e4e77
21212 
d:|altera|72|quartus|libraries|megafunctions|altqpram.inc
21213 
74e08939f96a7ea8e7a4d59a5b01fe7
21214 
}
21215 
# lmf
21216 
d:|altera|72|quartus|lmf|
21217 
d41d8cd98f0b24e980998ecf8427e
21218 
# macro_sequence
21219 
 
21220 
# end
21221 
# entity
21222 
altsyncram_3ui1
21223 
# storage
21224 
db|LB.(96).cnf
21225 
db|LB.(96).cnf
21226 
# case_insensitive
21227 
# source_file
21228 
db|altsyncram_3ui1.tdf
21229 
826565184d403133b7b0e9c27be756b9
21230 
6
21231 
# used_port {
21232 
wren_a
21233 
-1
21234 
3
21235 
q_b9
21236 
-1
21237 
3
21238 
q_b8
21239 
-1
21240 
3
21241 
q_b7
21242 
-1
21243 
3
21244 
q_b63
21245 
-1
21246 
3
21247 
q_b62
21248 
-1
21249 
3
21250 
q_b61
21251 
-1
21252 
3
21253 
q_b60
21254 
-1
21255 
3
21256 
q_b6
21257 
-1
21258 
3
21259 
q_b59
21260 
-1
21261 
3
21262 
q_b58
21263 
-1
21264 
3
21265 
q_b57
21266 
-1
21267 
3
21268 
q_b56
21269 
-1
21270 
3
21271 
q_b55
21272 
-1
21273 
3
21274 
q_b54
21275 
-1
21276 
3
21277 
q_b53
21278 
-1
21279 
3
21280 
q_b52
21281 
-1
21282 
3
21283 
q_b51
21284 
-1
21285 
3
21286 
q_b50
21287 
-1
21288 
3
21289 
q_b5
21290 
-1
21291 
3
21292 
q_b49
21293 
-1
21294 
3
21295 
q_b48
21296 
-1
21297 
3
21298 
q_b47
21299 
-1
21300 
3
21301 
q_b46
21302 
-1
21303 
3
21304 
q_b45
21305 
-1
21306 
3
21307 
q_b44
21308 
-1
21309 
3
21310 
q_b43
21311 
-1
21312 
3
21313 
q_b42
21314 
-1
21315 
3
21316 
q_b41
21317 
-1
21318 
3
21319 
q_b40
21320 
-1
21321 
3
21322 
q_b4
21323 
-1
21324 
3
21325 
q_b39
21326 
-1
21327 
3
21328 
q_b38
21329 
-1
21330 
3
21331 
q_b37
21332 
-1
21333 
3
21334 
q_b36
21335 
-1
21336 
3
21337 
q_b35
21338 
-1
21339 
3
21340 
q_b34
21341 
-1
21342 
3
21343 
q_b33
21344 
-1
21345 
3
21346 
q_b32
21347 
-1
21348 
3
21349 
q_b31
21350 
-1
21351 
3
21352 
q_b30
21353 
-1
21354 
3
21355 
q_b3
21356 
-1
21357 
3
21358 
q_b29
21359 
-1
21360 
3
21361 
q_b28
21362 
-1
21363 
3
21364 
q_b27
21365 
-1
21366 
3
21367 
q_b26
21368 
-1
21369 
3
21370 
q_b25
21371 
-1
21372 
3
21373 
q_b24
21374 
-1
21375 
3
21376 
q_b23
21377 
-1
21378 
3
21379 
q_b22
21380 
-1
21381 
3
21382 
q_b21
21383 
-1
21384 
3
21385 
q_b20
21386 
-1
21387 
3
21388 
q_b2
21389 
-1
21390 
3
21391 
q_b19
21392 
-1
21393 
3
21394 
q_b18
21395 
-1
21396 
3
21397 
q_b17
21398 
-1
21399 
3
21400 
q_b16
21401 
-1
21402 
3
21403 
q_b15
21404 
-1
21405 
3
21406 
q_b14
21407 
-1
21408 
3
21409 
q_b13
21410 
-1
21411 
3
21412 
q_b12
21413 
-1
21414 
3
21415 
q_b11
21416 
-1
21417 
3
21418 
q_b10
21419 
-1
21420 
3
21421 
q_b1
21422 
-1
21423 
3
21424 
q_b0
21425 
-1
21426 
3
21427 
data_a9
21428 
-1
21429 
3
21430 
data_a8
21431 
-1
21432 
3
21433 
data_a7
21434 
-1
21435 
3
21436 
data_a63
21437 
-1
21438 
3
21439 
data_a62
21440 
-1
21441 
3
21442 
data_a61
21443 
-1
21444 
3
21445 
data_a60
21446 
-1
21447 
3
21448 
data_a6
21449 
-1
21450 
3
21451 
data_a59
21452 
-1
21453 
3
21454 
data_a58
21455 
-1
21456 
3
21457 
data_a57
21458 
-1
21459 
3
21460 
data_a56
21461 
-1
21462 
3
21463 
data_a55
21464 
-1
21465 
3
21466 
data_a54
21467 
-1
21468 
3
21469 
data_a53
21470 
-1
21471 
3
21472 
data_a52
21473 
-1
21474 
3
21475 
data_a51
21476 
-1
21477 
3
21478 
data_a50
21479 
-1
21480 
3
21481 
data_a5
21482 
-1
21483 
3
21484 
data_a49
21485 
-1
21486 
3
21487 
data_a48
21488 
-1
21489 
3
21490 
data_a47
21491 
-1
21492 
3
21493 
data_a46
21494 
-1
21495 
3
21496 
data_a45
21497 
-1
21498 
3
21499 
data_a44
21500 
-1
21501 
3
21502 
data_a43
21503 
-1
21504 
3
21505 
data_a42
21506 
-1
21507 
3
21508 
data_a41
21509 
-1
21510 
3
21511 
data_a40
21512 
-1
21513 
3
21514 
data_a4
21515 
-1
21516 
3
21517 
data_a39
21518 
-1
21519 
3
21520 
data_a38
21521 
-1
21522 
3
21523 
data_a37
21524 
-1
21525 
3
21526 
data_a36
21527 
-1
21528 
3
21529 
data_a35
21530 
-1
21531 
3
21532 
data_a34
21533 
-1
21534 
3
21535 
data_a33
21536 
-1
21537 
3
21538 
data_a32
21539 
-1
21540 
3
21541 
data_a31
21542 
-1
21543 
3
21544 
data_a30
21545 
-1
21546 
3
21547 
data_a3
21548 
-1
21549 
3
21550 
data_a29
21551 
-1
21552 
3
21553 
data_a28
21554 
-1
21555 
3
21556 
data_a27
21557 
-1
21558 
3
21559 
data_a26
21560 
-1
21561 
3
21562 
data_a25
21563 
-1
21564 
3
21565 
data_a24
21566 
-1
21567 
3
21568 
data_a23
21569 
-1
21570 
3
21571 
data_a22
21572 
-1
21573 
3
21574 
data_a21
21575 
-1
21576 
3
21577 
data_a20
21578 
-1
21579 
3
21580 
data_a2
21581 
-1
21582 
3
21583 
data_a19
21584 
-1
21585 
3
21586 
data_a18
21587 
-1
21588 
3
21589 
data_a17
21590 
-1
21591 
3
21592 
data_a16
21593 
-1
21594 
3
21595 
data_a15
21596 
-1
21597 
3
21598 
data_a14
21599 
-1
21600 
3
21601 
data_a13
21602 
-1
21603 
3
21604 
data_a12
21605 
-1
21606 
3
21607 
data_a11
21608 
-1
21609 
3
21610 
data_a10
21611 
-1
21612 
3
21613 
data_a1
21614 
-1
21615 
3
21616 
data_a0
21617 
-1
21618 
3
21619 
clock0
21620 
-1
21621 
3
21622 
address_b7
21623 
-1
21624 
3
21625 
address_b6
21626 
-1
21627 
3
21628 
address_b5
21629 
-1
21630 
3
21631 
address_b4
21632 
-1
21633 
3
21634 
address_b3
21635 
-1
21636 
3
21637 
address_b2
21638 
-1
21639 
3
21640 
address_b1
21641 
-1
21642 
3
21643 
address_b0
21644 
-1
21645 
3
21646 
address_a7
21647 
-1
21648 
3
21649 
address_a6
21650 
-1
21651 
3
21652 
address_a5
21653 
-1
21654 
3
21655 
address_a4
21656 
-1
21657 
3
21658 
address_a3
21659 
-1
21660 
3
21661 
address_a2
21662 
-1
21663 
3
21664 
address_a1
21665 
-1
21666 
3
21667 
address_a0
21668 
-1
21669 
3
21670 
}
21671 
# lmf
21672 
d:|altera|72|quartus|lmf|
21673 
d41d8cd98f0b24e980998ecf8427e
21674 
# macro_sequence
21675 
 
21676 
# end
21677 
# entity
21678 
LB
21679 
# storage
21680 
db|LB.(0).cnf
21681 
db|LB.(0).cnf
21682 
# case_insensitive
21683 
# source_file
21684 
LB.bdf
21685 
6f907b7c6bc1c5fda48e3a2697cf6ae
21686 
25
21687 
# internal_option {
21688 
BLOCK_DESIGN_NAMING
21689 
AUTO
21690 
}
21691 
# hierarchies {
21692 
|
21693 
}
21694 
# lmf
21695 
d:|altera|72|quartus|lmf|
21696 
d41d8cd98f0b24e980998ecf8427e
21697 
# macro_sequence
21698 
 
21699 
# end
21700 
# entity
21701 
manager
21702 
# storage
21703 
db|LB.(36).cnf
21704 
db|LB.(36).cnf
21705 
# logic_option {
21706 
AUTO_RAM_RECOGNITION
21707 
ON
21708 
}
21709 
# case_insensitive
21710 
# source_file
21711 
TABLE|manager.vhd
21712 
c9db91bac4e8691e57bd61ebeae71f
21713 
4
21714 
# internal_option {
21715 
HDL_INITIAL_FANOUT_LIMIT
21716 
OFF
21717 
AUTO_RESOURCE_SHARING
21718 
OFF
21719 
AUTO_RAM_RECOGNITION
21720 
ON
21721 
AUTO_ROM_RECOGNITION
21722 
ON
21723 
}
21724 
# user_parameter {
21725 
data_width
21726 
64
21727 
PARAMETER_UNKNOWN
21728 
USR
21729 
ctrl_width
21730 
8
21731 
PARAMETER_UNKNOWN
21732 
USR
21733 
}
21734 
# hierarchies {
21735 
manager:inst
21736 
}
21737 
# lmf
21738 
d:|altera|72|quartus|lmf|maxplus2.lmf
21739 
9a59d39b0706640b4b2718e8a1ff1f
21740 
# macro_sequence
21741 
 
21742 
# end
21743 
# complete
21744 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.