OpenCores
URL https://opencores.org/ocsvn/logicprobe/logicprobe/trunk

Subversion Repositories logicprobe

[/] [logicprobe/] [trunk/] [tst/] [Makefile] - Blame information for rev 6

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 6 hellwig
#
2
# Makefile to build the simulation test programs and
3
# synthesize the project for different boards
4
#
5
 
6
DIRS = sim-c sim-v boards
7
 
8
all:
9
                for i in $(DIRS) ; do \
10
                  $(MAKE) -C $$i all ; \
11
                done
12
 
13
clean:
14
                for i in $(DIRS) ; do \
15
                  $(MAKE) -C $$i clean ; \
16
                done
17
                rm -f *~

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.