URL https://opencores.org/ocsvn/logicprobe/logicprobe/trunk

Subversion Repositories logicprobe

[/] [logicprobe/] [trunk/] [tst/] [boards/] [Digilent-S3E-500/] [Makefile] - Blame information for rev 6

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#
# Makefile to synthesize the project (this is only a dummy)
#
 
all:
                @echo "Please use Xilinx ISE 14.5 to synthesize the project!"
 
clean:
                #mv lfsr128/lfsr128.xise .
                #rm -rf lfsr128/*
                #mv lfsr128.xise lfsr128
                rm -f *~

Line No.	Rev	Author	Line
1	6	hellwig	`#`
2			`# Makefile to synthesize the project (this is only a dummy)`
3			`#`
4
5			`all:`
6			`@echo "Please use Xilinx ISE 14.5 to synthesize the project!"`
7
8			`clean:`
9			`#mv lfsr128/lfsr128.xise .`
10			`#rm -rf lfsr128/*`
11			`#mv lfsr128.xise lfsr128`
12			`rm -f *~`

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Subversion Repositories logicprobe

[/] [logicprobe/] [trunk/] [tst/] [boards/] [Digilent-S3E-500/] [Makefile] - Blame information for rev 6