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                                  README
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This file is part of the LowPass Filter with Finite Impulse Response (LPFFIR) project:
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https://opencores.org/projects/lpffir
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AUTHOR:
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Vladimir Armstrong, vladimirarmstrong@opencores.org
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DESCRIPTION:
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Implementation of LPFFIR according to specification document:
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./doc/LPFFIR_Specifications.pdf
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DIRECTORY STRUCTURE:
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── bench            Top level test bench
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│   ├── systemc     SystemC test bench sources
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│   └── verilog     Verilog test bench sources
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├── doc             Specification, verification and other PDF documents
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│   └── src         Source version of all documents (Microsoft Word, Microsoft Visio)
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├── rtl             Verilog RTL sources
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├── sim             Top level simulations
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│   ├── matlab_sim  MATLAB simulations
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│   │   ├── out     Useful output from MATLAB simulation
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│   │   └── run     MATLAB sources and for running MATLAB simulations
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│   │
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│   └── rtl_sim     RTL simulations
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│       ├── out     Useful output from RTL simulation
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│       └── run     For running RTL simulations
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├── sw              Software sources for Python script utilities
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│   ├── out         Useful output from Python script utilities
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│   └── run         Python sources and for running Python script utilities
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└── uvm                  Universal Verification Methodology (UVM)
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    ├── rca_uvm          Ripple Carry Adder Easier UVM project
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    ├── lpffir_uvm       Low Pass Filter FIR Easier UVM project
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    └── tools              Open-source Tools
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        ├── easier_uvm_gen Automatic UVM test bench generator
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        └── uvm_syoscb     General purpose UVM Scoreboard
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OPEN-SOURCE TOOLS:
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1. Ubuntu 18.04 LTS         Linux OS development platform
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2. SystemC 2.3.2-Accellera  SystemC test bench simulator
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3. Verilator                Verilog simulator
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4. GTKWave                  Verilog simulation waveform viewer
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5. GNU Octave               Octave syntax is largely compatible with MATLAB
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6. Python                   RTL-simulation vs. MATLAB-expected check script

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