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[/] [lpffir/] [trunk/] [uvm/] [lpffir_uvm/] [generated_tb/] [tb/] [data_input/] [sv/] [data_input_monitor.sv] - Blame information for rev 11

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1 11 vladimirar
// You can insert code here by setting file_header_inc in file common.tpl
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//=============================================================================
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// Project  : generated_tb
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//
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// File Name: data_input_monitor.sv
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//
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//
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// Version:   1.0
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//
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// Code created by Easier UVM Code Generator version 2016-04-18-EP on Sat Apr 27 13:59:59 2019
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//=============================================================================
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// Description: Monitor for data_input
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//=============================================================================
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`ifndef DATA_INPUT_MONITOR_SV
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`define DATA_INPUT_MONITOR_SV
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// You can insert code here by setting monitor_inc_before_class in file data_input.tpl
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class data_input_monitor extends uvm_monitor;
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  `uvm_component_utils(data_input_monitor)
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  virtual data_input_if vif;
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  uvm_analysis_port #(input_tx) analysis_port;
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  input_tx m_trans;
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  extern function new(string name, uvm_component parent);
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  // Methods build_phase, run_phase, and do_mon generated by setting monitor_inc in file data_input.tpl
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  extern function void build_phase(uvm_phase phase);
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  extern task run_phase(uvm_phase phase);
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  extern task do_mon();
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  // You can insert code here by setting monitor_inc_inside_class in file data_input.tpl
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endclass : data_input_monitor
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function data_input_monitor::new(string name, uvm_component parent);
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  super.new(name, parent);
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  analysis_port = new("analysis_port", this);
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endfunction : new
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function void data_input_monitor::build_phase(uvm_phase phase);
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endfunction : build_phase
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task data_input_monitor::run_phase(uvm_phase phase);
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  `uvm_info(get_type_name(), "run_phase", UVM_HIGH)
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  m_trans = input_tx::type_id::create("m_trans");
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  do_mon();
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endtask : run_phase
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// Start of inlined include file generated_tb/tb/include/data_input_do_mon.sv
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task data_input_monitor::do_mon;
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  forever @(posedge vif.clk)
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  begin
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    wait (vif.reset == 1);
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    if (vif.valid && vif.ready)
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    begin
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      m_trans.data = vif.data;
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      analysis_port.write(m_trans);
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      `uvm_info(get_type_name(), $sformatf("Input data = %0d", m_trans.data), UVM_HIGH)
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    end
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  end
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endtask
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// End of inlined include file
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// You can insert code here by setting monitor_inc_after_class in file data_input.tpl
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`endif // DATA_INPUT_MONITOR_SV
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