Subversion Repositories lpffir

#!/usr/bin/perl

##

##----------------------------------------------------------------------

## Copyright (c) 2013-2016 by Doulos Ltd.

##

## Licensed under the Apache License, Version 2.0 (the "License");

## you may not use this file except in compliance with the License.

## You may obtain a copy of the License at

##

##     http://www.apache.org/licenses/LICENSE-2.0

##

## Unless required by applicable law or agreed to in writing, software

## distributed under the License is distributed on an "AS IS" BASIS,

## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

## See the License for the specific language governing permissions and

## limitations under the License.

## ----------------------------------------------------------------------

## Based on the juvb11.pl script v1.09 by Jim McGrath, Cadence which was uploaded as UVMWorld contribution on 16 September 2011

## 19/02/2014  Author Christoph Suehnel, Doulos

## 24/02/2014  David Long, Doulos - DUT port list, auto instantiation in top

## 12/03/2014  David Long, Doulos - Support for multiple IFs/register sub-blocks

## 04/04/2014  David Long, Doulos - Naming conventions and use of config_db updated

## 11/04/2014  David Long, Doulos - Constraints added to seq_item

## 20/05/2014  David Long, Doulos - Support for multiple agents within envs. Simplified directory structure,

## 05/06/2014  David Long, Doulos - Revised template file format and options. Preliminary version for public release

## 01/09/2014  David Long, Doulos - DUT now in test harness module. Removed unnecessary child environments. Improvements to code formatting

## 21/09/2014  David Long, Doulos - trans_var allows typedef. item replaced by req. Added checks/coverage_enable.

## 08/10/2014  David Long, Doulos - fixed some naming conventions. Check "is_active"

## 13/10/2014  David Long, Doulos - fixed bug with "uvm_seqr_class" switch in template file

## 13/10/2014  David Long, Doulos - default_sequence class now derived directly from uvm_sequence

## 17/10/2014  David Long, Doulos - removed unnecessary base class for test. Configuration for top env now set in TB module

## 22/10/2014  David Long, Doulos - Top-level sequence now started by env (default test run_phase does nothing). Removed unnecessary task wait_end_test.

##                                  Added checking for critical warnings re include files (can be ignored by adding -c ("continue") flag to command line

## 06/11/2014  David Long, Doulos - Option to add common package for parameters, etc that can be accessed in all generated files (including test harness)

## 05/11/2014  David Long, Doulos - Generated packages now include files directly (removed .svh files). Removed unused *_common.sv files

## 07/11/2014  David Long, Doulos - Removed <test>_common_pkg include file - these items are now written to test common package directly.

##                                  Test common package file is not regenerated if it has been modified since it was created (i.e. user changes are preserved).

## 07/11/2014  David Long, Doulos - Top-level sequence uses UVM 1.2 API to raise/drop objections in pre/post-start.

## 17/11/2014  David Long, Doulos - Corrected minor formatting issues.

## 16/12/2014  John Aynsley, Doulos - Tidied up positioning of blank lines.

## 19/12/2014  John Aynsley, Doulos - Add m_ prefix to member variables. Add some pretty-printing

## 05/01/2015  John Aynsley, Doulos - Fix bug with properties leaking between agents

## 16/01/2015  John Aynsley, Doulos - Tweak formatting

## 20/01/2015  John Aynsley, Doulos - Tweak formatting

## 28/01/2015  John Aynsley, Doulos - Add a parameter regmodel_file to reg.tpl to replace the hardwired "regmodel.sv"

## 28/01/2015  John Aynsley, Doulos - Allow regmodel_ as well as rm_ in reg.tpl file

## 29/01/2015  John Aynsley, Doulos - Call `uvm_error if randomize fails

## 04/02/2015  John Aynsley, Doulos - Fix bug so that common package gets included in agent interfaces, rationalize package imports

## 04/02/2015  John Aynsley, Doulos - Allow named constraints as trans_var = values

## 19/02/2015  John Aynsley, Doulos - Label coverpoints using field name rather than number

## 19/02/2015  John Aynsley, Doulos - Add new include files inside/after classes

## 07/04/2015  John Aynsley, Doulos - Add new include file inside th module

## 21/04/2015  John Aynsley, Doulos - Generate get/set_starting_phase methods for all sequences

## 05/05/2015  John Aynsley, Doulos - Add several new include files and independent flags to suppress the generation of default members and methods

## 06/05/2015  John Aynsley, Doulos - Add ability to inline all user-defined include files

## 11/05/2015  John Aynsley, Doulos - Restructure <top>_common_pkg as per common_pkg (not backward-compatible)

## 12/05/2015  John Aynsley, Doulos - Add _prepend_to_ and _append_to_ include files for build_phase, connect_phase, run_phase methods

## 12/05/2015  John Aynsley, Doulos - Don't generate end_of_elaboration_phase, start_of_simulation_phase, check_phase (allows it to be user-defined more conveniently)

## 12/05/2015  John Aynsley, Doulos - Don't generate empty run_phase for test (allows it to be user-defined more conveniently)

## 19/05/2015  John Aynsley, Doulos - Support multiple instances of each interface (with _N suffix in pinlist file)

## 20/05/2015  John Aynsley, Doulos - Refactor all the pretty-print code

## 26/05/2015  John Aynsley, Doulos - Generate comments showing possible include locations

## 30/05/2015  John Aynsley, Doulos - Permit trans_item name clashes across agents by distinguishing the filenames

## 05/06/2015  John Aynsley, Doulos - Add agent_copy_config_vars

## 16/06/2015  John Aynsley, Doulos - Add -m command line argument to specify path to common template file. Interface template files may have any name (not just *.tpl)

## 16/06/2015  John Aynsley, Doulos - Add prefix = setting to common template file as alternative to -p switch

## 17/06/2015  John Aynsley, Doulos - Refactor by adding warning_prompt

## 20/06/2015  John Aynsley, Doulos - Add reg_access_mode, reg_access_map, reg_access_block_type, reg_access_block_instance, top_reg_block_type, regmodel_file

## 20/06/2015  John Aynsley, Doulos - Make reg.tpl optional

## 21/06/2015  John Aynsley, Doulos - Add top_env_generate_end_of_elaboration (default yes)

## 21/06/2015  John Aynsley, Doulos - Revamp messages printed from script

## 21/06/2015  John Aynsley, Doulos - Fix bug in gen_env which was repeating additional agent declaration in number_of_instances loop

## 21/06/2015  John Aynsley, Doulos - Add compile/run script for Riviera

## 30/09/2015  John Aynsley, Doulos - Add command line flag -x to output dut_source_path, inc_path, and project without generating any code

## 01/10/2015  John Aynsley, Doulos - Adjust compile_vcs.do and compile_ius.do scripts to use built-in versions of UVM-1.2

## 01/10/2015  John Aynsley, Doulos - Replace factory with uvm_factory::get().

## 20/10/2015  John Aynsley, Doulos - Make the -r switch optional: instantiation of the register model will be forced in the presence of top_reg_block_type

## 20/10/2015  John Aynsley, Doulos - Extend command line flag -x to output regmodel_file without generating any code

## 22/10/2015  John Aynsley, Doulos - Make files.f optional. If absent, create a files.f that lists just the *.sv files in the DUT directory (alphabetical order)

## 23/10/2015  John Aynsley, Doulos - Allow dut_source_path to default to dut, inc_path to default to include, dut_pfile to default to pinlist

## 23/10/2015  John Aynsley, Doulos - Add common template setting uvm_cmdline = , and remove +UVM_VERBOSITY=FULL from sim scripts, using $uvm_cmdline instead

## 26/10/2015  John Aynsley, Doulos - With -x regmodel_file, force the script to read reg.tpl if the file exists

## 03/11/2015  John Aynsley, Doulos - Moved _N suffix to before standard suffix for consistency, e.g. changed m_${agent}_agent${suffix} to m_${agent}${suffix}_agent

## 09/11/2015  John Aynsley, Doulos - Call comparer.compare_field in overridden do_compare method of uvm_sequence_item (to keep Syosil scoreboard happy)

## 16/11/2015  John Aynsley, Doulos - Add top_default_seq_count in common template

## 17/11/2015  John Aynsley, Doulos - Rewrite the pretty-printing code

## 17/11/2015  John Aynsley, Doulos - Add support for the Syosil Versatile Scoreboard: syosil_scoreboard_src_path, ref_model_input, ref_model_output

##                                                                                     ref_model_compare_method, ref_model_inc_before/inside/after_class

## 26/11/2015  John Aynsley, Doulos - Generate pack and unpack methods in uvm_sequence_item class unless cmdline flag -nopack is present for backward compatibility

## 26/11/2015  John Aynsley, Doulos - Add trans_enum_var setting to distinguish enum variables in do_pack, do_unpack, and convert2string - mandatory for enums in pack!

## 26/11/2015  John Aynsley, Doulos - Add trans_meta setting to distinguish transaction metadata and thus exclude it from do_compare, do_pack, and do_unpack methods

## 26/11/2015  John Aynsley, Doulos - Add trans_enum_meta for metadata that happens to be of enum type

## 27/11/2015  John Aynsley, Doulos - Allow single unpacked array dimension in trans_var declaration

## 17/12/2015  John Aynsley, Doulos - Minor cosmetic surgery on the source code

## 18/12/2015  John Aynsley, Doulos - Eliminated the <agent>_env directory and the <agent>_env_pkg. There is now only an <agent>_pkg.

##                                    Now only 1 pkg per UVC. Also scrapped subs gen_regmodel_pkg and gen_regmodel_env

## 19/12/2015  John Aynsley, Doulos - Made coverage object available to both coverage subscribers (agent and register), which also now contain a build_phase method

## 19/12/2015  John Aynsley, Doulos - Use coverage_enable to condition the calling of sample(), not the instantiation of a subscriber for an agent

## 19/12/2015  John Aynsley, Doulos - Move code executed after parsing control files to separate subs

## 20/12/2015  John Aynsley, Doulos - Removed the unused dut_inc_path and inc_file code

## 23/12/2015  John Aynsley, Doulos - Permit / in include filenames so that ./include can be structured into subdirectories

## 11/01/2016  John Aynsley, Doulos - Permit trans_var/trans_meta = // SystemVerilog comment

## 20/01/2016  John Aynsley, Doulos - Insert agent_copy_config_vars inc file only once if number_of_instances > 1, which can thus copy vars for multiple config objects

## 21/01/2016  John Aynsley, Doulos - Add dual_top and split_transactors to support acceleration/emulation-ready environments

## 01/02/2016  John Aynsley, Doulos - Add timeunit and timeprecision to interfaces (was previously only inserted in modules)

## 15/02/2016  John Aynsley, Doulos - Fix bug related to print_structure - %env_agents needs to store a copy of @additional_agents, not a \reference

## 15/02/2016  John Aynsley, Doulos - Add top_env_generate_run_phase (default yes)

## 15/02/2016  John Aynsley, Doulos - Add generate_file_header and file_header_inc

## 15/02/2016  John Aynsley, Doulos - Clean up auto-generated file header to only write out lines that are defined

## 17/02/2016  John Aynsley, Doulos - Add adapter_generate_methods_inside/after_class and adapter_inc_before/inside/after class

## 18/02/2016  John Aynsley, Doulos - Add nested_config_objects

## 18/02/2016  John Aynsley, Doulos - Add top_env_config_append_to_new

## 18/02/2016  John Aynsley, Doulos - Add top_env_config_generate_methods_inside/after_class

## 18/02/2016  John Aynsley, Doulos - Add agent_config_generate_methods_inside/after_class

## 18/02/2016  John Aynsley, Doulos - Add tb_generate_run_test

## 08/03/2016  John Aynsley, Doulos - Add -s command line switch to override syosil_scoreboard_src_path setting in common template

## 31/03/2016  John Aynsley, Doulos - Permit end-of-line comment with DEC in pinlist file

## 31/03/2016  John Aynsley, Doulos - Fix bug with trailing comments after last port connection in pinlist file

## 31/03/2016  John Aynsley, Doulos - Add calls to .set_item_context() before randomizing sequence objects to ensure random stability

## 05/04/2016  John Aynsley, Doulos - Replace -f with -F in Riviera script

## 06/04/2016  John Aynsley, Doulos - Modify compile_riviera.do script to compile everything UVM with a single call to alog

## 15/04/2016  John Aynsley, Doulos - Add tb_prepend_to_initial and tb_inc_before_run_test

## 15/04/2016  John Aynsley, Doulos - Add generate_interface_instance = no (interface instance not generated and vif not assigned)

## 15/04/2016  John Aynsley, Doulos - Add byo_interface

## 15/04/2016  John Aynsley, Doulos - Allow user-defined interface instance names in the pinlist file

## 15/04/2016  John Aynsley, Doulos - Changed "virtual interface is not set!" report from FATAL to WARNING - because might have a parameterized interface

## 12/05/2016  John Aynsley, Doulos - Allow multiple +uvm_cmdline settings to apply additively

## 27/05/2016  John Aynsley, Doulos - Don't generate empty build_phase method for monitor

## 27/05/2016  John Aynsley, Doulos - Modify compile_riviera.do script to use the UVM 1.2 library supplied with Riviera

## 11/08/2016  John Aynsley, Doulos - Fix serious bug - the default env sequence was not being started for an agent that accessed a register model

## 05/10/2016  John Aynsley, Doulos - Don't use the monitor's analysis port outside of the agent. Use the agent's analysis port instead.

## 07/10/2016  John Aynsley, Doulos - Move assignment to m_item in function <agent>_coverage::write

## 07/10/2016  John Aynsley, Doulos - Move lines around in generated code for top_default_sequence 

## 07/10/2016  John Aynsley, Doulos - Add an m_config member to every ${agent_name}_env_default_seq register sequence and assign before start

## 10/10/2016  John Aynsley, Doulos - Add an m_config member to every ${agent_name}_default_seq and assign before start

## 10/10/2016  John Aynsley, Doulos - Add an m_config member to every driver and monitor and assign in agent::connect

## Easier UVM Generator

use strict;

use warnings;

require 5.8.0;

use File::Copy::Recursive qw(dircopy);

use File::Copy "cp";

use File::stat;

my $VERNUM = "2017-01-19";

# Subroutine prototypes:

sub  parse_cmdline;

sub  usage;

sub  parse_common;

sub  after_parse_common;

sub  parse_reg_template;

sub  parse_template;

sub  after_parse_template;

sub  check_file;

sub  check_inc_file;

sub  check_common_pkg;

sub  check_common_env_pkg;

sub  gen_bfm;

sub  gen_if;

sub  gen_seq_item;

sub  gen_driver;

sub  gen_monitor;

sub  gen_sequencer;

sub  gen_config;

sub  gen_cov;

sub  gen_agent;

sub  gen_env;

sub  gen_seq_lib;

sub  gen_env_seq_lib;

sub  gen_agent_pkg;

sub  gen_top_pkg;

sub  gen_dut_inst;

sub  gen_top;

sub  gen_port_converter;

sub  gen_ref_model;

sub  gen_top_env;

sub  gen_top_config;

sub  gen_top_seq_lib;

sub  gen_top_test;

sub  gen_regmodel_adapter;

sub  gen_regmodel_coverage;

sub  gen_regmodel_seq_lib;

sub  gen_questa_script;

sub  gen_vcs_script;

sub  gen_ius_script;

sub  gen_riviera_script;

sub  gen_compile_file_list;

sub  get_pkg_name;

sub  write_file_header;

# Scalar Variables:

my $agent_has_env;

my $agent_if;

my $agent_item;

my $agent_name;

my $agent_reset;

my $agent_seqr_class;

my $aname;

my $argnum;

my $author;

my $backup;

my $common_pkg;

my $common_pkg_fname;

my $common_env_pkg;

my $common_env_pkg_fname;

my $common_tpl_fname;

my $company;

my $continue_on_warning;

my $copyright;

my $date;

my $dept;

my $dir1;

my $dir2;

my $dir;

my $dual_top;

my $dut_iname;

my $dut_path;

my $dut_pfile;

my $dut_tb_dir;

my $dut_tb_path;

my $dut_top;

my $ele;

my $email;

my $env_clock_list;

my $env_reset_list;

my $field;

my $file_header_inc;

my $flag_dut_source_path;

my $flag_inc_path;

my $flag_project;

my $flag_regmodel_file;

my $flag_x;

my $flag_nopack;

my $comments_at_include_locations;

my $generate_file_header;

my $nested_config_objects;

my $i;

my $inc_file;

my $inc_path;

my $incdir;

my $name;

my $pf;

my $port_decl;

my $project;

my $reg_template;

my $regmodel;

my $regmodel_file;

my $split_transactors;

my $syosil_scoreboard_src_path;

my $top_reg_block_type;

my $tbname;

my $tb_inc_before_run_test;

my $tb_inc_before_run_test_inline;

my $tb_inc_inside_module;

my $tb_inc_inside_inline;

my $tb_generate_run_test;

my $tb_module_name;

my $tb_prepend_to_initial;

my $tb_prepend_to_initial_inline;

my $th_module_name;

my $tel;

my $template_list;

my $template_name;

my $th_generate_clock_and_reset;

my $th_inc_inside_module;

my $th_inc_inside_inline;

my $timeunit;

my $timeprecision;

my $test_generate_methods_inside_class;

my $test_generate_methods_after_class;

my $test_inc_before_class;

my $test_inc_before_inline;

my $test_inc_inside_class;

my $test_inc_inside_inline;

my $test_inc_after_class;

my $test_inc_after_inline;

my $test_prepend_to_build_phase;

my $test_prepend_to_build_phase_inline;

my $test_append_to_build_phase;

my $test_append_to_build_phase_inline;

my $top_env_config_append_to_new;

my $top_env_config_append_to_new_inline;

my $top_env_config_generate_methods_inside_class;

my $top_env_config_generate_methods_after_class;

my $top_default_seq_count;

my $top_env_config_inc_before_class;

my $top_env_config_inc_before_inline;

my $top_env_config_inc_inside_class;

my $top_env_config_inc_inside_inline;

my $top_env_config_inc_after_class;

my $top_env_config_inc_after_inline;

my $top_env_generate_methods_inside_class;

my $top_env_generate_methods_after_class;

my $top_env_generate_end_of_elaboration;

my $top_env_generate_run_phase;

my $top_env_inc_before_class;

my $top_env_inc_before_inline;

my $top_env_inc_inside_class;

my $top_env_inc_inside_inline;

my $top_env_inc_after_class;

my $top_env_inc_after_inline;

my $top_env_prepend_to_build_phase;

my $top_env_prepend_to_build_phase_inline;

my $top_env_append_to_build_phase;

my $top_env_append_to_build_phase_inline;

my $top_env_append_to_connect_phase;

my $top_env_append_to_connect_phase_inline;

my $top_env_append_to_run_phase;

my $top_env_append_to_run_phase_inline;

my $top_seq_inc;

my $top_seq_inc_inline;

my $uvm_cmdline;

my $uvm_reg_addr;

my $uvm_reg_data;

my $uvm_reg_kind;

my $var_decl;

my $year;

my $version;

# Hash Variables

my %agent_adapter_generate_methods_inside_class;

my %agent_adapter_generate_methods_after_class;

my %agent_adapter_inc_before_class;

my %agent_adapter_inc_before_inline;

my %agent_adapter_inc_inside_class;

my %agent_adapter_inc_inside_inline;

my %agent_adapter_inc_after_class;

my %agent_adapter_inc_after_inline;

my %agent_append_to_build_phase;

my %agent_append_to_build_phase_inline;

my %agent_append_to_connect_phase;

my %agent_append_to_connect_phase_inline;

my %agent_checks_enable;

my %agent_config_generate_methods_inside_class;

my %agent_config_generate_methods_after_class;

my %agent_config_inc_before_class;

my %agent_config_inc_before_inline;

my %agent_config_inc_inside_class;

my %agent_config_inc_inside_inline;

my %agent_config_inc_after_class;

my %agent_config_inc_after_inline;

my %agent_copy_config_vars;

my %agent_copy_config_vars_inline;

my %agent_cover_generate_methods_inside_class;

my %agent_cover_generate_methods_after_class;

my %agent_cover_inc;

my %agent_cover_inc_inline;

my %agent_cover_inc_before_class;

my %agent_cover_inc_before_inline;

my %agent_cover_inc_inside_class;

my %agent_cover_inc_inside_inline;

my %agent_cover_inc_after_class;

my %agent_cover_inc_after_inline;

my %agent_coverage_enable;

my %agent_driv_inc;

my %agent_driv_inc_inline;

my %agent_driv_inc_before_class;

my %agent_driv_inc_before_inline;

my %agent_driv_inc_inside_class;

my %agent_driv_inc_inside_inline;

my %agent_driv_inc_after_class;

my %agent_driv_inc_after_inline;

my %agent_env_prepend_to_build_phase;

my %agent_env_prepend_to_build_phase_inline;

my %agent_env_append_to_build_phase;

my %agent_env_append_to_build_phase_inline;

my %agent_env_append_to_connect_phase;

my %agent_env_append_to_connect_phase_inline;

my %agent_env_generate_methods_inside_class;

my %agent_env_generate_methods_after_class;

my %agent_env_inc_before_class;

my %agent_env_inc_before_inline;

my %agent_env_inc_inside_class;

my %agent_env_inc_inside_inline;

my %agent_env_inc_after_class;

my %agent_env_inc_after_inline;

my %agent_env_seq_inc;

my %agent_env_seq_inc_inline;

my %agent_factory_set;

my %agent_generate_methods_inside_class;

my %agent_generate_methods_after_class;

my %agent_is_active;

my %agent_inc_before_class;

my %agent_inc_before_inline;

my %agent_inc_inside_class;

my %agent_inc_inside_inline;

my %agent_inc_after_class;

my %agent_inc_after_inline;

my %agent_inc_inside_bfm;

my %agent_inc_inside_bfm_inline;

my %agent_mon_inc;

my %agent_mon_inc_inline;

my %agent_mon_inc_before_class;

my %agent_mon_inc_before_inline;

my %agent_mon_inc_inside_class;

my %agent_mon_inc_inside_inline;

my %agent_mon_inc_after_class;

my %agent_mon_inc_after_inline;

my %agent_parent;

my %agent_prepend_to_build_phase;

my %agent_prepend_to_build_phase_inline;

my %agent_seq_inc;

my %agent_seq_inc_inline;

my %agent_seqr_inc_before_class;

my %agent_seqr_inc_before_inline;

my %agent_seqr_inc_inside_class;

my %agent_seqr_inc_inside_inline;

my %agent_seqr_inc_after_class;

my %agent_seqr_inc_after_inline;

my %agent_item_types;

my %agent_trans_generate_methods_inside_class;

my %agent_trans_generate_methods_after_class;

my %agent_trans_inc_before_class;

my %agent_trans_inc_before_inline;

my %agent_trans_inc_inside_class;

my %agent_trans_inc_inside_inline;

my %agent_trans_inc_after_class;

my %agent_trans_inc_after_inline;

my %agent_type_by_inst;

my %bus2reg_map;

my %byo_interface;

my %enum_var_types;

my %env_agents;

my %generate_interface_instance;

my %if_inc_inside_interface;

my %if_inc_inside_inline;

my %if_instance_names;    # Used to identify instances in the dut_pfile (the pinlist)

my %number_of_instances;  # Number of instances required of each agent/interface

my %reg_access_block_type;      # Type of uvm_reg_block class containing registers

my %reg_access_instance;  # Object path of uvm_reg_block class containing registers, appended to regmodel. Should be an empty string or start with a dot

my %reg_access_map;       # Instance of map within uvm_reg_block

my %reg_access_mode;      # Register access mode WR WO RO

my %reg_cover_generate_methods_inside_class;

my %reg_cover_generate_methods_after_class;

my %reg_cover_inc;

my %reg_cover_inc_inline;

my %reg_cover_inc_before_class;

my %reg_cover_inc_before_inline;

my %reg_cover_inc_inside_class;

my %reg_cover_inc_inside_inline;

my %reg_cover_inc_after_class;

my %reg_cover_inc_after_inline;

my %ref_model;

my %ref_model_inputs;

my %ref_model_outputs;

my %ref_model_compare_method;

my %ref_model_inc_before_class;

my %ref_model_inc_before_inline;

my %ref_model_inc_inside_class;

my %ref_model_inc_inside_inline;

my %ref_model_inc_after_class;

my %ref_model_inc_after_inline;

my %top_factory_set;

my %tpl_fname;

my %unpacked_bound;

# Array Variables

my @additional_agents;

my @agent_clock_array;

my @agent_instance_names;

my @agent_list;      # Array of all agent names

my @agent_port_array;

my @agent_reset_array;

my @agent_var_array;

my @agent_enum_array;

my @agent_meta_array;

my @agent_var_cnstr_array;

my @all_agent_ifs;   # Array of all interface names, including the _if suffix (not the interface instance names)

my @clist;

my @common_config_var_array;

my @config_var_array;

my @elist;

my @env_list;

my @fields;

my @inc_path_list;

my @list;

my @all_tx_vars;

my @non_local_tx_vars;

my @non_meta_tx_vars;

my @non_reg_env;

my @reg_env;

my @rlist;

my @stand_alone_agents;

my @top_env_agents;

open( LOGFILE, ">easier_uvm_gen.log" );

print LOGFILE "\nEasier UVM Code Generator version ${VERNUM}"

  . " (Send feedback to info\@doulos.com)\n";

set_default_values();

parse_cmdline();

parse_common();

after_parse_common();

deal_with_deprecated_reg_template();

handle_minus_x_flag();

#Only print this message after calling handle_minus_x_flag() in case handle_minus_x_flag() prints out one of the paths and exits the script

print "Easier UVM Code Generator version ${VERNUM}\n";

check_common_pkg($common_pkg_fname) if $common_pkg_fname;

check_common_env_pkg($common_env_pkg_fname) if $common_env_pkg_fname;

create_directories_and_copy_files();

# Process the agent templates (@list created by parse_cmdline)

print LOGFILE "\nParsing Templates ...\n\n";

foreach my $i ( 0 .. @list - 1) {

    if ( $list[$i] ne "" ) {

        $template_name = $list[$i];

        printf LOGFILE "Reading[$i]: $list[$i]\n";

        parse_template();

        after_parse_template();

        # Make the per-agent directories

        $dir = "${project}/tb/${agent_name}";

        printf LOGFILE "dir: $dir\n";

        mkdir( $dir,         0755 );

        mkdir( $dir . "/sv", 0755 );

        print LOGFILE "Writing code to files\n";

        # Create the agent files

        gen_if();

        if ( $split_transactors eq "YES") {

          gen_bfm();

        }

        gen_seq_item();

        gen_config();

        gen_driver();

        gen_monitor();

        gen_sequencer();

        gen_cov();

        gen_agent();

        gen_seq_lib();

        # Do not generate env or env_seq_lib if regmodel used or $agent_has_env = no

        do {

            gen_env();

            gen_env_seq_lib();

        } unless ( exists $reg_access_mode{$agent_name} ) or $agent_has_env eq "NO";

        gen_agent_pkg();

    }

}

if ( $regmodel eq 1 ) {

    gen_regmodel_pkg();

    foreach my $agent ( keys(%reg_access_mode) ) {

        $agent_name = $agent;

        gen_env();

        gen_regmodel_adapter();

        gen_regmodel_coverage();

        gen_regmodel_seq_lib();

    }

}

extra_checking_for_additional_agents();

print LOGFILE "top env agents = @top_env_agents\n";

print LOGFILE "Generating testbench in ${project}/tb\n";

print "Generating testbench in         ${project}/tb\n";

gen_top_config();

gen_port_converter();

foreach my $ref_model_name ( keys(%ref_model) ) {

    gen_ref_model($ref_model_name);

}

gen_top_env();

gen_top_seq_lib();

gen_top_pkg();

gen_top_test();

gen_top();

print "Generating simulator scripts in ${project}/sim\n";

print LOGFILE "Generating simulator scripts in ${project}/sim\n";

deal_with_files_f();

gen_questa_script();

gen_vcs_script();

gen_ius_script();

gen_riviera_script();

print_structure();

print LOGFILE "Code Generation complete\n";

# ---------- Subroutines -------------------------------------------------

sub set_default_values {

    $date       = localtime;

    $project    = "generated_tb";

    $backup     = "yes";

    $version    = "1.0";

    $inc_path   = "include";

    $inc_file   = "";

    $dut_path   = "dut";

    $common_pkg = "";

    $common_pkg_fname     = "";

    $common_env_pkg       = "";

    $common_env_pkg_fname = "";

    $common_tpl_fname     = "common.tpl";

    $agent_name     = "";

    $agent_if       = "";

    $agent_item     = "";

    $dut_iname      = "uut";    #instance name of dut in tb

    $timeunit       = "1ns";

    $timeprecision  = "1ps";

    $regmodel       = 0;

    $dut_top        = "";          #top level dut module

    $dut_pfile      = "pinlist";   #dut port list file

    $uvm_cmdline    = "";

    $top_default_seq_count = undef;

    $env_reset_list = "";

    $env_clock_list = "";

    $tbname         = undef;

    $regmodel_file  = "regmodel.sv";

    $top_reg_block_type  = undef;

    $syosil_scoreboard_src_path = undef;

    $template_name  = "example.tpl";    #default template name

    $template_list  = "";               #default template list

    $reg_template   = undef;

    $dual_top          = "NO";

    $split_transactors = "NO";

}

sub parse_cmdline {

    print LOGFILE "\nParsing cmdline ...\n\n";

    print LOGFILE "num args is " . $#ARGV . "\n";

    if ( $#ARGV == -1 ) { usage(); }    ### no arguments, print help and exit

    ###if ($ARGV[$argnum] =~ m/\s*help/i)

    if ( $ARGV[0] =~ m/\s*(-help|-hel|-he|-h)/i ) {

        usage();

    }

    my $pnum_c = -2;

    my $pnum_r = -2;

    my $pnum_p = -2;

    my $pnum_m = -2;

    my $pnum_s = -2;

    my $pnum_n = -2;

    $continue_on_warning = 0;

    # Searching for -x dut_source_path, -x inc_path, and -x project flag

    foreach $argnum ( 0 .. $#ARGV) {

        if ( $ARGV[$argnum] =~ m/\s*(-x)/i ) {

            if ( $ARGV[ $argnum + 1 ] eq "dut_source_path" ) {

                $flag_x = 1;

                $flag_dut_source_path = 1;

            }

            if ( $ARGV[ $argnum + 1 ] eq "inc_path" ) {

                $flag_x = 1;

                $flag_inc_path = 1;

            }

            if ( $ARGV[ $argnum + 1 ] eq "project" ) {

                $flag_x = 1;

                $flag_project = 1;

            }

            if ( $ARGV[ $argnum + 1 ] eq "regmodel_file" ) {

                $flag_x = 1;

                $flag_regmodel_file = 1;

            }

        }

    }