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[/] [lq057q3dc02/] [trunk/] [design/] [enab_control.vhd] - Blame information for rev 47

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Line No. Rev Author Line
1 30 jwdonal
------------------------------------------------------------------------------
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-- Copyright (C) 2007 Jonathon W. Donaldson
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--                    jwdonal a t opencores DOT org
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--
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--  This program is free software; you can redistribute it and/or modify
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--  it under the terms of the GNU General Public License as published by
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--  the Free Software Foundation; either version 2 of the License, or
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--  (at your option) any later version.
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--
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--  This program is distributed in the hope that it will be useful,
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--  but WITHOUT ANY WARRANTY; without even the implied warranty of
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--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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--  GNU General Public License for more details.
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--
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--  You should have received a copy of the GNU General Public License
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--  along with this program; if not, write to the Free Software
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--  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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--
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------------------------------------------------------------------------------
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--
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-- $Id: enab_control.vhd,v 1.1 2008-11-07 00:48:12 jwdonal Exp $
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--
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-- Description:
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--  This file controls ENAB.  ENAB is dependent upon both HSYNCx, VSYNCx, and
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--  the number of CLK_LCD cycles that have passed.  ENAB "tells" (i.e.
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--  "enables") the shift registers inside the LCD to start accepting data.
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--
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-- Structure:
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--   - xupv2p.ucf
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--   - components.vhd
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--   - lq057q3dc02_tb.vhd
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--   - lq057q3dc02.vhd
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--     - dcm_sys_to_lcd.xaw
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--     - video_controller.vhd
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--       - enab_control.vhd
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--       - hsyncx_control.vhd
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--       - vsyncx_control.vhd
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--       - clk_lcd_cyc_cntr.vhd
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--     - image_gen_bram.vhd
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--       - image_gen_bram_red.xco
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--       - image_gen_bram_green.xco
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--       - image_gen_bram_blue.xco
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--
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------------------------------------------------------------------------------
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--
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-- Naming Conventions:
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--   active low signals                                       "*x"
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--   clock signal                                             "CLK_*"
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--   reset signal                                             "RST"
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--   generic/constant                                         "C_*"
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--   user defined type                                        "TYPE_*"
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--   state machine next state                                 "*_ns"
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--   state machine current state                              "*_cs""
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--   pipelined signals                                        "*_d#"
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--   register delay signals                                   "*_p#"
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--   signal                                                   "*_sig"
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--   variable                                                 "*_var"
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--   storage register                                         "*_reg"
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--   clock enable signals                                     "*_ce"
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--   internal version of output port used as connecting wire  "*_wire"
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--   input/output port                                        "ALL_CAPS"
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--   process                                                  "*_PROC"
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--
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------------------------------------------------------------------------------
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--////////////////////--
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-- LIBRARY INCLUSIONS --
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--////////////////////--
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LIBRARY IEEE;
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USE IEEE.STD_LOGIC_1164.ALL;
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USE IEEE.STD_LOGIC_ARITH.ALL;
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USE IEEE.STD_LOGIC_UNSIGNED.ALL;
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--////////////////////--
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-- ENTITY DECLARATION --
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--////////////////////--
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ENTITY enab_control IS
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  generic (
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    C_VSYNC_TVS,
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    C_CLK_LCD_CYC_NUM_WIDTH,
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    C_ENAB_TEP,
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    C_ENAB_THE : POSITIVE
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  );
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  port (
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    RSTx,
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    CLK_LCD : IN std_logic;
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    CLK_LCD_CYC_NUM : IN std_logic_vector(C_CLK_LCD_CYC_NUM_WIDTH-1 downto 0);
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    ENAB : OUT std_logic
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  );
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END ENTITY enab_control;
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--////////////////////////--
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-- ARCHITECTURE OF ENTITY --
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--////////////////////////--
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ARCHITECTURE enab_control_arch OF enab_control IS
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begin
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  ------------------------------------------------------------------
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  --  Process Description:
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  --    This process enables/disables the ENAB output signal depending
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  --    on the value of the pixel/enab cycle counter and the user-defined
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  --    timing parameters.
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  --  
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  --  Inputs:
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  --    RSTx
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  --    CLK_LCD
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  --  
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  --  Outputs:
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  --    ENAB
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  --
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  --  Notes:
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  --    N/A
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  ------------------------------------------------------------------
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  ENAB_cntrl_PROC : process( RSTx, CLK_LCD )
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  begin
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    if( RSTx = '0' ) then
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      ENAB <= '0';
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    elsif( CLK_LCD'event and CLK_LCD = '1' ) then
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      if( CLK_LCD_CYC_NUM >= (C_ENAB_THE - 1) and --start
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          CLK_LCD_CYC_NUM < (C_ENAB_THE + C_ENAB_TEP - 1) ) then --stop
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        ENAB <= '1'; --active
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      else
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        ENAB <= '0';
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      end if;
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    end if;
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  end process ENAB_cntrl_PROC;
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END ARCHITECTURE enab_control_arch;

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