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https://opencores.org/ocsvn/lwrisc/lwrisc/trunk
[/] [lwrisc/] [trunk/] [SYN/] [rev_1/] [ClaiRISC_core_rm.tcl] - Blame information for rev 19
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| 1 |
9 |
mcupro |
set_global_assignment -name ROOT "|ClaiRISC_core" -remove
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set_global_assignment -name FAMILY -remove
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| 3 |
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set_global_assignment -section_id clk_setting -name DUTY_CYCLE "50.00" -remove
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set_instance_assignment -entity ClaiRISC_core -to clk -name GLOBAL_SIGNAL ON -remove
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| 5 |
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set_instance_assignment -entity ClaiRISC_core -to clk -name USE_CLOCK_SETTINGS clk_setting -remove
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| 6 |
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set_global_assignment -section_id clk_setting -name FMAX_REQUIREMENT "120.7MHZ" -remove
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| 7 |
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set_global_assignment -name TAO_FILE "myresults.tao" -remove
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| 8 |
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set_global_assignment -name SOURCES_PER_DESTINATION_INCLUDE_COUNT "1000" -remove
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| 9 |
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set_global_assignment -name ROUTER_REGISTER_DUPLICATION ON -remove
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| 10 |
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set_global_assignment -name REMOVE_DUPLICATE_LOGIC "OFF" -remove
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| 11 |
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set_global_assignment -name REMOVE_DUPLICATE_REGISTERS "OFF" -remove
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| 12 |
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set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS "ON" -remove
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| 13 |
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set_global_assignment -name EDA_RESYNTHESIS_TOOL "AMPLIFY" -remove
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