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--/**************************************************************************************************************
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--*
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--* L Z R W 1 E N C O D E R C O R E
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--*
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--* A high throughput loss less data compression core.
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--*
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--* Copyright 2012-2013 Lukas Schrittwieser (LS)
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--*
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--* This program is free software: you can redistribute it and/or modify
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--* it under the terms of the GNU General Public License as published by
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--* the Free Software Foundation, either version 2 of the License, or
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--* (at your option) any later version.
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--*
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--* This program is distributed in the hope that it will be useful,
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--* but WITHOUT ANY WARRANTY; without even the implied warranty of
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--* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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--* GNU General Public License for more details.
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--*
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--* You should have received a copy of the GNU General Public License
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--* along with this program; if not, write to the Free Software
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--* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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--* Or see <http://www.gnu.org/licenses/>
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--*
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--***************************************************************************************************************
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--*
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--* Change Log:
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--*
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--* Version 1.0 - 2012/6/30 - LS
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--* started file
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--*
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--* Version 1.0 - 2013/04/05 - LS
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--* release
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--*
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--***************************************************************************************************************
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--*
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--* Naming convention: http://dz.ee.ethz.ch/en/information/hdl-help/vhdl-naming-conventions.html
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--*
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--***************************************************************************************************************
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--*
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--* Encodes the length/distance pair or the literal to the output data stream
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--*
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--***************************************************************************************************************
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library IEEE;
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use IEEE.STD_LOGIC_1164.all;
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use IEEE.NUMERIC_STD.all;
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library UNISIM;
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use UNISIM.VComponents.all;
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entity outputEncoder is
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generic (
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frameSize : integer := 8; -- number of data items per frame
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minMatchLen : integer := 3; -- minimal match length that will be encoded as length/offset pair
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maxMatchLen : integer := 16); -- max allowed value for length (must not be bigger than 16)
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port (
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ClkxCI : in std_logic;
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RstxRI : in std_logic; -- Active high sync reset
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OffsetxDI : in std_logic_vector(11 downto 0); -- stream history offset for matches
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MatchLengthxDI : in integer range 0 to maxMatchLen; -- stream match length in bytes
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EnxSI : in std_logic; -- Process input data if high
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EndOfDataxSI : in std_logic; -- flushes internal buffers and creates an end-of-data symbol
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LiteralxDI : in std_logic_vector(7 downto 0); -- literal byte from the data stream to be encoded (needed if there was no match)
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BodyStrobexSO : out std_logic; -- strobe signal: is assert when a new item is available
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BodyOutxDO : out std_logic_vector(7 downto 0); -- encoded data output
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HeaderStrobexSO : out std_logic;
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HeaderOutxDO : out std_logic_vector(frameSize-1 downto 0);
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DonexSO : out std_logic); -- indicates that the end of data symbol has been created
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end outputEncoder;
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architecture Behavorial of outputEncoder is
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signal suppressCntxDN, suppressCntxDP : integer range 0 to maxMatchLen := 0; -- data output supression for bytes that have already been encoded
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signal FlagBytexDN, FlagBytexDP : std_logic_vector(frameSize-1 downto 0); -- stores the literal / pair flags for 8 output bytes
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signal FlagCntxDN, FlagCntxDP : integer range 0 to frameSize := 0; -- number of bytes in the output buffer
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signal HeaderStrobexSN, HeaderStrobexSP : std_logic := '0';
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signal DonexSN, DonexSP : std_logic := '0';
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signal suppressBytexS : std_logic := '0';
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signal EncodeAsPairxS : std_logic := '0'; -- signals that this match will be encoded as offset/length pair
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signal PairxD : std_logic_vector(15 downto 0); -- offset/length pair represented in two bytes
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-- type outputBufferType is array (frameSize downto 0) of std_logic_vector(7 downto 0); -- one more byte to store the overflow byte if we have a pair
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-- signal OutBufxDN, OutBufxDP : outputBufferType := (others => (others => '0')); -- buffer to assemble compressed data blocks
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signal OutBufInxD : std_logic_vector(7 downto 0); -- input byte for output buffer
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signal ShiftOutBufxS : std_logic;
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signal OverflowBufxDN, OverflowBufxDP : std_logic_vector(7 downto 0);
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signal OvfValidxSN, OvfValidxSP : std_logic;
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--signal FlushxSN, FlushxSP : std_logic; -- indicates that buffers should be flushed (end of data processing)
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signal EndOfDataxSN, EndOfDataxSP : std_logic := '0'; -- set when an end of data condition is detected
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begin -- Behavorial
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-- every match that is long enough will be encoded as offset/length pair
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EncodeAsPairxS <= '1' when MatchLengthxDI >= minMatchLen or EndOfDataxSI = '1' else '0';
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process (EndOfDataxSI, MatchLengthxDI, OffsetxDI)
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begin -- process
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PairxD <= std_logic_vector(to_unsigned(MatchLengthxDI-1, 4)) & OffsetxDI;
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end process;
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-- purpose: implements an output data suppress counter for bytes which have already been encoded in a previous match
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suppressCntPrcs : process (EncodeAsPairxS, EnxSI, MatchLengthxDI,
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suppressCntxDP)
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begin -- process suppressCntPrcs
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suppressCntxDN <= suppressCntxDP; -- default: do nothing
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suppressBytexS <= '0';
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if EnxSI = '1' then
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if suppressCntxDP > 0 then
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-- this byte has already been encoded -> suppress it
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suppressBytexS <= '1';
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suppressCntxDN <= suppressCntxDP - 1;
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else
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-- check if have to reload the counter
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if EncodeAsPairxS = '1' then
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suppressCntxDN <= MatchLengthxDI - 1; -- -1 because this one byte is processed now, we suppress (discard) the next length-1 bytes
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end if;
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end if;
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end if;
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end process suppressCntPrcs;
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bufCntPrcs : process (DonexSP, EncodeAsPairxS, EndOfDataxSI, EndOfDataxSP,
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EnxSI, FlagBytexDP, FlagCntxDP, LiteralxDI,
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OverflowBufxDP, OvfValidxSP, PairxD, suppressBytexS)
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begin -- process bufCntPrcs
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OutBufInxD <= (others => '-'); -- use - to improve optimization
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OverflowBufxDN <= OverflowBufxDP;
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FlagBytexDN <= FlagBytexDP;
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OvfValidxSN <= '0';
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ShiftOutBufxS <= '0';
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FlagCntxDN <= FlagCntxDP;
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HeaderStrobexSN <= '0';
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DonexSN <= DonexSP;
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EndOfDataxSN <= EndOfDataxSP or EndOfDataxSI; -- remember an end-of-data condition
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if EnxSI = '1' and suppressBytexS = '0' and EndOfDataxSP = '0' then
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ShiftOutBufxS <= '1';
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if EncodeAsPairxS = '1' then
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-- we encode data as a pair, this means we have two bytes
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OverflowBufxDN <= PairxD(7 downto 0); -- save second byte in overflow buffer
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OutBufInxD <= PairxD(15 downto 8); -- big endian encoding
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FlagBytexDN(FlagCntxDP) <= '1'; -- mark bytes as offset/length pair
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OvfValidxSN <= '1'; -- mark that we have a byte in the overflow buffer
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-- note: we don't check for end of frame here as the frame isn't over
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-- now (there is a second byte in the overflow buffer)
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else
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-- encode data as literal
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OutBufInxD <= LiteralxDI;
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FlagBytexDN(FlagCntxDP) <= '0';
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-- check for end of frame
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if FlagCntxDP = frameSize-1 then
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FlagCntxDN <= 0;
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HeaderStrobexSN <= '1';
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else
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FlagCntxDN <= FlagCntxDP + 1;
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end if;
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end if;
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end if;
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if OvfValidxSP = '1' then -- this is ok, as we can not have two pairs on consecutive clock cycles (one pair encodes >= 3 bytes)
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-- copy byte from overflow buffer into output shift register
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OutBufInxD <= OverflowBufxDP;
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ShiftOutBufxS <= '1';
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-- check for the end of a frame
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if FlagCntxDP = frameSize-1 then
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FlagCntxDN <= 0;
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HeaderStrobexSN <= '1';
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else
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FlagCntxDN <= FlagCntxDP + 1;
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end if;
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if EndOfDataxSP = '1' then
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-- this is the very last byte in the stream
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HeaderStrobexSN <= '1'; -- send the last header byte(s)
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EndOfDataxSN <= '0'; -- transmission of end of data flag is done
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DonexSN <= '1';
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end if;
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end if;
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if EndOfDataxSP = '1' and OvfValidxSP = '0' and EnxSI = '0' then
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-- an end of data was requested, insert the eof symbol (length/offset pair with a length of zero)
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OverflowBufxDN <= x"00";
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OvfValidxSN <= '1';
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FlagBytexDN(FlagCntxDP) <= '1';
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OutBufInxD <= x"00";
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ShiftOutBufxS <= '1';
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end if;
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end process bufCntPrcs;
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BodyOutxDO <= OutBufInxD;
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BodyStrobexSO <= ShiftOutBufxS;
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HeaderOutxDO <= FlagBytexDP;
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HeaderStrobexSO <= HeaderStrobexSP;
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DonexSO <= DonexSP;
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-- purpose: implements the flip flops
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-- type : sequential
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regs : process (ClkxCI)
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begin -- process regs
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if ClkxCI'event and ClkxCI = '1' then -- rising clock edge
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if RstxRI = '1' then
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suppressCntxDP <= 0;
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FlagCntxDP <= 0;
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OvfValidxSP <= '0';
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OverflowBufxDP <= (others => '0');
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EndOfDataxSP <= '0';
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FlagBytexDP <= (others => '0');
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HeaderStrobexSP <= '0';
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DonexSP <= '0';
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else
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suppressCntxDP <= suppressCntxDN;
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FlagCntxDP <= FlagCntxDN;
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OvfValidxSP <= OvfValidxSN;
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OverflowBufxDP <= OverflowBufxDN;
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EndOfDataxSP <= EndOfDataxSN;
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FlagBytexDP <= FlagBytexDN;
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HeaderStrobexSP <= HeaderStrobexSN;
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DonexSP <= DonexSN;
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end if;
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end if;
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end process regs;
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end Behavorial;
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