OpenCores
URL https://opencores.org/ocsvn/m1_core/m1_core/trunk

Subversion Repositories m1_core

[/] [m1_core/] [tags/] [first/] [tests/] [add.dump] - Blame information for rev 57

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 fafa1971
 
2
add.bin:     file format elf32-tradlittlemips
3
 
4
Disassembly of section .text:
5
 
6
00000000 :
7
   0:   23bd0400        addi    sp,sp,1024
8
   4:   3c1fdead        lui     ra,0xdead
9
   8:   37ffbeef        ori     ra,ra,0xbeef
10
   c:   00000000        nop
11
 
12
00000010 
:
13
  10:   27bdffe0        addiu   sp,sp,-32
14
  14:   afbe0018        sw      s8,24(sp)
15
  18:   03a0f021        move    s8,sp
16
  1c:   24020005        li      v0,5
17
  20:   afc20010        sw      v0,16(s8)
18
  24:   24020007        li      v0,7
19
  28:   afc2000c        sw      v0,12(s8)
20
  2c:   8fc30010        lw      v1,16(s8)
21
  30:   8fc2000c        lw      v0,12(s8)
22
  34:   00000000        nop
23
  38:   00621021        addu    v0,v1,v0
24
  3c:   afc20008        sw      v0,8(s8)
25
  40:   00001021        move    v0,zero
26
  44:   03c0e821        move    sp,s8
27
  48:   8fbe0018        lw      s8,24(sp)
28
  4c:   27bd0020        addiu   sp,sp,32
29
  50:   03e00008        jr      ra
30
  54:   00000000        nop
31
  58:   00000000        nop
32
  5c:   00000000        nop

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.