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[/] [m1_core/] [trunk/] [hdl/] [rtl/] [m1_core/] [m1_defs.vh] - Blame information for rev 46

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/*
 * Simply RISC M1 Defines
 */
 
// Useful constants
`define NOP          32'h00000000
`define BUBBLE       32'hFFFFFFFF
`define BOOT_ADDRESS 32'h00000000  /* could be 32'hBFC00000 */
`define STACK_TOP    32'h00000FF0  /* for 4 KBytes Internal SRAM */
 
// Load/Store size
`define SIZE_BYTE    3'b000
`define SIZE_HALF    3'b001
`define SIZE_WORD    3'b011
`define SIZE_LEFT    3'b100
`define SIZE_RIGHT   3'b101
 
// System Configuration Coprocessor (CP0) registers for TLB-less systems
`define SYSCON_BADVADDR  8
`define SYSCON_STATUS   12
`define SYSCON_CAUSE    13
`define SYSCON_EPC      14
`define SYSCON_PRID     15
 
// Opcodes (ordered by binary value)
`define OPCODE_SPECIAL   6'b000000  // SPECIAL instruction class
`define OPCODE_BCOND     6'b000001  // BCOND instruction class
`define OPCODE_J         6'b000010  // Jump
`define OPCODE_JAL       6'b000011  // Jump and link
`define OPCODE_BEQ       6'b000100  // Branch on equal
`define OPCODE_BNE       6'b000101  // Branch on not equal
`define OPCODE_BLEZ      6'b000110  // Branch on less than or equal to zero
`define OPCODE_BGTZ      6'b000111  // Branch on greater than zero
`define OPCODE_ADDI      6'b001000  // Add immediate
`define OPCODE_ADDIU     6'b001001  // Add immediate unsigned
`define OPCODE_SLTI      6'b001010  // Set on less than immediate
`define OPCODE_SLTIU     6'b001011  // Set on less than immediate unsigned
`define OPCODE_ANDI      6'b001100  // Bitwise AND immediate
`define OPCODE_ORI       6'b001101  // Bitwise OR immediate
`define OPCODE_XORI      6'b001110  // Bitwise XOR immediate
`define OPCODE_LUI       6'b001111  // Load upper immediate
`define OPCODE_COP0      6'b010000  // Coprocessor 0 Operation   TODO
`define OPCODE_COP1      6'b010001  // Coprocessor 1 Operation (optional)
`define OPCODE_COP2      6'b010010  // Coprocessor 2 Operation (optional)
`define OPCODE_COP3      6'b010011  // Coprocessor 3 Operation (optional)
`define OPCODE_LB        6'b100000  // Load byte
`define OPCODE_LH        6'b100001  // Load halfword
`define OPCODE_LWL       6'b100010  // Load word left            TODO
`define OPCODE_LW        6'b100011  // Load word
`define OPCODE_LBU       6'b100100  // Load byte unsigned
`define OPCODE_LHU       6'b100101  // Load halfword unsigned
`define OPCODE_LWR       6'b100110  // Load word right           TODO
`define OPCODE_SB        6'b101000  // Store byte
`define OPCODE_SH        6'b101001  // Store halfword
`define OPCODE_SWL       6'b101010  // Store word left           TODO
`define OPCODE_SW        6'b101011  // Store word
`define OPCODE_SWR       6'b101110  // Store word right          TODO
`define OPCODE_LWC1      6'b110001  // Load word to Coprocessor 1 (optional)
`define OPCODE_LWC2      6'b110010  // Load word to Coprocessor 2 (optional)
`define OPCODE_LWC3      6'b110011  // Load word to Coprocessor 3 (optional)
`define OPCODE_SWC1      6'b111001  // Store word from Coprocessor 1 (optional)
`define OPCODE_SWC2      6'b111010  // Store word from Coprocessor 2 (optional)
`define OPCODE_SWC3      6'b111011  // Store word from Coprocessor 3 (optional)
 
// SPECIAL instruction class functions (ordered by binary value)
`define FUNCTION_SLL     6'b000000  // Shift left logical
`define FUNCTION_SRL     6'b000010  // Shift right logical
`define FUNCTION_SRA     6'b000011  // Shift right arithmetic
`define FUNCTION_SLLV    6'b000100  // Shift left logical variable
`define FUNCTION_SRLV    6'b000110  // Shift right logical variable
`define FUNCTION_SRAV    6'b000111  // Shift right arithmetic variable
`define FUNCTION_JR      6'b001000  // Jump register
`define FUNCTION_JALR    6'b001001  // Jump and link register
`define FUNCTION_SYSCALL 6'b001100  // System call                TODO
`define FUNCTION_BREAK   6'b001101  // Breakpoint                 TODO
`define FUNCTION_MFHI    6'b010000  // Move from HI register      TODO
`define FUNCTION_MTHI    6'b010001  // Move to HI register        TODO
`define FUNCTION_MFLO    6'b010010  // Move from LO register      TODO
`define FUNCTION_MTLO    6'b010011  // Move to LO register        TODO
`define FUNCTION_MULT    6'b011000  // Multiply                   TODO
`define FUNCTION_MULTU   6'b011001  // Multiply unsigned          TODO
`define FUNCTION_DIV     6'b011010  // Divide                     TODO
`define FUNCTION_DIVU    6'b011011  // Divide unsigned            TODO
`define FUNCTION_ADD     6'b100000  // Add
`define FUNCTION_ADDU    6'b100001  // Add unsigned
`define FUNCTION_SUB     6'b100010  // Subtract
`define FUNCTION_SUBU    6'b100011  // Subtract unsigned
`define FUNCTION_AND     6'b100100  // Bitwise AND
`define FUNCTION_OR      6'b100101  // Bitwise OR
`define FUNCTION_XOR     6'b100110  // Bitwise XOR
`define FUNCTION_NOR     6'b100111  // Bitwise NOR
`define FUNCTION_SLT     6'b101010  // Set on less than
`define FUNCTION_SLTU    6'b101011  // Set on less than unsigned
 
// BCOND instruction class rt fields (ordered by binary value)
`define BCOND_BLTZ       5'b00000  // Branch on less than zero
`define BCOND_BGEZ       5'b00001  // Branch on greater than or equal to zero
`define BCOND_BLTZAL     5'b10000  // Branch on less than zero and link
`define BCOND_BGEZAL     5'b10001  // Branch on greater than or equal to zero and link
 
// Coprocessors instruction class rs fields (ordered by binary value)
`define COP_MFCz         5'b00000  // Move from Coprocessor z
`define COP_CFCz         5'b00010  // Copy from Coprocessor z
`define COP_MTCz         5'b00100  // Move to Coprocessor z
`define COP_CTCz         5'b00110  // Copy to Coprocessor z
`define COP_BCOND        5'b01000  // Branch condition for Coprocessor z
 
// ALU operation codes used internally (please note that signed/unsigned is another input)
`define ALU_OP_SLL       5'b00001
`define ALU_OP_SRL       5'b00010
`define ALU_OP_SRA       5'b00011
`define ALU_OP_ADD       5'b00100
`define ALU_OP_SUB       5'b00101
`define ALU_OP_AND       5'b00110
`define ALU_OP_OR        5'b00111
`define ALU_OP_XOR       5'b01000
`define ALU_OP_NOR       5'b01001
`define ALU_OP_SEQ       5'b01010
`define ALU_OP_SNE       5'b01011
`define ALU_OP_SLT       5'b01100
`define ALU_OP_SLE       5'b01101
`define ALU_OP_SGT       5'b01110
`define ALU_OP_SGE       5'b01111
`define ALU_OP_MULT      5'b10000
`define ALU_OP_DIV       5'b10001
 

Line No.	Rev	Author	Line
1	33	fafa1971	`/*`
2			`* Simply RISC M1 Defines`
3			`*/`
4
5			`// Useful constants`
6			`define NOP 32'h00000000
7			`define BUBBLE 32'hFFFFFFFF
8			`define BOOT_ADDRESS 32'h00000000 /* could be 32'hBFC00000 */
9			`define STACK_TOP 32'h00000FF0 /* for 4 KBytes Internal SRAM */
10
11			`// Load/Store size`
12			`define SIZE_BYTE 3'b000
13			`define SIZE_HALF 3'b001
14			`define SIZE_WORD 3'b011
15			`define SIZE_LEFT 3'b100
16			`define SIZE_RIGHT 3'b101
17
18	46	fafa1971	`// System Configuration Coprocessor (CP0) registers for TLB-less systems`
19			`define SYSCON_BADVADDR 8
20			`define SYSCON_STATUS 12
21			`define SYSCON_CAUSE 13
22			`define SYSCON_EPC 14
23			`define SYSCON_PRID 15
24
25	33	fafa1971	`// Opcodes (ordered by binary value)`
26			`define OPCODE_SPECIAL 6'b000000 // SPECIAL instruction class
27			`define OPCODE_BCOND 6'b000001 // BCOND instruction class
28			`define OPCODE_J 6'b000010 // Jump
29			`define OPCODE_JAL 6'b000011 // Jump and link
30			`define OPCODE_BEQ 6'b000100 // Branch on equal
31			`define OPCODE_BNE 6'b000101 // Branch on not equal
32			`define OPCODE_BLEZ 6'b000110 // Branch on less than or equal to zero
33			`define OPCODE_BGTZ 6'b000111 // Branch on greater than zero
34			`define OPCODE_ADDI 6'b001000 // Add immediate
35			`define OPCODE_ADDIU 6'b001001 // Add immediate unsigned
36			`define OPCODE_SLTI 6'b001010 // Set on less than immediate
37			`define OPCODE_SLTIU 6'b001011 // Set on less than immediate unsigned
38			`define OPCODE_ANDI 6'b001100 // Bitwise AND immediate
39			`define OPCODE_ORI 6'b001101 // Bitwise OR immediate
40			`define OPCODE_XORI 6'b001110 // Bitwise XOR immediate
41			`define OPCODE_LUI 6'b001111 // Load upper immediate
42			`define OPCODE_COP0 6'b010000 // Coprocessor 0 Operation TODO
43			`define OPCODE_COP1 6'b010001 // Coprocessor 1 Operation (optional)
44			`define OPCODE_COP2 6'b010010 // Coprocessor 2 Operation (optional)
45			`define OPCODE_COP3 6'b010011 // Coprocessor 3 Operation (optional)
46			`define OPCODE_LB 6'b100000 // Load byte
47			`define OPCODE_LH 6'b100001 // Load halfword
48			`define OPCODE_LWL 6'b100010 // Load word left TODO
49			`define OPCODE_LW 6'b100011 // Load word
50			`define OPCODE_LBU 6'b100100 // Load byte unsigned
51			`define OPCODE_LHU 6'b100101 // Load halfword unsigned
52			`define OPCODE_LWR 6'b100110 // Load word right TODO
53			`define OPCODE_SB 6'b101000 // Store byte
54			`define OPCODE_SH 6'b101001 // Store halfword
55			`define OPCODE_SWL 6'b101010 // Store word left TODO
56			`define OPCODE_SW 6'b101011 // Store word
57			`define OPCODE_SWR 6'b101110 // Store word right TODO
58			`define OPCODE_LWC1 6'b110001 // Load word to Coprocessor 1 (optional)
59			`define OPCODE_LWC2 6'b110010 // Load word to Coprocessor 2 (optional)
60			`define OPCODE_LWC3 6'b110011 // Load word to Coprocessor 3 (optional)
61			`define OPCODE_SWC1 6'b111001 // Store word from Coprocessor 1 (optional)
62			`define OPCODE_SWC2 6'b111010 // Store word from Coprocessor 2 (optional)
63			`define OPCODE_SWC3 6'b111011 // Store word from Coprocessor 3 (optional)
64
65			`// SPECIAL instruction class functions (ordered by binary value)`
66			`define FUNCTION_SLL 6'b000000 // Shift left logical
67			`define FUNCTION_SRL 6'b000010 // Shift right logical
68			`define FUNCTION_SRA 6'b000011 // Shift right arithmetic
69			`define FUNCTION_SLLV 6'b000100 // Shift left logical variable
70			`define FUNCTION_SRLV 6'b000110 // Shift right logical variable
71			`define FUNCTION_SRAV 6'b000111 // Shift right arithmetic variable
72			`define FUNCTION_JR 6'b001000 // Jump register
73			`define FUNCTION_JALR 6'b001001 // Jump and link register
74			`define FUNCTION_SYSCALL 6'b001100 // System call TODO
75			`define FUNCTION_BREAK 6'b001101 // Breakpoint TODO
76			`define FUNCTION_MFHI 6'b010000 // Move from HI register TODO
77			`define FUNCTION_MTHI 6'b010001 // Move to HI register TODO
78			`define FUNCTION_MFLO 6'b010010 // Move from LO register TODO
79			`define FUNCTION_MTLO 6'b010011 // Move to LO register TODO
80			`define FUNCTION_MULT 6'b011000 // Multiply TODO
81			`define FUNCTION_MULTU 6'b011001 // Multiply unsigned TODO
82			`define FUNCTION_DIV 6'b011010 // Divide TODO
83			`define FUNCTION_DIVU 6'b011011 // Divide unsigned TODO
84			`define FUNCTION_ADD 6'b100000 // Add
85			`define FUNCTION_ADDU 6'b100001 // Add unsigned
86			`define FUNCTION_SUB 6'b100010 // Subtract
87			`define FUNCTION_SUBU 6'b100011 // Subtract unsigned
88			`define FUNCTION_AND 6'b100100 // Bitwise AND
89			`define FUNCTION_OR 6'b100101 // Bitwise OR
90			`define FUNCTION_XOR 6'b100110 // Bitwise XOR
91			`define FUNCTION_NOR 6'b100111 // Bitwise NOR
92			`define FUNCTION_SLT 6'b101010 // Set on less than
93			`define FUNCTION_SLTU 6'b101011 // Set on less than unsigned
94
95			`// BCOND instruction class rt fields (ordered by binary value)`
96			`define BCOND_BLTZ 5'b00000 // Branch on less than zero
97			`define BCOND_BGEZ 5'b00001 // Branch on greater than or equal to zero
98			`define BCOND_BLTZAL 5'b10000 // Branch on less than zero and link
99			`define BCOND_BGEZAL 5'b10001 // Branch on greater than or equal to zero and link
100
101			`// Coprocessors instruction class rs fields (ordered by binary value)`
102			`define COP_MFCz 5'b00000 // Move from Coprocessor z
103			`define COP_CFCz 5'b00010 // Copy from Coprocessor z
104			`define COP_MTCz 5'b00100 // Move to Coprocessor z
105			`define COP_CTCz 5'b00110 // Copy to Coprocessor z
106			`define COP_BCOND 5'b01000 // Branch condition for Coprocessor z
107
108			`// ALU operation codes used internally (please note that signed/unsigned is another input)`
109			`define ALU_OP_SLL 5'b00001
110			`define ALU_OP_SRL 5'b00010
111			`define ALU_OP_SRA 5'b00011
112			`define ALU_OP_ADD 5'b00100
113			`define ALU_OP_SUB 5'b00101
114			`define ALU_OP_AND 5'b00110
115			`define ALU_OP_OR 5'b00111
116			`define ALU_OP_XOR 5'b01000
117			`define ALU_OP_NOR 5'b01001
118			`define ALU_OP_SEQ 5'b01010
119			`define ALU_OP_SNE 5'b01011
120			`define ALU_OP_SLT 5'b01100
121			`define ALU_OP_SLE 5'b01101
122			`define ALU_OP_SGT 5'b01110
123			`define ALU_OP_SGE 5'b01111
124			`define ALU_OP_MULT 5'b10000
125			`define ALU_OP_DIV 5'b10001
126

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[/] [m1_core/] [trunk/] [hdl/] [rtl/] [m1_core/] [m1_defs.vh] - Blame information for rev 46