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[/] [m1_core/] [trunk/] [tools/] [bin/] [build_xst] - Blame information for rev 60

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1 2 fafa1971
#!/bin/bash
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3 14 fafa1971
if [ -z "$M1_ROOT" ]; then echo "***ERROR***: M1_ROOT variable is undefined, please set it and run 'source sourceme'."; exit 1; fi
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if ! [ -d "$M1_ROOT" ]; then echo "***ERROR***: directory '$M1_ROOT' does not exist, please check it and run 'source sourceme' again."; exit 1; fi
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6 60 fafa1971
# Make clean
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rm -rf $M1_ROOT/run/synth/xst
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mkdir -p $M1_ROOT/run/synth/xst
9 2 fafa1971
cd $M1_ROOT/run/synth/xst
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11 37 fafa1971
# Set variables
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export DESIGN_TOP="spartan3esk_top"
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export FPGA_DEVICE="xc3s500e-fg320-4"
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export CMDFILE="command.xst"
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export LOGFILE="synth.log"
16 2 fafa1971
 
17 37 fafa1971
# Create command file
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echo "run" > $CMDFILE
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echo "-ifn $FILELIST_XST" >> $CMDFILE
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echo "-ifmt MIXED" >> $CMDFILE
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echo "-ofn $DESIGN_TOP.ngc" >> $CMDFILE
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echo "-ofmt NGC" >> $CMDFILE
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echo "-top $DESIGN_TOP" >> $CMDFILE
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echo "-opt_mode SPEED" >> $CMDFILE
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echo "-opt_level 1" >> $CMDFILE
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echo "-p $FPGA_DEVICE" >> $CMDFILE
27 23 fafa1971
 
28 37 fafa1971
# Run the complete Xilinx flow from synthesis to bitstream
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xst -ifn $CMDFILE -ofn $LOGFILE
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ngdbuild -p $FPGA_DEVICE -uc ${M1_ROOT}/hdl/rtl/${DESIGN_TOP}/${DESIGN_TOP}.ucf ${DESIGN_TOP}.ngc 2>&1 | tee --append ${LOGFILE}
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map -pr b -p $FPGA_DEVICE $DESIGN_TOP 2>&1 | tee --append $LOGFILE
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par -w -ol high $DESIGN_TOP ${DESIGN_TOP}_par.ncd 2>&1 | tee --append $LOGFILE
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trce -v 25 ${DESIGN_TOP}_par.ncd ${DESIGN_TOP}.pcf 2>&1 | tee --append $LOGFILE
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bitgen ${DESIGN_TOP}_par.ncd -l -w ${DESIGN_TOP}.bit 2>&1 | tee --append $LOGFILE
35 23 fafa1971
 
36 37 fafa1971
# Now just use impact to program the device with the bit file... and have fun!!!
37 23 fafa1971
 

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