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[/] [m65c02/] [trunk/] [Src/] [M65C02-Test-Programs/] [Klaus2m5_Functional_Tests/] [65C02_FT.a65] - Blame information for rev 2

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1 2 MichaelA 
;
2 
; 6 5 0 2   F U N C T I O N A L   T E S T
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;
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; Copyright (C) 2012-2013  Klaus Dormann
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;
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; This program is free software: you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation, either version 3 of the License, or
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; (at your option) any later version.
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;
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; This program is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with this program.  If not, see .
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19 
 
20 
; This program is designed to test all opcodes of a 6502 emulator using all
21 
; addressing modes with focus on propper setting of the processor status
22 
; register bits.
23 
;
24 
; version 23-jul-2013
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; contact info at http://2m5.de or email K@2m5.de
26 
;
27 
; assembled with AS65 from http://www.kingswood-consulting.co.uk/assemblers/
28 
; command line switches: -l -m -s2 -w -h0
29 
;                         |  |  |   |  no page headers in listing
30 
;                         |  |  |   wide listing (133 char/col)
31 
;                         |  |  write intel hex file instead of binary
32 
;                         |  expand macros in listing
33 
;                         generate pass2 listing
34 
;
35 
; No IO - should be run from a monitor with access to registers.
36 
; To run load intel hex image with a load command, than alter PC to 400 hex
37 
; (code_segment) and enter a go command.
38 
; Loop on program counter determines error or successful completion of test.
39 
; Check listing for relevant traps (jump/branch *).
40 
; Please note that in early tests some instructions will have to be used before
41 
; they are actually tested!
42 
;
43 
; RESET, NMI or IRQ should not occur and will be trapped if vectors are enabled.
44 
; Tests documented behavior of the original NMOS 6502 only! No unofficial
45 
; opcodes. Additional opcodes of newer versions of the CPU (65C02, 65816) will
46 
; not be tested. Decimal ops will only be tested with valid BCD operands and
47 
; N V Z flags will be ignored.
48 
;
49 
; Debugging hints:
50 
;     Most of the code is written sequentially. if you hit a trap, check the
51 
;   immediately preceeding code for the instruction to be tested. Results are
52 
;   tested first, flags are checked second by pushing them onto the stack and
53 
;   pulling them to the accumulator after the result was checked. The "real"
54 
;   flags are no longer valid for the tested instruction at this time!
55 
;     If the tested instruction was indexed, the relevant index (X or Y) must
56 
;   also be checked. Opposed to the flags, X and Y registers are still valid.
57 
;
58 
; versions:
59 
;   28-jul-2012  1st version distributed for testing
60 
;   29-jul-2012  fixed references to location 0, now #0
61 
;                added license - GPLv3
62 
;   30-jul-2012  added configuration options
63 
;   01-aug-2012  added trap macro to allow user to change error handling
64 
;   01-dec-2012  fixed trap in branch field must be a branch
65 
;   02-mar-2013  fixed PLA flags not tested
66 
;   19-jul-2013  allowed ROM vectors to be loaded when load_data_direct = 0
67 
;                added test sequence check to detect if tests jump their fence
68 
;   23-jul-2013  added RAM integrity check
69 
;
70 
;   30-Aug-2013  Modified by Michael A. Morris to allow selection of tests
71 
;
72 
; C O N F I G U R A T I O N
73 
;
74 
;ROM_vectors writable (0=no, 1=yes)
75 
;if ROM vectors can not be used interrupts will not be trapped
76 
;as a consequence BRK can not be tested but will be emulated to test RTI
77 
ROM_vectors = 1
78 
;load_data_direct (0=move from code segment, 1=load directly)
79 
;loading directly is preferred but may not be supported by your platform
80 
;0 produces only consecutive object code, 1 is not suitable for a binary image
81 
load_data_direct = 1
82 
;I_flag behavior (0=force enabled, 1=force disabled, 2=prohibit change, 3=allow
83 
;change) 2 requires extra code and is not recommended. SEI & CLI can only be
84 
;tested if you allow changing the interrupt status (I_flag = 3)
85 
I_flag = 3
86 
;configure memory - try to stay away from memory used by the system
87 
;zero_page memory start address, $50 (80) consecutive Bytes required
88 
;                                add 2 if I_flag = 2
89 
zero_page = $a
90 
;data_segment memory start address, $5B (91) consecutive Bytes required
91 
data_segment = $200
92 
    if (data_segment & $ff) != 0
93 
        ERROR ERROR ERROR low byte of data_segment MUST be $00 !!
94 
    endif
95 
;code_segment memory start address, 13kB of consecutive space required
96 
;                                   add 2.5 kB if I_flag = 2
97 
;parts of the code are self modifying and must reside in RAM
98 
code_segment = $400
99 
;RAM integrity test option. Checks for undesired RAM writes.
100 
;set lowest non RAM or RAM mirror address page (-1=disable, 0=64k, $40=16k)
101 
;leave disabled if a monitor, OS or background interrupt is allowed to alter RAM
102 
ram_top = -1
103 
;
104 
;Skip to ADC/SBC tests
105 
;
106 
skip_part_1  = 0
107 
;
108 
;Skip Binary or Decimal mode ADC/SBC instruction tests
109 
;
110 
skip_bin_test = 1
111 
skip_dec_test = 0
112 
 
113 
        noopt       ;do not take shortcuts
114 
 
115 
;macros for error & success traps to allow user modification
116 
;example:
117 
;trap    macro
118 
;        jsr my_error_handler
119 
;        endm
120 
;trap_eq macro
121 
;        bne skip\?
122 
;        trap           ;failed equal (zero)
123 
;skip\?
124 
;        endm
125 
;
126 
; my_error_handler should pop the calling address from the stack and report it.
127 
; putting larger portions of code (more than 3 bytes) inside the trap macro
128 
; may lead to branch range problems for some tests.
129 
trap    macro
130 
        jmp *           ;failed anyway
131 
        endm
132 
trap_eq macro
133 
        beq *           ;failed equal (zero)
134 
        endm
135 
trap_ne macro
136 
        bne *           ;failed not equal (non zero)
137 
        endm
138 
trap_cs macro
139 
        bcs *           ;failed carry set
140 
        endm
141 
trap_cc macro
142 
        bcc *           ;failed carry clear
143 
        endm
144 
trap_mi macro
145 
        bmi *           ;failed minus (bit 7 set)
146 
        endm
147 
trap_pl macro
148 
        bpl *           ;failed plus (bit 7 clear)
149 
        endm
150 
trap_vs macro
151 
        bvs *           ;failed overflow set
152 
        endm
153 
trap_vc macro
154 
        bvc *           ;failed overflow clear
155 
        endm
156 
success macro
157 
        jmp *           ;test passed, no errors
158 
        endm
159 
 
160 
 
161 
carry   equ %00000001   ;flag bits in status
162 
zero    equ %00000010
163 
intdis  equ %00000100
164 
decmode equ %00001000
165 
break   equ %00010000
166 
reserv  equ %00100000
167 
overfl  equ %01000000
168 
minus   equ %10000000
169 
 
170 
fc      equ carry
171 
fz      equ zero
172 
fzc     equ carry+zero
173 
fv      equ overfl
174 
fvz     equ overfl+zero
175 
fn      equ minus
176 
fnc     equ minus+carry
177 
fnz     equ minus+zero
178 
fnzc    equ minus+zero+carry
179 
fnv     equ minus+overfl
180 
 
181 
fao     equ break+reserv    ;bits always on after PHP, BRK
182 
fai     equ fao+intdis      ;+ forced interrupt disable
183 
m8      equ $ff             ;8 bit mask
184 
m8i     equ $ff&~intdis     ;8 bit mask - interrupt disable
185 
 
186 
;macros to allow masking of status bits.
187 
;masking of interrupt enable/disable on load and compare
188 
;masking of always on bits after PHP or BRK (unused & break) on compare
189 
        if I_flag = 0
190 
load_flag   macro
191 
            lda #\1&m8i         ;force enable interrupts (mask I)
192 
            endm
193 
cmp_flag    macro
194 
            cmp #(\1|fao)&m8i   ;I_flag is always enabled + always on bits
195 
            endm
196 
eor_flag    macro
197 
            eor #(\1&m8i|fao)   ;mask I, invert expected flags + always on bits
198 
            endm
199 
        endif
200 
        if I_flag = 1
201 
load_flag   macro
202 
            lda #\1|intdis      ;force disable interrupts
203 
            endm
204 
cmp_flag    macro
205 
            cmp #(\1|fai)&m8    ;I_flag is always disabled + always on bits
206 
            endm
207 
eor_flag    macro
208 
            eor #(\1|fai)       ;invert expected flags + always on bits + I
209 
            endm
210 
        endif
211 
        if I_flag = 2
212 
load_flag   macro
213 
            lda #\1
214 
            ora flag_I_on       ;restore I-flag
215 
            and flag_I_off
216 
            endm
217 
cmp_flag    macro
218 
            eor flag_I_on       ;I_flag is never changed
219 
            cmp #(\1|fao)&m8i   ;expected flags + always on bits, mask I
220 
            endm
221 
eor_flag    macro
222 
            eor flag_I_on       ;I_flag is never changed
223 
            eor #(\1&m8i|fao)   ;mask I, invert expected flags + always on bits
224 
            endm
225 
        endif
226 
        if I_flag = 3
227 
load_flag   macro
228 
            lda #\1             ;allow test to change I-flag (no mask)
229 
            endm
230 
cmp_flag    macro
231 
            cmp #(\1|fao)&m8    ;expected flags + always on bits
232 
            endm
233 
eor_flag    macro
234 
            eor #\1|fao         ;invert expected flags + always on bits
235 
            endm
236 
        endif
237 
 
238 
;macros to set (register|memory|zeropage) & status
239 
set_stat    macro       ;setting flags in the processor status register
240 
            load_flag \1
241 
            pha         ;use stack to load status
242 
            plp
243 
            endm
244 
 
245 
set_a       macro       ;precharging accu & status
246 
            load_flag \2
247 
            pha         ;use stack to load status
248 
            lda #\1     ;precharge accu
249 
            plp
250 
            endm
251 
 
252 
set_x       macro       ;precharging index & status
253 
            load_flag \2
254 
            pha         ;use stack to load status
255 
            ldx #\1     ;precharge index x
256 
            plp
257 
            endm
258 
 
259 
set_y       macro       ;precharging index & status
260 
            load_flag \2
261 
            pha         ;use stack to load status
262 
            ldy #\1     ;precharge index y
263 
            plp
264 
            endm
265 
 
266 
set_ax      macro       ;precharging indexed accu & immediate status
267 
            load_flag \2
268 
            pha         ;use stack to load status
269 
            lda \1,x    ;precharge accu
270 
            plp
271 
            endm
272 
 
273 
set_ay      macro       ;precharging indexed accu & immediate status
274 
            load_flag \2
275 
            pha         ;use stack to load status
276 
            lda \1,y    ;precharge accu
277 
            plp
278 
            endm
279 
 
280 
set_z       macro       ;precharging indexed zp & immediate status
281 
            load_flag \2
282 
            pha         ;use stack to load status
283 
            lda \1,x    ;load to zeropage
284 
            sta zpt
285 
            plp
286 
            endm
287 
 
288 
set_zx      macro       ;precharging zp,x & immediate status
289 
            load_flag \2
290 
            pha         ;use stack to load status
291 
            lda \1,x    ;load to indexed zeropage
292 
            sta zpt,x
293 
            plp
294 
            endm
295 
 
296 
set_abs     macro       ;precharging indexed memory & immediate status
297 
            load_flag \2
298 
            pha         ;use stack to load status
299 
            lda \1,x    ;load to memory
300 
            sta abst
301 
            plp
302 
            endm
303 
 
304 
set_absx    macro       ;precharging abs,x & immediate status
305 
            load_flag \2
306 
            pha         ;use stack to load status
307 
            lda \1,x    ;load to indexed memory
308 
            sta abst,x
309 
            plp
310 
            endm
311 
 
312 
;macros to test (register|memory|zeropage) & status & (mask)
313 
tst_stat    macro       ;testing flags in the processor status register
314 
            php         ;save status
315 
            php         ;use stack to retrieve status
316 
            pla
317 
            cmp_flag \1
318 
            trap_ne
319 
            plp         ;restore status
320 
            endm
321 
 
322 
tst_a       macro       ;testing result in accu & flags
323 
            php         ;save flags
324 
            php
325 
            cmp #\1     ;test result
326 
            trap_ne
327 
            pla         ;load status
328 
            cmp_flag \2
329 
            trap_ne
330 
            plp         ;restore status
331 
            endm
332 
 
333 
tst_x       macro       ;testing result in x index & flags
334 
            php         ;save flags
335 
            php
336 
            cpx #\1     ;test result
337 
            trap_ne
338 
            pla         ;load status
339 
            cmp_flag \2
340 
            trap_ne
341 
            plp         ;restore status
342 
            endm
343 
 
344 
tst_y       macro       ;testing result in y index & flags
345 
            php         ;save flags
346 
            php
347 
            cpy #\1     ;test result
348 
            trap_ne
349 
            pla         ;load status
350 
            cmp_flag \2
351 
            trap_ne
352 
            plp         ;restore status
353 
            endm
354 
 
355 
tst_ax      macro       ;indexed testing result in accu & flags
356 
            php         ;save flags
357 
            cmp \1,x    ;test result
358 
            trap_ne
359 
            pla         ;load status
360 
            eor_flag \3
361 
            cmp \2,x    ;test flags
362 
            trap_ne     ;
363 
            endm
364 
 
365 
tst_ay      macro       ;indexed testing result in accu & flags
366 
            php         ;save flags
367 
            cmp \1,y    ;test result
368 
            trap_ne     ;
369 
            pla         ;load status
370 
            eor_flag \3
371 
            cmp \2,y    ;test flags
372 
            trap_ne
373 
            endm
374 
 
375 
tst_z       macro       ;indexed testing result in zp & flags
376 
            php         ;save flags
377 
            lda zpt
378 
            cmp \1,x    ;test result
379 
            trap_ne
380 
            pla         ;load status
381 
            eor_flag \3
382 
            cmp \2,x    ;test flags
383 
            trap_ne
384 
            endm
385 
 
386 
tst_zx      macro       ;testing result in zp,x & flags
387 
            php         ;save flags
388 
            lda zpt,x
389 
            cmp \1,x    ;test result
390 
            trap_ne
391 
            pla         ;load status
392 
            eor_flag \3
393 
            cmp \2,x    ;test flags
394 
            trap_ne
395 
            endm
396 
 
397 
tst_abs     macro       ;indexed testing result in memory & flags
398 
            php         ;save flags
399 
            lda abst
400 
            cmp \1,x    ;test result
401 
            trap_ne
402 
            pla         ;load status
403 
            eor_flag \3
404 
            cmp \2,x    ;test flags
405 
            trap_ne
406 
            endm
407 
 
408 
tst_absx    macro       ;testing result in abs,x & flags
409 
            php         ;save flags
410 
            lda abst,x
411 
            cmp \1,x    ;test result
412 
            trap_ne
413 
            pla         ;load status
414 
            eor_flag \3
415 
            cmp \2,x    ;test flags
416 
            trap_ne
417 
            endm
418 
 
419 
; RAM integrity test
420 
;   verifies that none of the previous tests has altered RAM outside of the
421 
;   designated write areas.
422 
;   uses zpt word as indirect pointer, zpt+2 word as checksum
423 
        if ram_top > -1
424 
check_ram   macro
425 
            cld
426 
            lda #0
427 
            sta zpt         ;set low byte of indirect pointer
428 
            sta zpt+3       ;checksum high byte
429 
            sta range_adr   ;reset self modifying code
430 
            sta tandi1
431 
            sta tandi2
432 
            sta teori1
433 
            sta teori2
434 
            sta torai1
435 
            sta torai2
436 
            sta chkdadi
437 
            sta chkdsbi
438 
            sta chkadi
439 
            sta chksbi
440 
            clc
441 
            ldx #zp_bss-zero_page ;zeropage - write test area
442 
ccs3\?      adc zero_page,x
443 
            bcc ccs2\?
444 
            inc zpt+3       ;carry to high byte
445 
            clc
446 
ccs2\?      inx
447 
            bne ccs3\?
448 
            ldx #hi(data_segment) ;set high byte of indirect pointer
449 
            stx zpt+1
450 
            ldy #lo(data_bss) ;data after write test area
451 
ccs5\?      adc (zpt),y
452 
            bcc ccs4\?
453 
            inc zpt+3       ;carry to high byte
454 
            clc
455 
ccs4\?      iny
456 
            bne ccs5\?
457 
            inx             ;advance RAM high address
458 
            stx zpt+1
459 
            cpx #ram_top
460 
            bne ccs5\?
461 
            sta zpt+2       ;checksum low is
462 
            cmp ram_chksm   ;checksum low expected
463 
            trap_ne         ;checksum mismatch
464 
            lda zpt+3       ;checksum high is
465 
            cmp ram_chksm+1 ;checksum high expected
466 
            trap_ne         ;checksum mismatch
467 
            endm
468 
        else
469 
check_ram   macro
470 
            ;RAM check disabled - RAM size not set
471 
            endm
472 
        endif
473 
 
474 
next_test   macro           ;make sure, tests don't jump the fence
475 
            lda test_case   ;previous test
476 
            cmp #test_num
477 
            trap_ne         ;test is out of sequence
478 
test_num = test_num + 1
479 
            lda #test_num   ;*** this tests' number
480 
            sta test_case
481 
            ;check_ram       ;uncomment to find altered RAM after each test
482 
            endm
483 
 
484 
    if load_data_direct = 1
485 
        data
486 
    else
487 
        bss                 ;uninitialized segment, copy of data at end of code!
488 
    endif
489 
;
490 
;        org zero_page
491 
        org 0
492 
        ds  zero_page
493 
;break test interrupt save
494 
irq_a   ds  1               ;a register
495 
irq_x   ds  1               ;x register
496 
    if I_flag = 2
497 
;masking for I bit in status
498 
flag_I_on   ds  1           ;or mask to load flags
499 
flag_I_off  ds  1           ;and mask to load flags
500 
    endif
501 
zpt                         ;5 bytes store/modify test area
502 
;add/subtract operand generation and result/flag prediction
503 
adfc    ds  1               ;carry flag before op
504 
ad1     ds  1               ;operand 1 - accumulator
505 
ad2     ds  1               ;operand 2 - memory / immediate
506 
adrl    ds  1               ;expected result bits 0-7
507 
adrh    ds  1               ;expected result bit 8 (carry)
508 
adrf    ds  1               ;expected flags NV0000ZC (-V in decimal mode)
509 
sb2     ds  1               ;operand 2 complemented for subtract
510 
zp_bss
511 
zp1     db  $c3,$82,$41,0   ;test patterns for LDx BIT ROL ROR ASL LSR
512 
zp7f    db  $7f             ;test pattern for compare
513 
;logical zeropage operands
514 
zpOR    db  0,$1f,$71,$80   ;test pattern for OR
515 
zpAN    db  $0f,$ff,$7f,$80 ;test pattern for AND
516 
zpEO    db  $ff,$0f,$8f,$8f ;test pattern for EOR
517 
;indirect addressing pointers
518 
ind1    dw  abs1            ;indirect pointer to pattern in absolute memory
519 
        dw  abs1+1
520 
        dw  abs1+2
521 
        dw  abs1+3
522 
        dw  abs7f
523 
inw1    dw  abs1-$f8        ;indirect pointer for wrap-test pattern
524 
indt    dw  abst            ;indirect pointer to store area in absolute memory
525 
        dw  abst+1
526 
        dw  abst+2
527 
        dw  abst+3
528 
inwt    dw  abst-$f8        ;indirect pointer for wrap-test store
529 
indAN   dw  absAN           ;indirect pointer to AND pattern in absolute memory
530 
        dw  absAN+1
531 
        dw  absAN+2
532 
        dw  absAN+3
533 
indEO   dw  absEO           ;indirect pointer to EOR pattern in absolute memory
534 
        dw  absEO+1
535 
        dw  absEO+2
536 
        dw  absEO+3
537 
indOR   dw  absOR           ;indirect pointer to OR pattern in absolute memory
538 
        dw  absOR+1
539 
        dw  absOR+2
540 
        dw  absOR+3
541 
;add/subtract indirect pointers
542 
adi2    dw  ada2            ;indirect pointer to operand 2 in absolute memory
543 
sbi2    dw  sba2            ;indirect pointer to complemented operand 2 (SBC)
544 
adiy2   dw  ada2-$ff        ;with offset for indirect indexed
545 
sbiy2   dw  sba2-$ff
546 
zp_bss_end
547 
 
548 
        org data_segment
549 
test_case   ds  1           ;current test number
550 
ram_chksm   ds  2           ;checksum for RAM integrity test
551 
;add/subtract operand copy - abs tests write area
552 
abst                        ;5 bytes store/modify test area
553 
ada2    ds  1               ;operand 2
554 
sba2    ds  1               ;operand 2 complemented for subtract
555 
        ds  3               ;fill remaining bytes
556 
data_bss
557 
abs1    db  $c3,$82,$41,0   ;test patterns for LDx BIT ROL ROR ASL LSR
558 
abs7f   db  $7f             ;test pattern for compare
559 
;loads
560 
fLDx    db  fn,fn,0,fz      ;expected flags for load
561 
;shifts
562 
rASL                        ;expected result ASL & ROL -carry
563 
rROL    db  $86,$04,$82,0   ; "
564 
rROLc   db  $87,$05,$83,1   ;expected result ROL +carry
565 
rLSR                        ;expected result LSR & ROR -carry
566 
rROR    db  $61,$41,$20,0   ; "
567 
rRORc   db  $e1,$c1,$a0,$80 ;expected result ROR +carry
568 
fASL                        ;expected flags for shifts
569 
fROL    db  fnc,fc,fn,fz    ;no carry in
570 
fROLc   db  fnc,fc,fn,0     ;carry in
571 
fLSR
572 
fROR    db  fc,0,fc,fz      ;no carry in
573 
fRORc   db  fnc,fn,fnc,fn   ;carry in
574 
;increments (decrements)
575 
rINC    db  $7f,$80,$ff,0,1 ;expected result for INC/DEC
576 
fINC    db  0,fn,fn,fz,0    ;expected flags for INC/DEC
577 
;logical memory operand
578 
absOR   db  0,$1f,$71,$80   ;test pattern for OR
579 
absAN   db  $0f,$ff,$7f,$80 ;test pattern for AND
580 
absEO   db  $ff,$0f,$8f,$8f ;test pattern for EOR
581 
;logical accu operand
582 
absORa  db  0,$f1,$1f,0     ;test pattern for OR
583 
absANa  db  $f0,$ff,$ff,$ff ;test pattern for AND
584 
absEOa  db  $ff,$f0,$f0,$0f ;test pattern for EOR
585 
;logical results
586 
absrlo  db  0,$ff,$7f,$80
587 
absflo  db  fz,fn,0,fn
588 
data_bss_end
589 
 
590 
 
591 
        code
592 
        org code_segment
593 
start   cld
594 
        lda #0          ;*** test 0 = initialize
595 
        sta test_case
596 
test_num = 0
597 
 
598 
;stop interrupts before initializing BSS
599 
    if I_flag = 1
600 
        sei
601 
    endif
602 
 
603 
;initialize BSS segment
604 
    if load_data_direct != 1
605 
        ldx #zp_end-zp_init-1
606 
ld_zp   lda zp_init,x
607 
        sta zp_bss,x
608 
        dex
609 
        bpl ld_zp
610 
        ldx #data_end-data_init-1
611 
ld_data lda data_init,x
612 
        sta data_bss,x
613 
        dex
614 
        bpl ld_data
615 
      if ROM_vectors = 1
616 
        ldx #5
617 
ld_vect lda vec_init,x
618 
        sta vec_bss,x
619 
        dex
620 
        bpl ld_vect
621 
      endif
622 
    endif
623 
 
624 
;retain status of interrupt flag
625 
    if I_flag = 2
626 
        php
627 
        pla
628 
        and #4          ;isolate flag
629 
        sta flag_I_on   ;or mask
630 
        eor #lo(~4)     ;reverse
631 
        sta flag_I_off  ;and mask
632 
    endif
633 
 
634 
;generate checksum for RAM integrity test
635 
    if ram_top > -1
636 
        lda #0
637 
        sta zpt         ;set low byte of indirect pointer
638 
        sta ram_chksm+1 ;checksum high byte
639 
        sta range_adr   ;reset self modifying code
640 
        sta tandi1
641 
        sta tandi2
642 
        sta teori1
643 
        sta teori2
644 
        sta torai1
645 
        sta torai2
646 
        sta chkdadi
647 
        sta chkdsbi
648 
        sta chkadi
649 
        sta chksbi
650 
        clc
651 
        ldx #zp_bss-zero_page ;zeropage - write test area
652 
gcs3    adc zero_page,x
653 
        bcc gcs2
654 
        inc ram_chksm+1 ;carry to high byte
655 
        clc
656 
gcs2    inx
657 
        bne gcs3
658 
        ldx #hi(data_segment) ;set high byte of indirect pointer
659 
        stx zpt+1
660 
        ldy #lo(data_bss) ;data after write test area
661 
gcs5    adc (zpt),y
662 
        bcc gcs4
663 
        inc ram_chksm+1 ;carry to high byte
664 
        clc
665 
gcs4    iny
666 
        bne gcs5
667 
        inx             ;advance RAM high address
668 
        stx zpt+1
669 
        cpx #ram_top
670 
        bne gcs5
671 
        sta ram_chksm   ;checksum complete
672 
    endif
673 
 
674 
    if skip_part_1 = 1
675 
        jmp  bin_test
676 
    endif
677 
 
678 
        next_test
679 
 
680 
;testing relative addressing with BEQ
681 
        ldy #$fe        ;testing maximum range, not -1/-2 (invalid/self adr)
682 
range_loop
683 
        dey             ;next relative address
684 
        tya
685 
        tax             ;precharge count to end of loop
686 
        bpl range_fw    ;calculate relative address
687 
        clc             ;avoid branch self or to relative address of branch
688 
        adc #2
689 
range_fw
690 
        eor #$7f        ;complement except sign
691 
        sta range_adr   ;load into test target
692 
        lda #0          ;should set zero flag in status register
693 
        jmp range_op
694 
 
695 
        ;relative address target field with branch under test in the middle
696 
        dex             ;-128 - max backward
697 
        dex
698 
        dex
699 
        dex
700 
        dex
701 
        dex
702 
        dex
703 
        dex
704 
        dex             ;-120
705 
        dex
706 
        dex
707 
        dex
708 
        dex
709 
        dex
710 
        dex
711 
        dex
712 
        dex
713 
        dex
714 
        dex             ;-110
715 
        dex
716 
        dex
717 
        dex
718 
        dex
719 
        dex
720 
        dex
721 
        dex
722 
        dex
723 
        dex
724 
        dex             ;-100
725 
        dex
726 
        dex
727 
        dex
728 
        dex
729 
        dex
730 
        dex
731 
        dex
732 
        dex
733 
        dex
734 
        dex             ;-90
735 
        dex
736 
        dex
737 
        dex
738 
        dex
739 
        dex
740 
        dex
741 
        dex
742 
        dex
743 
        dex
744 
        dex             ;-80
745 
        dex
746 
        dex
747 
        dex
748 
        dex
749 
        dex
750 
        dex
751 
        dex
752 
        dex
753 
        dex
754 
        dex             ;-70
755 
        dex
756 
        dex
757 
        dex
758 
        dex
759 
        dex
760 
        dex
761 
        dex
762 
        dex
763 
        dex
764 
        dex             ;-60
765 
        dex
766 
        dex
767 
        dex
768 
        dex
769 
        dex
770 
        dex
771 
        dex
772 
        dex
773 
        dex
774 
        dex             ;-50
775 
        dex
776 
        dex
777 
        dex
778 
        dex
779 
        dex
780 
        dex
781 
        dex
782 
        dex
783 
        dex
784 
        dex             ;-40
785 
        dex
786 
        dex
787 
        dex
788 
        dex
789 
        dex
790 
        dex
791 
        dex
792 
        dex
793 
        dex
794 
        dex             ;-30
795 
        dex
796 
        dex
797 
        dex
798 
        dex
799 
        dex
800 
        dex
801 
        dex
802 
        dex
803 
        dex
804 
        dex             ;-20
805 
        dex
806 
        dex
807 
        dex
808 
        dex
809 
        dex
810 
        dex
811 
        dex
812 
        dex
813 
        dex
814 
        dex             ;-10
815 
        dex
816 
        dex
817 
        dex
818 
        dex
819 
        dex
820 
        dex
821 
        dex             ;-3
822 
range_op                ;test target with zero flag=0, z=1 if previous dex
823 
range_adr   = *+1       ;modifiable relative address
824 
        beq *+64        ;if called without modification
825 
        dex             ;+0
826 
        dex
827 
        dex
828 
        dex
829 
        dex
830 
        dex
831 
        dex
832 
        dex
833 
        dex
834 
        dex
835 
        dex             ;+10
836 
        dex
837 
        dex
838 
        dex
839 
        dex
840 
        dex
841 
        dex
842 
        dex
843 
        dex
844 
        dex
845 
        dex             ;+20
846 
        dex
847 
        dex
848 
        dex
849 
        dex
850 
        dex
851 
        dex
852 
        dex
853 
        dex
854 
        dex
855 
        dex             ;+30
856 
        dex
857 
        dex
858 
        dex
859 
        dex
860 
        dex
861 
        dex
862 
        dex
863 
        dex
864 
        dex
865 
        dex             ;+40
866 
        dex
867 
        dex
868 
        dex
869 
        dex
870 
        dex
871 
        dex
872 
        dex
873 
        dex
874 
        dex
875 
        dex             ;+50
876 
        dex
877 
        dex
878 
        dex
879 
        dex
880 
        dex
881 
        dex
882 
        dex
883 
        dex
884 
        dex
885 
        dex             ;+60
886 
        dex
887 
        dex
888 
        dex
889 
        dex
890 
        dex
891 
        dex
892 
        dex
893 
        dex
894 
        dex
895 
        dex             ;+70
896 
        dex
897 
        dex
898 
        dex
899 
        dex
900 
        dex
901 
        dex
902 
        dex
903 
        dex
904 
        dex
905 
        dex             ;+80
906 
        dex
907 
        dex
908 
        dex
909 
        dex
910 
        dex
911 
        dex
912 
        dex
913 
        dex
914 
        dex
915 
        dex             ;+90
916 
        dex
917 
        dex
918 
        dex
919 
        dex
920 
        dex
921 
        dex
922 
        dex
923 
        dex
924 
        dex
925 
        dex             ;+100
926 
        dex
927 
        dex
928 
        dex
929 
        dex
930 
        dex
931 
        dex
932 
        dex
933 
        dex
934 
        dex
935 
        dex             ;+110
936 
        dex
937 
        dex
938 
        dex
939 
        dex
940 
        dex
941 
        dex
942 
        dex
943 
        dex
944 
        dex
945 
        dex             ;+120
946 
        dex
947 
        dex
948 
        dex
949 
        dex
950 
        dex
951 
        dex
952 
        beq range_ok    ;+127 - max forward
953 
        trap            ; bad range
954 
range_ok
955 
        cpy #0
956 
        beq range_end
957 
        jmp range_loop
958 
range_end               ;range test successful
959 
        next_test
960 
 
961 
;partial test BNE & CMP, CPX, CPY immediate
962 
        cpy #1          ;testing BNE true
963 
        bne test_bne
964 
        trap
965 
test_bne
966 
        lda #0
967 
        cmp #0          ;test compare immediate
968 
        trap_ne
969 
        trap_cc
970 
        trap_mi
971 
        cmp #1
972 
        trap_eq
973 
        trap_cs
974 
        trap_pl
975 
        tax
976 
        cpx #0          ;test compare x immediate
977 
        trap_ne
978 
        trap_cc
979 
        trap_mi
980 
        cpx #1
981 
        trap_eq
982 
        trap_cs
983 
        trap_pl
984 
        tay
985 
        cpy #0          ;test compare y immediate
986 
        trap_ne
987 
        trap_cc
988 
        trap_mi
989 
        cpy #1
990 
        trap_eq
991 
        trap_cs
992 
        trap_pl
993 
        next_test
994 
;testing stack operations PHA PHP PLA PLP
995 
 
996 
        ldx #$ff        ;initialize stack
997 
        txs
998 
        lda #$55
999 
        pha
1000 
        lda #$aa
1001 
        pha
1002 
        cmp $1fe        ;on stack ?
1003 
        trap_ne
1004 
        tsx
1005 
        txa             ;overwrite accu
1006 
        cmp #$fd        ;sp decremented?
1007 
        trap_ne
1008 
        pla
1009 
        cmp #$aa        ;successful retreived from stack?
1010 
        trap_ne
1011 
        pla
1012 
        cmp #$55
1013 
        trap_ne
1014 
        cmp $1ff        ;remains on stack?
1015 
        trap_ne
1016 
        tsx
1017 
        cpx #$ff        ;sp incremented?
1018 
        trap_ne
1019 
        next_test
1020 
 
1021 
;testing branch decisions BPL BMI BVC BVS BCC BCS BNE BEQ
1022 
        set_stat $ff    ;all on
1023 
        bpl nbr1        ;branches should not be taken
1024 
        bvc nbr2
1025 
        bcc nbr3
1026 
        bne nbr4
1027 
        bmi br1         ;branches should be taken
1028 
        trap
1029 
br1     bvs br2
1030 
        trap
1031 
br2     bcs br3
1032 
        trap
1033 
br3     beq br4
1034 
        trap
1035 
nbr1
1036 
        trap            ;previous bpl taken
1037 
nbr2
1038 
        trap            ;previous bvc taken
1039 
nbr3
1040 
        trap            ;previous bcc taken
1041 
nbr4
1042 
        trap            ;previous bne taken
1043 
br4     php
1044 
        tsx
1045 
        cpx #$fe        ;sp after php?
1046 
        trap_ne
1047 
        pla
1048 
        cmp_flag $ff    ;returned all flags on?
1049 
        trap_ne
1050 
        tsx
1051 
        cpx #$ff        ;sp after php?
1052 
        trap_ne
1053 
        set_stat 0      ;all off
1054 
        bmi nbr11       ;branches should not be taken
1055 
        bvs nbr12
1056 
        bcs nbr13
1057 
        beq nbr14
1058 
        trap_mi
1059 
        trap_vs
1060 
        trap_cs
1061 
        trap_eq
1062 
        bpl br11        ;branches should be taken
1063 
        trap
1064 
br11    bvc br12
1065 
        trap
1066 
br12    bcc br13
1067 
        trap
1068 
br13    bne br14
1069 
        trap
1070 
nbr11
1071 
        trap            ;previous bmi taken
1072 
nbr12
1073 
        trap            ;previous bvs taken
1074 
nbr13
1075 
        trap            ;previous bcs taken
1076 
nbr14
1077 
        trap            ;previous beq taken
1078 
br14    php
1079 
        pla
1080 
        cmp_flag 0      ;flags off except break (pushed by sw) + reserved?
1081 
        trap_ne
1082 
        ;crosscheck flags
1083 
        set_stat carry
1084 
        trap_cc
1085 
        set_stat zero
1086 
        trap_ne
1087 
        set_stat overfl
1088 
        trap_vc
1089 
        set_stat minus
1090 
        trap_pl
1091 
        set_stat $ff-carry
1092 
        trap_cs
1093 
        set_stat $ff-zero
1094 
        trap_eq
1095 
        set_stat $ff-overfl
1096 
        trap_vs
1097 
        set_stat $ff-minus
1098 
        trap_mi
1099 
        next_test
1100 
 
1101 
; test PHA does not alter flags or accumulator but PLA does
1102 
        ldx #$55        ;x & y protected
1103 
        ldy #$aa
1104 
        set_a 1,$ff     ;push
1105 
        pha
1106 
        tst_a 1,$ff
1107 
        set_a 0,0
1108 
        pha
1109 
        tst_a 0,0
1110 
        set_a $ff,$ff
1111 
        pha
1112 
        tst_a $ff,$ff
1113 
        set_a 1,0
1114 
        pha
1115 
        tst_a 1,0
1116 
        set_a 0,$ff
1117 
        pha
1118 
        tst_a 0,$ff
1119 
        set_a $ff,0
1120 
        pha
1121 
        tst_a $ff,0
1122 
        set_a 0,$ff     ;pull
1123 
        pla
1124 
        tst_a $ff,$ff-zero
1125 
        set_a $ff,0
1126 
        pla
1127 
        tst_a 0,zero
1128 
        set_a $fe,$ff
1129 
        pla
1130 
        tst_a 1,$ff-zero-minus
1131 
        set_a 0,0
1132 
        pla
1133 
        tst_a $ff,minus
1134 
        set_a $ff,$ff
1135 
        pla
1136 
        tst_a 0,$ff-minus
1137 
        set_a $fe,0
1138 
        pla
1139 
        tst_a 1,0
1140 
        cpx #$55        ;x & y unchanged?
1141 
        trap_ne
1142 
        cpy #$aa
1143 
        trap_ne
1144 
        next_test
1145 
 
1146 
; partial pretest EOR #
1147 
        set_a $3c,0
1148 
        eor #$c3
1149 
        tst_a $ff,fn
1150 
        set_a $c3,0
1151 
        eor #$c3
1152 
        tst_a 0,fz
1153 
        next_test
1154 
 
1155 
; PC modifying instructions except branches (NOP, JMP, JSR, RTS, BRK, RTI)
1156 
; testing NOP
1157 
        ldx #$24
1158 
        ldy #$42
1159 
        set_a $18,0
1160 
        nop
1161 
        tst_a $18,0
1162 
        cpx #$24
1163 
        trap_ne
1164 
        cpy #$42
1165 
        trap_ne
1166 
        ldx #$db
1167 
        ldy #$bd
1168 
        set_a $e7,$ff
1169 
        nop
1170 
        tst_a $e7,$ff
1171 
        cpx #$db
1172 
        trap_ne
1173 
        cpy #$bd
1174 
        trap_ne
1175 
        next_test
1176 
 
1177 
; jump absolute
1178 
        set_stat $0
1179 
        lda #'F'
1180 
        ldx #'A'
1181 
        ldy #'R'        ;N=0, V=0, Z=0, C=0
1182 
        jmp test_far
1183 
        nop
1184 
        nop
1185 
        trap_ne         ;runover protection
1186 
        inx
1187 
        inx
1188 
far_ret
1189 
        trap_eq         ;returned flags OK?
1190 
        trap_pl
1191 
        trap_cc
1192 
        trap_vc
1193 
        cmp #('F'^$aa)  ;returned registers OK?
1194 
        trap_ne
1195 
        cpx #('A'+1)
1196 
        trap_ne
1197 
        cpy #('R'-3)
1198 
        trap_ne
1199 
        dex
1200 
        iny
1201 
        iny
1202 
        iny
1203 
        eor #$aa        ;N=0, V=1, Z=0, C=1
1204 
        jmp test_near
1205 
        nop
1206 
        nop
1207 
        trap_ne         ;runover protection
1208 
        inx
1209 
        inx
1210 
test_near
1211 
        trap_eq         ;passed flags OK?
1212 
        trap_mi
1213 
        trap_cc
1214 
        trap_vc
1215 
        cmp #'F'        ;passed registers OK?
1216 
        trap_ne
1217 
        cpx #'A'
1218 
        trap_ne
1219 
        cpy #'R'
1220 
        trap_ne
1221 
        next_test
1222 
 
1223 
; jump indirect
1224 
        set_stat 0
1225 
        lda #'I'
1226 
        ldx #'N'
1227 
        ldy #'D'        ;N=0, V=0, Z=0, C=0
1228 
        jmp (ptr_tst_ind)
1229 
        nop
1230 
        trap_ne         ;runover protection
1231 
        dey
1232 
        dey
1233 
ind_ret
1234 
        php             ;either SP or Y count will fail, if we do not hit
1235 
        dey
1236 
        dey
1237 
        dey
1238 
        plp
1239 
        trap_eq         ;returned flags OK?
1240 
        trap_pl
1241 
        trap_cc
1242 
        trap_vc
1243 
        cmp #('I'^$aa)  ;returned registers OK?
1244 
        trap_ne
1245 
        cpx #('N'+1)
1246 
        trap_ne
1247 
        cpy #('D'-6)
1248 
        trap_ne
1249 
        tsx             ;SP check
1250 
        cpx #$ff
1251 
        trap_ne
1252 
        next_test
1253 
 
1254 
; jump subroutine & return from subroutine
1255 
        set_stat 0
1256 
        lda #'J'
1257 
        ldx #'S'
1258 
        ldy #'R'        ;N=0, V=0, Z=0, C=0
1259 
        jsr test_jsr
1260 
jsr_ret = *-1           ;last address of jsr = return address
1261 
        php             ;either SP or Y count will fail, if we do not hit
1262 
        dey
1263 
        dey
1264 
        dey
1265 
        plp
1266 
        trap_eq         ;returned flags OK?
1267 
        trap_pl
1268 
        trap_cc
1269 
        trap_vc
1270 
        cmp #('J'^$aa)  ;returned registers OK?
1271 
        trap_ne
1272 
        cpx #('S'+1)
1273 
        trap_ne
1274 
        cpy #('R'-6)
1275 
        trap_ne
1276 
        tsx             ;sp?
1277 
        cpx #$ff
1278 
        trap_ne
1279 
        next_test
1280 
 
1281 
; break & return from interrupt
1282 
    if ROM_vectors = 1
1283 
        set_stat 0
1284 
        lda #'B'
1285 
        ldx #'R'
1286 
        ldy #'K'        ;N=0, V=0, Z=0, C=0
1287 
        brk
1288 
    else
1289 
        lda #hi brk_ret ;emulated break
1290 
        pha
1291 
        lda #lo brk_ret
1292 
        pha
1293 
        lda #fao        ;set break & unused on stack
1294 
        pha
1295 
        set_stat intdis
1296 
        lda #'B'
1297 
        ldx #'R'
1298 
        ldy #'K'        ;N=0, V=0, Z=0, C=0
1299 
        jmp irq_trap
1300 
    endif
1301 
        dey             ;should not be executed
1302 
brk_ret                 ;address of break return
1303 
        php             ;either SP or Y count will fail, if we do not hit
1304 
        dey
1305 
        dey
1306 
        dey
1307 
        cmp #('B'^$aa)  ;returned registers OK?
1308 
        trap_ne
1309 
        cpx #('R'+1)
1310 
        trap_ne
1311 
        cpy #('K'-6)
1312 
        trap_ne
1313 
        pla             ;returned flags OK (unchanged)?
1314 
        cmp_flag 0
1315 
        trap_ne
1316 
        tsx             ;sp?
1317 
        cpx #$ff
1318 
        trap_ne
1319 
        next_test
1320 
 
1321 
; test set and clear flags CLC CLI CLD CLV SEC SEI SED
1322 
        set_stat $ff
1323 
        clc
1324 
        tst_stat $ff-carry
1325 
        sec
1326 
        tst_stat $ff
1327 
    if I_flag = 3
1328 
        cli
1329 
        tst_stat $ff-intdis
1330 
        sei
1331 
        tst_stat $ff
1332 
    endif
1333 
        cld
1334 
        tst_stat $ff-decmode
1335 
        sed
1336 
        tst_stat $ff
1337 
        clv
1338 
        tst_stat $ff-overfl
1339 
        set_stat 0
1340 
        tst_stat 0
1341 
        sec
1342 
        tst_stat carry
1343 
        clc
1344 
        tst_stat 0
1345 
    if I_flag = 3
1346 
        sei
1347 
        tst_stat intdis
1348 
        cli
1349 
        tst_stat 0
1350 
    endif
1351 
        sed
1352 
        tst_stat decmode
1353 
        cld
1354 
        tst_stat 0
1355 
        set_stat overfl
1356 
        tst_stat overfl
1357 
        clv
1358 
        tst_stat 0
1359 
        next_test
1360 
; testing index register increment/decrement and transfer
1361 
; INX INY DEX DEY TAX TXA TAY TYA
1362 
        ldx #$fe
1363 
        set_stat $ff
1364 
        inx             ;ff
1365 
        tst_x $ff,$ff-zero
1366 
        inx             ;00
1367 
        tst_x 0,$ff-minus
1368 
        inx             ;01
1369 
        tst_x 1,$ff-minus-zero
1370 
        dex             ;00
1371 
        tst_x 0,$ff-minus
1372 
        dex             ;ff
1373 
        tst_x $ff,$ff-zero
1374 
        dex             ;fe
1375 
        set_stat 0
1376 
        inx             ;ff
1377 
        tst_x $ff,minus
1378 
        inx             ;00
1379 
        tst_x 0,zero
1380 
        inx             ;01
1381 
        tst_x 1,0
1382 
        dex             ;00
1383 
        tst_x 0,zero
1384 
        dex             ;ff
1385 
        tst_x $ff,minus
1386 
 
1387 
        ldy #$fe
1388 
        set_stat $ff
1389 
        iny             ;ff
1390 
        tst_y $ff,$ff-zero
1391 
        iny             ;00
1392 
        tst_y 0,$ff-minus
1393 
        iny             ;01
1394 
        tst_y 1,$ff-minus-zero
1395 
        dey             ;00
1396 
        tst_y 0,$ff-minus
1397 
        dey             ;ff
1398 
        tst_y $ff,$ff-zero
1399 
        dey             ;fe
1400 
        set_stat 0
1401 
        iny             ;ff
1402 
        tst_y $ff,0+minus
1403 
        iny             ;00
1404 
        tst_y 0,zero
1405 
        iny             ;01
1406 
        tst_y 1,0
1407 
        dey             ;00
1408 
        tst_y 0,zero
1409 
        dey             ;ff
1410 
        tst_y $ff,minus
1411 
 
1412 
        ldx #$ff
1413 
        set_stat $ff
1414 
        txa
1415 
        tst_a $ff,$ff-zero
1416 
        php
1417 
        inx             ;00
1418 
        plp
1419 
        txa
1420 
        tst_a 0,$ff-minus
1421 
        php
1422 
        inx             ;01
1423 
        plp
1424 
        txa
1425 
        tst_a 1,$ff-minus-zero
1426 
        set_stat 0
1427 
        txa
1428 
        tst_a 1,0
1429 
        php
1430 
        dex             ;00
1431 
        plp
1432 
        txa
1433 
        tst_a 0,zero
1434 
        php
1435 
        dex             ;ff
1436 
        plp
1437 
        txa
1438 
        tst_a $ff,minus
1439 
 
1440 
        ldy #$ff
1441 
        set_stat $ff
1442 
        tya
1443 
        tst_a $ff,$ff-zero
1444 
        php
1445 
        iny             ;00
1446 
        plp
1447 
        tya
1448 
        tst_a 0,$ff-minus
1449 
        php
1450 
        iny             ;01
1451 
        plp
1452 
        tya
1453 
        tst_a 1,$ff-minus-zero
1454 
        set_stat 0
1455 
        tya
1456 
        tst_a 1,0
1457 
        php
1458 
        dey             ;00
1459 
        plp
1460 
        tya
1461 
        tst_a 0,zero
1462 
        php
1463 
        dey             ;ff
1464 
        plp
1465 
        tya
1466 
        tst_a $ff,minus
1467 
 
1468 
        load_flag $ff
1469 
        pha
1470 
        ldx #$ff        ;ff
1471 
        txa
1472 
        plp
1473 
        tay
1474 
        tst_y $ff,$ff-zero
1475 
        php
1476 
        inx             ;00
1477 
        txa
1478 
        plp
1479 
        tay
1480 
        tst_y 0,$ff-minus
1481 
        php
1482 
        inx             ;01
1483 
        txa
1484 
        plp
1485 
        tay
1486 
        tst_y 1,$ff-minus-zero
1487 
        load_flag 0
1488 
        pha
1489 
        lda #0
1490 
        txa
1491 
        plp
1492 
        tay
1493 
        tst_y 1,0
1494 
        php
1495 
        dex             ;00
1496 
        txa
1497 
        plp
1498 
        tay
1499 
        tst_y 0,zero
1500 
        php
1501 
        dex             ;ff
1502 
        txa
1503 
        plp
1504 
        tay
1505 
        tst_y $ff,minus
1506 
 
1507 
 
1508 
        load_flag $ff
1509 
        pha
1510 
        ldy #$ff        ;ff
1511 
        tya
1512 
        plp
1513 
        tax
1514 
        tst_x $ff,$ff-zero
1515 
        php
1516 
        iny             ;00
1517 
        tya
1518 
        plp
1519 
        tax
1520 
        tst_x 0,$ff-minus
1521 
        php
1522 
        iny             ;01
1523 
        tya
1524 
        plp
1525 
        tax
1526 
        tst_x 1,$ff-minus-zero
1527 
        load_flag 0
1528 
        pha
1529 
        lda #0          ;preset status
1530 
        tya
1531 
        plp
1532 
        tax
1533 
        tst_x 1,0
1534 
        php
1535 
        dey             ;00
1536 
        tya
1537 
        plp
1538 
        tax
1539 
        tst_x 0,zero
1540 
        php
1541 
        dey             ;ff
1542 
        tya
1543 
        plp
1544 
        tax
1545 
        tst_x $ff,minus
1546 
        next_test
1547 
 
1548 
;TSX sets NZ - TXS does not
1549 
        ldx #1          ;01
1550 
        set_stat $ff
1551 
        txs
1552 
        php
1553 
        lda $101
1554 
        cmp_flag $ff
1555 
        trap_ne
1556 
        set_stat 0
1557 
        txs
1558 
        php
1559 
        lda $101
1560 
        cmp_flag 0
1561 
        trap_ne
1562 
        dex             ;00
1563 
        set_stat $ff
1564 
        txs
1565 
        php
1566 
        lda $100
1567 
        cmp_flag $ff
1568 
        trap_ne
1569 
        set_stat 0
1570 
        txs
1571 
        php
1572 
        lda $100
1573 
        cmp_flag 0
1574 
        trap_ne
1575 
        dex             ;ff
1576 
        set_stat $ff
1577 
        txs
1578 
        php
1579 
        lda $1ff
1580 
        cmp_flag $ff
1581 
        trap_ne
1582 
        set_stat 0
1583 
        txs
1584 
        php
1585 
        lda $1ff
1586 
        cmp_flag 0
1587 
 
1588 
        ldx #1
1589 
        txs             ;sp=01
1590 
        set_stat $ff
1591 
        tsx             ;clears Z, N
1592 
        php             ;sp=00
1593 
        cpx #1
1594 
        trap_ne
1595 
        lda $101
1596 
        cmp_flag $ff-minus-zero
1597 
        trap_ne
1598 
        set_stat $ff
1599 
        tsx             ;clears N, sets Z
1600 
        php             ;sp=ff
1601 
        cpx #0
1602 
        trap_ne
1603 
        lda $100
1604 
        cmp_flag $ff-minus
1605 
        trap_ne
1606 
        set_stat $ff
1607 
        tsx             ;clears N, sets Z
1608 
        php             ;sp=fe
1609 
        cpx #$ff
1610 
        trap_ne
1611 
        lda $1ff
1612 
        cmp_flag $ff-zero
1613 
        trap_ne
1614 
 
1615 
        ldx #1
1616 
        txs             ;sp=01
1617 
        set_stat 0
1618 
        tsx             ;clears Z, N
1619 
        php             ;sp=00
1620 
        cpx #1
1621 
        trap_ne
1622 
        lda $101
1623 
        cmp_flag 0
1624 
        trap_ne
1625 
        set_stat 0
1626 
        tsx             ;clears N, sets Z
1627 
        php             ;sp=ff
1628 
        cpx #0
1629 
        trap_ne
1630 
        lda $100
1631 
        cmp_flag zero
1632 
        trap_ne
1633 
        set_stat 0
1634 
        tsx             ;clears N, sets Z
1635 
        php             ;sp=fe
1636 
        cpx #$ff
1637 
        trap_ne
1638 
        lda $1ff
1639 
        cmp_flag minus
1640 
        trap_ne
1641 
        pla             ;sp=ff
1642 
        next_test
1643 
 
1644 
; testing index register load & store LDY LDX STY STX all addressing modes
1645 
; LDX / STX - zp,y / abs,y
1646 
        ldy #3
1647 
tldx
1648 
        set_stat 0
1649 
        ldx zp1,y
1650 
        php         ;test stores do not alter flags
1651 
        txa
1652 
        eor #$c3
1653 
        plp
1654 
        sta abst,y
1655 
        php         ;flags after load/store sequence
1656 
        eor #$c3
1657 
        cmp abs1,y  ;test result
1658 
        trap_ne
1659 
        pla         ;load status
1660 
        eor_flag 0
1661 
        cmp fLDx,y  ;test flags
1662 
        trap_ne
1663 
        dey
1664 
        bpl tldx
1665 
 
1666 
        ldy #3
1667 
tldx1
1668 
        set_stat $ff
1669 
        ldx zp1,y
1670 
        php         ;test stores do not alter flags
1671 
        txa
1672 
        eor #$c3
1673 
        plp
1674 
        sta abst,y
1675 
        php         ;flags after load/store sequence
1676 
        eor #$c3
1677 
        cmp abs1,y  ;test result
1678 
        trap_ne
1679 
        pla         ;load status
1680 
        eor_flag lo~fnz ;mask bits not altered
1681 
        cmp fLDx,y  ;test flags
1682 
        trap_ne
1683 
        dey
1684 
        bpl tldx1
1685 
 
1686 
        ldy #3
1687 
tldx2
1688 
        set_stat 0
1689 
        ldx abs1,y
1690 
        php         ;test stores do not alter flags
1691 
        txa
1692 
        eor #$c3
1693 
        tax
1694 
        plp
1695 
        stx zpt,y
1696 
        php         ;flags after load/store sequence
1697 
        eor #$c3
1698 
        cmp zp1,y   ;test result
1699 
        trap_ne
1700 
        pla         ;load status
1701 
        eor_flag 0
1702 
        cmp fLDx,y  ;test flags
1703 
        trap_ne
1704 
        dey
1705 
        bpl tldx2
1706 
 
1707 
        ldy #3
1708 
tldx3
1709 
        set_stat $ff
1710 
        ldx abs1,y
1711 
        php         ;test stores do not alter flags
1712 
        txa
1713 
        eor #$c3
1714 
        tax
1715 
        plp
1716 
        stx zpt,y
1717 
        php         ;flags after load/store sequence
1718 
        eor #$c3
1719 
        cmp zp1,y   ;test result
1720 
        trap_ne
1721 
        pla         ;load status
1722 
        eor_flag lo~fnz ;mask bits not altered
1723 
        cmp fLDx,y  ;test flags
1724 
        trap_ne
1725 
        dey
1726 
        bpl tldx3
1727 
 
1728 
        ldy #3      ;testing store result
1729 
        ldx #0
1730 
tstx    lda zpt,y
1731 
        eor #$c3
1732 
        cmp zp1,y
1733 
        trap_ne     ;store to zp data
1734 
        stx zpt,y   ;clear
1735 
        lda abst,y
1736 
        eor #$c3
1737 
        cmp abs1,y
1738 
        trap_ne     ;store to abs data
1739 
        txa
1740 
        sta abst,y  ;clear
1741 
        dey
1742 
        bpl tstx
1743 
        next_test
1744 
 
1745 
; indexed wraparound test (only zp should wrap)
1746 
        ldy #3+$fa
1747 
tldx4   ldx zp1-$fa&$ff,y   ;wrap on indexed zp
1748 
        txa
1749 
        sta abst-$fa,y      ;no STX abs,y!
1750 
        dey
1751 
        cpy #$fa
1752 
        bcs tldx4
1753 
        ldy #3+$fa
1754 
tldx5   ldx abs1-$fa,y      ;no wrap on indexed abs
1755 
        stx zpt-$fa&$ff,y
1756 
        dey
1757 
        cpy #$fa
1758 
        bcs tldx5
1759 
        ldy #3      ;testing wraparound result
1760 
        ldx #0
1761 
tstx1   lda zpt,y
1762 
        cmp zp1,y
1763 
        trap_ne     ;store to zp data
1764 
        stx zpt,y   ;clear
1765 
        lda abst,y
1766 
        cmp abs1,y
1767 
        trap_ne     ;store to abs data
1768 
        txa
1769 
        sta abst,y  ;clear
1770 
        dey
1771 
        bpl tstx1
1772 
        next_test
1773 
 
1774 
; LDY / STY - zp,x / abs,x
1775 
        ldx #3
1776 
tldy
1777 
        set_stat 0
1778 
        ldy zp1,x
1779 
        php         ;test stores do not alter flags
1780 
        tya
1781 
        eor #$c3
1782 
        plp
1783 
        sta abst,x
1784 
        php         ;flags after load/store sequence
1785 
        eor #$c3
1786 
        cmp abs1,x  ;test result
1787 
        trap_ne
1788 
        pla         ;load status
1789 
        eor_flag 0
1790 
        cmp fLDx,x  ;test flags
1791 
        trap_ne
1792 
        dex
1793 
        bpl tldy
1794 
 
1795 
        ldx #3
1796 
tldy1
1797 
        set_stat $ff
1798 
        ldy zp1,x
1799 
        php         ;test stores do not alter flags
1800 
        tya
1801 
        eor #$c3
1802 
        plp
1803 
        sta abst,x
1804 
        php         ;flags after load/store sequence
1805 
        eor #$c3
1806 
        cmp abs1,x  ;test result
1807 
        trap_ne
1808 
        pla         ;load status
1809 
        eor_flag lo~fnz ;mask bits not altered
1810 
        cmp fLDx,x  ;test flags
1811 
        trap_ne
1812 
        dex
1813 
        bpl tldy1
1814 
 
1815 
        ldx #3
1816 
tldy2
1817 
        set_stat 0
1818 
        ldy abs1,x
1819 
        php         ;test stores do not alter flags
1820 
        tya
1821 
        eor #$c3
1822 
        tay
1823 
        plp
1824 
        sty zpt,x
1825 
        php         ;flags after load/store sequence
1826 
        eor #$c3
1827 
        cmp zp1,x   ;test result
1828 
        trap_ne
1829 
        pla         ;load status
1830 
        eor_flag 0
1831 
        cmp fLDx,x  ;test flags
1832 
        trap_ne
1833 
        dex
1834 
        bpl tldy2
1835 
 
1836 
        ldx #3
1837 
tldy3
1838 
        set_stat $ff
1839 
        ldy abs1,x
1840 
        php         ;test stores do not alter flags
1841 
        tya
1842 
        eor #$c3
1843 
        tay
1844 
        plp
1845 
        sty zpt,x
1846 
        php         ;flags after load/store sequence
1847 
        eor #$c3
1848 
        cmp zp1,x   ;test result
1849 
        trap_ne
1850 
        pla         ;load status
1851 
        eor_flag lo~fnz ;mask bits not altered
1852 
        cmp fLDx,x  ;test flags
1853 
        trap_ne
1854 
        dex
1855 
        bpl tldy3
1856 
 
1857 
        ldx #3      ;testing store result
1858 
        ldy #0
1859 
tsty    lda zpt,x
1860 
        eor #$c3
1861 
        cmp zp1,x
1862 
        trap_ne     ;store to zp,x data
1863 
        sty zpt,x   ;clear
1864 
        lda abst,x
1865 
        eor #$c3
1866 
        cmp abs1,x
1867 
        trap_ne     ;store to abs,x data
1868 
        txa
1869 
        sta abst,x  ;clear
1870 
        dex
1871 
        bpl tsty
1872 
        next_test
1873 
 
1874 
; indexed wraparound test (only zp should wrap)
1875 
        ldx #3+$fa
1876 
tldy4   ldy zp1-$fa&$ff,x   ;wrap on indexed zp
1877 
        tya
1878 
        sta abst-$fa,x      ;no STX abs,x!
1879 
        dex
1880 
        cpx #$fa
1881 
        bcs tldy4
1882 
        ldx #3+$fa
1883 
tldy5   ldy abs1-$fa,x      ;no wrap on indexed abs
1884 
        sty zpt-$fa&$ff,x
1885 
        dex
1886 
        cpx #$fa
1887 
        bcs tldy5
1888 
        ldx #3      ;testing wraparound result
1889 
        ldy #0
1890 
tsty1   lda zpt,x
1891 
        cmp zp1,x
1892 
        trap_ne     ;store to zp,x data
1893 
        sty zpt,x   ;clear
1894 
        lda abst,x
1895 
        cmp abs1,x
1896 
        trap_ne     ;store to abs,x data
1897 
        txa
1898 
        sta abst,x  ;clear
1899 
        dex
1900 
        bpl tsty1
1901 
        next_test
1902 
 
1903 
; LDX / STX - zp / abs / #
1904 
        set_stat 0
1905 
        ldx zp1
1906 
        php         ;test stores do not alter flags
1907 
        txa
1908 
        eor #$c3
1909 
        tax
1910 
        plp
1911 
        stx abst
1912 
        php         ;flags after load/store sequence
1913 
        eor #$c3
1914 
        tax
1915 
        cpx #$c3    ;test result
1916 
        trap_ne
1917 
        pla         ;load status
1918 
        eor_flag 0
1919 
        cmp fLDx    ;test flags
1920 
        trap_ne
1921 
        set_stat 0
1922 
        ldx zp1+1
1923 
        php         ;test stores do not alter flags
1924 
        txa
1925 
        eor #$c3
1926 
        tax
1927 
        plp
1928 
        stx abst+1
1929 
        php         ;flags after load/store sequence
1930 
        eor #$c3
1931 
        tax
1932 
        cpx #$82    ;test result
1933 
        trap_ne
1934 
        pla         ;load status
1935 
        eor_flag 0
1936 
        cmp fLDx+1  ;test flags
1937 
        trap_ne
1938 
        set_stat 0
1939 
        ldx zp1+2
1940 
        php         ;test stores do not alter flags
1941 
        txa
1942 
        eor #$c3
1943 
        tax
1944 
        plp
1945 
        stx abst+2
1946 
        php         ;flags after load/store sequence
1947 
        eor #$c3
1948 
        tax
1949 
        cpx #$41    ;test result
1950 
        trap_ne
1951 
        pla         ;load status
1952 
        eor_flag 0
1953 
        cmp fLDx+2  ;test flags
1954 
        trap_ne
1955 
        set_stat 0
1956 
        ldx zp1+3
1957 
        php         ;test stores do not alter flags
1958 
        txa
1959 
        eor #$c3
1960 
        tax
1961 
        plp
1962 
        stx abst+3
1963 
        php         ;flags after load/store sequence
1964 
        eor #$c3
1965 
        tax
1966 
        cpx #0      ;test result
1967 
        trap_ne
1968 
        pla         ;load status
1969 
        eor_flag 0
1970 
        cmp fLDx+3  ;test flags
1971 
        trap_ne
1972 
 
1973 
        set_stat $ff
1974 
        ldx zp1
1975 
        php         ;test stores do not alter flags
1976 
        txa
1977 
        eor #$c3
1978 
        tax
1979 
        plp
1980 
        stx abst
1981 
        php         ;flags after load/store sequence
1982 
        eor #$c3
1983 
        tax
1984 
        cpx #$c3    ;test result
1985 
        trap_ne     ;
1986 
        pla         ;load status
1987 
        eor_flag lo~fnz ;mask bits not altered
1988 
        cmp fLDx    ;test flags
1989 
        trap_ne
1990 
        set_stat $ff
1991 
        ldx zp1+1
1992 
        php         ;test stores do not alter flags
1993 
        txa
1994 
        eor #$c3
1995 
        tax
1996 
        plp
1997 
        stx abst+1
1998 
        php         ;flags after load/store sequence
1999 
        eor #$c3
2000 
        tax
2001 
        cpx #$82    ;test result
2002 
        trap_ne
2003 
        pla         ;load status
2004 
        eor_flag lo~fnz ;mask bits not altered
2005 
        cmp fLDx+1  ;test flags
2006 
        trap_ne
2007 
        set_stat $ff
2008 
        ldx zp1+2
2009 
        php         ;test stores do not alter flags
2010 
        txa
2011 
        eor #$c3
2012 
        tax
2013 
        plp
2014 
        stx abst+2
2015 
        php         ;flags after load/store sequence
2016 
        eor #$c3
2017 
        tax
2018 
        cpx #$41    ;test result
2019 
        trap_ne     ;
2020 
        pla         ;load status
2021 
        eor_flag lo~fnz ;mask bits not altered
2022 
        cmp fLDx+2  ;test flags
2023 
        trap_ne
2024 
        set_stat $ff
2025 
        ldx zp1+3
2026 
        php         ;test stores do not alter flags
2027 
        txa
2028 
        eor #$c3
2029 
        tax
2030 
        plp
2031 
        stx abst+3
2032 
        php         ;flags after load/store sequence
2033 
        eor #$c3
2034 
        tax
2035 
        cpx #0      ;test result
2036 
        trap_ne
2037 
        pla         ;load status
2038 
        eor_flag lo~fnz ;mask bits not altered
2039 
        cmp fLDx+3  ;test flags
2040 
        trap_ne
2041 
 
2042 
        set_stat 0
2043 
        ldx abs1
2044 
        php         ;test stores do not alter flags
2045 
        txa
2046 
        eor #$c3
2047 
        tax
2048 
        plp
2049 
        stx zpt
2050 
        php         ;flags after load/store sequence
2051 
        eor #$c3
2052 
        cmp zp1     ;test result
2053 
        trap_ne
2054 
        pla         ;load status
2055 
        eor_flag 0
2056 
        cmp fLDx    ;test flags
2057 
        trap_ne
2058 
        set_stat 0
2059 
        ldx abs1+1
2060 
        php         ;test stores do not alter flags
2061 
        txa
2062 
        eor #$c3
2063 
        tax
2064 
        plp
2065 
        stx zpt+1
2066 
        php         ;flags after load/store sequence
2067 
        eor #$c3
2068 
        cmp zp1+1   ;test result
2069 
        trap_ne
2070 
        pla         ;load status
2071 
        eor_flag 0
2072 
        cmp fLDx+1  ;test flags
2073 
        trap_ne
2074 
        set_stat 0
2075 
        ldx abs1+2
2076 
        php         ;test stores do not alter flags
2077 
        txa
2078 
        eor #$c3
2079 
        tax
2080 
        plp
2081 
        stx zpt+2
2082 
        php         ;flags after load/store sequence
2083 
        eor #$c3
2084 
        cmp zp1+2   ;test result
2085 
        trap_ne
2086 
        pla         ;load status
2087 
        eor_flag 0
2088 
        cmp fLDx+2  ;test flags
2089 
        trap_ne
2090 
        set_stat 0
2091 
        ldx abs1+3
2092 
        php         ;test stores do not alter flags
2093 
        txa
2094 
        eor #$c3
2095 
        tax
2096 
        plp
2097 
        stx zpt+3
2098 
        php         ;flags after load/store sequence
2099 
        eor #$c3
2100 
        cmp zp1+3   ;test result
2101 
        trap_ne
2102 
        pla         ;load status
2103 
        eor_flag 0
2104 
        cmp fLDx+3  ;test flags
2105 
        trap_ne
2106 
 
2107 
        set_stat $ff
2108 
        ldx abs1
2109 
        php         ;test stores do not alter flags
2110 
        txa
2111 
        eor #$c3
2112 
        tax
2113 
        plp
2114 
        stx zpt
2115 
        php         ;flags after load/store sequence
2116 
        eor #$c3
2117 
        tax
2118 
        cpx zp1     ;test result
2119 
        trap_ne
2120 
        pla         ;load status
2121 
        eor_flag lo~fnz ;mask bits not altered
2122 
        cmp fLDx    ;test flags
2123 
        trap_ne
2124 
        set_stat $ff
2125 
        ldx abs1+1
2126 
        php         ;test stores do not alter flags
2127 
        txa
2128 
        eor #$c3
2129 
        tax
2130 
        plp
2131 
        stx zpt+1
2132 
        php         ;flags after load/store sequence
2133 
        eor #$c3
2134 
        tax
2135 
        cpx zp1+1   ;test result
2136 
        trap_ne
2137 
        pla         ;load status
2138 
        eor_flag lo~fnz ;mask bits not altered
2139 
        cmp fLDx+1  ;test flags
2140 
        trap_ne
2141 
        set_stat $ff
2142 
        ldx abs1+2
2143 
        php         ;test stores do not alter flags
2144 
        txa
2145 
        eor #$c3
2146 
        tax
2147 
        plp
2148 
        stx zpt+2
2149 
        php         ;flags after load/store sequence
2150 
        eor #$c3
2151 
        tax
2152 
        cpx zp1+2   ;test result
2153 
        trap_ne
2154 
        pla         ;load status
2155 
        eor_flag lo~fnz ;mask bits not altered
2156 
        cmp fLDx+2  ;test flags
2157 
        trap_ne
2158 
        set_stat $ff
2159 
        ldx abs1+3
2160 
        php         ;test stores do not alter flags
2161 
        txa
2162 
        eor #$c3
2163 
        tax
2164 
        plp
2165 
        stx zpt+3
2166 
        php         ;flags after load/store sequence
2167 
        eor #$c3
2168 
        tax
2169 
        cpx zp1+3   ;test result
2170 
        trap_ne
2171 
        pla         ;load status
2172 
        eor_flag lo~fnz ;mask bits not altered
2173 
        cmp fLDx+3  ;test flags
2174 
        trap_ne
2175 
 
2176 
        set_stat 0
2177 
        ldx #$c3
2178 
        php
2179 
        cpx abs1    ;test result
2180 
        trap_ne
2181 
        pla         ;load status
2182 
        eor_flag 0
2183 
        cmp fLDx    ;test flags
2184 
        trap_ne
2185 
        set_stat 0
2186 
        ldx #$82
2187 
        php
2188 
        cpx abs1+1  ;test result
2189 
        trap_ne
2190 
        pla         ;load status
2191 
        eor_flag 0
2192 
        cmp fLDx+1  ;test flags
2193 
        trap_ne
2194 
        set_stat 0
2195 
        ldx #$41
2196 
        php
2197 
        cpx abs1+2  ;test result
2198 
        trap_ne
2199 
        pla         ;load status
2200 
        eor_flag 0
2201 
        cmp fLDx+2  ;test flags
2202 
        trap_ne
2203 
        set_stat 0
2204 
        ldx #0
2205 
        php
2206 
        cpx abs1+3  ;test result
2207 
        trap_ne
2208 
        pla         ;load status
2209 
        eor_flag 0
2210 
        cmp fLDx+3  ;test flags
2211 
        trap_ne
2212 
 
2213 
        set_stat $ff
2214 
        ldx #$c3
2215 
        php
2216 
        cpx abs1    ;test result
2217 
        trap_ne
2218 
        pla         ;load status
2219 
        eor_flag lo~fnz ;mask bits not altered
2220 
        cmp fLDx    ;test flags
2221 
        trap_ne
2222 
        set_stat $ff
2223 
        ldx #$82
2224 
        php
2225 
        cpx abs1+1  ;test result
2226 
        trap_ne
2227 
        pla         ;load status
2228 
        eor_flag lo~fnz ;mask bits not altered
2229 
        cmp fLDx+1  ;test flags
2230 
        trap_ne
2231 
        set_stat $ff
2232 
        ldx #$41
2233 
        php
2234 
        cpx abs1+2  ;test result
2235 
        trap_ne
2236 
        pla         ;load status
2237 
        eor_flag lo~fnz ;mask bits not altered
2238 
        cmp fLDx+2  ;test flags
2239 
        trap_ne
2240 
        set_stat $ff
2241 
        ldx #0
2242 
        php
2243 
        cpx abs1+3  ;test result
2244 
        trap_ne
2245 
        pla         ;load status
2246 
        eor_flag lo~fnz ;mask bits not altered
2247 
        cmp fLDx+3  ;test flags
2248 
        trap_ne
2249 
 
2250 
        ldx #0
2251 
        lda zpt
2252 
        eor #$c3
2253 
        cmp zp1
2254 
        trap_ne     ;store to zp data
2255 
        stx zpt     ;clear
2256 
        lda abst
2257 
        eor #$c3
2258 
        cmp abs1
2259 
        trap_ne     ;store to abs data
2260 
        stx abst    ;clear
2261 
        lda zpt+1
2262 
        eor #$c3
2263 
        cmp zp1+1
2264 
        trap_ne     ;store to zp data
2265 
        stx zpt+1   ;clear
2266 
        lda abst+1
2267 
        eor #$c3
2268 
        cmp abs1+1
2269 
        trap_ne     ;store to abs data
2270 
        stx abst+1  ;clear
2271 
        lda zpt+2
2272 
        eor #$c3
2273 
        cmp zp1+2
2274 
        trap_ne     ;store to zp data
2275 
        stx zpt+2   ;clear
2276 
        lda abst+2
2277 
        eor #$c3
2278 
        cmp abs1+2
2279 
        trap_ne     ;store to abs data
2280 
        stx abst+2  ;clear
2281 
        lda zpt+3
2282 
        eor #$c3
2283 
        cmp zp1+3
2284 
        trap_ne     ;store to zp data
2285 
        stx zpt+3   ;clear
2286 
        lda abst+3
2287 
        eor #$c3
2288 
        cmp abs1+3
2289 
        trap_ne     ;store to abs data
2290 
        stx abst+3  ;clear
2291 
        next_test
2292 
 
2293 
; LDY / STY - zp / abs / #
2294 
        set_stat 0
2295 
        ldy zp1
2296 
        php         ;test stores do not alter flags
2297 
        tya
2298 
        eor #$c3
2299 
        tay
2300 
        plp
2301 
        sty abst
2302 
        php         ;flags after load/store sequence
2303 
        eor #$c3
2304 
        tay
2305 
        cpy #$c3    ;test result
2306 
        trap_ne
2307 
        pla         ;load status
2308 
        eor_flag 0
2309 
        cmp fLDx    ;test flags
2310 
        trap_ne
2311 
        set_stat 0
2312 
        ldy zp1+1
2313 
        php         ;test stores do not alter flags
2314 
        tya
2315 
        eor #$c3
2316 
        tay
2317 
        plp
2318 
        sty abst+1
2319 
        php         ;flags after load/store sequence
2320 
        eor #$c3
2321 
        tay
2322 
        cpy #$82    ;test result
2323 
        trap_ne
2324 
        pla         ;load status
2325 
        eor_flag 0
2326 
        cmp fLDx+1  ;test flags
2327 
        trap_ne
2328 
        set_stat 0
2329 
        ldy zp1+2
2330 
        php         ;test stores do not alter flags
2331 
        tya
2332 
        eor #$c3
2333 
        tay
2334 
        plp
2335 
        sty abst+2
2336 
        php         ;flags after load/store sequence
2337 
        eor #$c3
2338 
        tay
2339 
        cpy #$41    ;test result
2340 
        trap_ne
2341 
        pla         ;load status
2342 
        eor_flag 0
2343 
        cmp fLDx+2  ;test flags
2344 
        trap_ne
2345 
        set_stat 0
2346 
        ldy zp1+3
2347 
        php         ;test stores do not alter flags
2348 
        tya
2349 
        eor #$c3
2350 
        tay
2351 
        plp
2352 
        sty abst+3
2353 
        php         ;flags after load/store sequence
2354 
        eor #$c3
2355 
        tay
2356 
        cpy #0      ;test result
2357 
        trap_ne
2358 
        pla         ;load status
2359 
        eor_flag 0
2360 
        cmp fLDx+3  ;test flags
2361 
        trap_ne
2362 
 
2363 
        set_stat $ff
2364 
        ldy zp1
2365 
        php         ;test stores do not alter flags
2366 
        tya
2367 
        eor #$c3
2368 
        tay
2369 
        plp
2370 
        sty abst
2371 
        php         ;flags after load/store sequence
2372 
        eor #$c3
2373 
        tay
2374 
        cpy #$c3    ;test result
2375 
        trap_ne
2376 
        pla         ;load status
2377 
        eor_flag lo~fnz ;mask bits not altered
2378 
        cmp fLDx    ;test flags
2379 
        trap_ne
2380 
        set_stat $ff
2381 
        ldy zp1+1
2382 
        php         ;test stores do not alter flags
2383 
        tya
2384 
        eor #$c3
2385 
        tay
2386 
        plp
2387 
        sty abst+1
2388 
        php         ;flags after load/store sequence
2389 
        eor #$c3
2390 
        tay
2391 
        cpy #$82   ;test result
2392 
        trap_ne
2393 
        pla         ;load status
2394 
        eor_flag lo~fnz ;mask bits not altered
2395 
        cmp fLDx+1  ;test flags
2396 
        trap_ne
2397 
        set_stat $ff
2398 
        ldy zp1+2
2399 
        php         ;test stores do not alter flags
2400 
        tya
2401 
        eor #$c3
2402 
        tay
2403 
        plp
2404 
        sty abst+2
2405 
        php         ;flags after load/store sequence
2406 
        eor #$c3
2407 
        tay
2408 
        cpy #$41    ;test result
2409 
        trap_ne
2410 
        pla         ;load status
2411 
        eor_flag lo~fnz ;mask bits not altered
2412 
        cmp fLDx+2  ;test flags
2413 
        trap_ne
2414 
        set_stat $ff
2415 
        ldy zp1+3
2416 
        php         ;test stores do not alter flags
2417 
        tya
2418 
        eor #$c3
2419 
        tay
2420 
        plp
2421 
        sty abst+3
2422 
        php         ;flags after load/store sequence
2423 
        eor #$c3
2424 
        tay
2425 
        cpy #0      ;test result
2426 
        trap_ne
2427 
        pla         ;load status
2428 
        eor_flag lo~fnz ;mask bits not altered
2429 
        cmp fLDx+3  ;test flags
2430 
        trap_ne
2431 
 
2432 
        set_stat 0
2433 
        ldy abs1
2434 
        php         ;test stores do not alter flags
2435 
        tya
2436 
        eor #$c3
2437 
        tay
2438 
        plp
2439 
        sty zpt
2440 
        php         ;flags after load/store sequence
2441 
        eor #$c3
2442 
        tay
2443 
        cpy zp1     ;test result
2444 
        trap_ne
2445 
        pla         ;load status
2446 
        eor_flag 0
2447 
        cmp fLDx    ;test flags
2448 
        trap_ne
2449 
        set_stat 0
2450 
        ldy abs1+1
2451 
        php         ;test stores do not alter flags
2452 
        tya
2453 
        eor #$c3
2454 
        tay
2455 
        plp
2456 
        sty zpt+1
2457 
        php         ;flags after load/store sequence
2458 
        eor #$c3
2459 
        tay
2460 
        cpy zp1+1   ;test result
2461 
        trap_ne
2462 
        pla         ;load status
2463 
        eor_flag 0
2464 
        cmp fLDx+1  ;test flags
2465 
        trap_ne
2466 
        set_stat 0
2467 
        ldy abs1+2
2468 
        php         ;test stores do not alter flags
2469 
        tya
2470 
        eor #$c3
2471 
        tay
2472 
        plp
2473 
        sty zpt+2
2474 
        php         ;flags after load/store sequence
2475 
        eor #$c3
2476 
        tay
2477 
        cpy zp1+2   ;test result
2478 
        trap_ne
2479 
        pla         ;load status
2480 
        eor_flag 0
2481 
        cmp fLDx+2  ;test flags
2482 
        trap_ne
2483 
        set_stat 0
2484 
        ldy abs1+3
2485 
        php         ;test stores do not alter flags
2486 
        tya
2487 
        eor #$c3
2488 
        tay
2489 
        plp
2490 
        sty zpt+3
2491 
        php         ;flags after load/store sequence
2492 
        eor #$c3
2493 
        tay
2494 
        cpy zp1+3   ;test result
2495 
        trap_ne
2496 
        pla         ;load status
2497 
        eor_flag 0
2498 
        cmp fLDx+3  ;test flags
2499 
        trap_ne
2500 
 
2501 
        set_stat $ff
2502 
        ldy abs1
2503 
        php         ;test stores do not alter flags
2504 
        tya
2505 
        eor #$c3
2506 
        tay
2507 
        plp
2508 
        sty zpt
2509 
        php         ;flags after load/store sequence
2510 
        eor #$c3
2511 
        tay
2512 
        cmp zp1     ;test result
2513 
        trap_ne
2514 
        pla         ;load status
2515 
        eor_flag lo~fnz ;mask bits not altered
2516 
        cmp fLDx    ;test flags
2517 
        trap_ne
2518 
        set_stat $ff
2519 
        ldy abs1+1
2520 
        php         ;test stores do not alter flags
2521 
        tya
2522 
        eor #$c3
2523 
        tay
2524 
        plp
2525 
        sty zpt+1
2526 
        php         ;flags after load/store sequence
2527 
        eor #$c3
2528 
        tay
2529 
        cmp zp1+1   ;test result
2530 
        trap_ne
2531 
        pla         ;load status
2532 
        eor_flag lo~fnz ;mask bits not altered
2533 
        cmp fLDx+1  ;test flags
2534 
        trap_ne
2535 
        set_stat $ff
2536 
        ldy abs1+2
2537 
        php         ;test stores do not alter flags
2538 
        tya
2539 
        eor #$c3
2540 
        tay
2541 
        plp
2542 
        sty zpt+2
2543 
        php         ;flags after load/store sequence
2544 
        eor #$c3
2545 
        tay
2546 
        cmp zp1+2   ;test result
2547 
        trap_ne
2548 
        pla         ;load status
2549 
        eor_flag lo~fnz ;mask bits not altered
2550 
        cmp fLDx+2  ;test flags
2551 
        trap_ne
2552 
        set_stat $ff
2553 
        ldy abs1+3
2554 
        php         ;test stores do not alter flags
2555 
        tya
2556 
        eor #$c3
2557 
        tay
2558 
        plp
2559 
        sty zpt+3
2560 
        php         ;flags after load/store sequence
2561 
        eor #$c3
2562 
        tay
2563 
        cmp zp1+3   ;test result
2564 
        trap_ne
2565 
        pla         ;load status
2566 
        eor_flag lo~fnz ;mask bits not altered
2567 
        cmp fLDx+3  ;test flags
2568 
        trap_ne
2569 
 
2570 
 
2571 
        set_stat 0
2572 
        ldy #$c3
2573 
        php
2574 
        cpy abs1    ;test result
2575 
        trap_ne
2576 
        pla         ;load status
2577 
        eor_flag 0
2578 
        cmp fLDx    ;test flags
2579 
        trap_ne
2580 
        set_stat 0
2581 
        ldy #$82
2582 
        php
2583 
        cpy abs1+1  ;test result
2584 
        trap_ne
2585 
        pla         ;load status
2586 
        eor_flag 0
2587 
        cmp fLDx+1  ;test flags
2588 
        trap_ne
2589 
        set_stat 0
2590 
        ldy #$41
2591 
        php
2592 
        cpy abs1+2  ;test result
2593 
        trap_ne
2594 
        pla         ;load status
2595 
        eor_flag 0
2596 
        cmp fLDx+2  ;test flags
2597 
        trap_ne
2598 
        set_stat 0
2599 
        ldy #0
2600 
        php
2601 
        cpy abs1+3  ;test result
2602 
        trap_ne
2603 
        pla         ;load status
2604 
        eor_flag 0
2605 
        cmp fLDx+3  ;test flags
2606 
        trap_ne
2607 
 
2608 
        set_stat $ff
2609 
        ldy #$c3
2610 
        php
2611 
        cpy abs1    ;test result
2612 
        trap_ne
2613 
        pla         ;load status
2614 
        eor_flag lo~fnz ;mask bits not altered
2615 
        cmp fLDx    ;test flags
2616 
        trap_ne
2617 
        set_stat $ff
2618 
        ldy #$82
2619 
        php
2620 
        cpy abs1+1  ;test result
2621 
        trap_ne
2622 
        pla         ;load status
2623 
        eor_flag lo~fnz ;mask bits not altered
2624 
        cmp fLDx+1  ;test flags
2625 
        trap_ne
2626 
        set_stat $ff
2627 
        ldy #$41
2628 
        php
2629 
        cpy abs1+2   ;test result
2630 
        trap_ne
2631 
        pla         ;load status
2632 
        eor_flag lo~fnz ;mask bits not altered
2633 
        cmp fLDx+2  ;test flags
2634 
        trap_ne
2635 
        set_stat $ff
2636 
        ldy #0
2637 
        php
2638 
        cpy abs1+3  ;test result
2639 
        trap_ne
2640 
        pla         ;load status
2641 
        eor_flag lo~fnz ;mask bits not altered
2642 
        cmp fLDx+3  ;test flags
2643 
        trap_ne
2644 
 
2645 
        ldy #0
2646 
        lda zpt
2647 
        eor #$c3
2648 
        cmp zp1
2649 
        trap_ne     ;store to zp   data
2650 
        sty zpt     ;clear
2651 
        lda abst
2652 
        eor #$c3
2653 
        cmp abs1
2654 
        trap_ne     ;store to abs   data
2655 
        sty abst    ;clear
2656 
        lda zpt+1
2657 
        eor #$c3
2658 
        cmp zp1+1
2659 
        trap_ne     ;store to zp+1 data
2660 
        sty zpt+1   ;clear
2661 
        lda abst+1
2662 
        eor #$c3
2663 
        cmp abs1+1
2664 
        trap_ne     ;store to abs+1 data
2665 
        sty abst+1  ;clear
2666 
        lda zpt+2
2667 
        eor #$c3
2668 
        cmp zp1+2
2669 
        trap_ne     ;store to zp+2 data
2670 
        sty zpt+2   ;clear
2671 
        lda abst+2
2672 
        eor #$c3
2673 
        cmp abs1+2
2674 
        trap_ne     ;store to abs+2 data
2675 
        sty abst+2  ;clear
2676 
        lda zpt+3
2677 
        eor #$c3
2678 
        cmp zp1+3
2679 
        trap_ne     ;store to zp+3 data
2680 
        sty zpt+3   ;clear
2681 
        lda abst+3
2682 
        eor #$c3
2683 
        cmp abs1+3
2684 
        trap_ne     ;store to abs+3 data
2685 
        sty abst+3  ;clear
2686 
        next_test
2687 
 
2688 
; testing load / store accumulator LDA / STA all addressing modes
2689 
; LDA / STA - zp,x / abs,x
2690 
        ldx #3
2691 
tldax
2692 
        set_stat 0
2693 
        lda zp1,x
2694 
        php         ;test stores do not alter flags
2695 
        eor #$c3
2696 
        plp
2697 
        sta abst,x
2698 
        php         ;flags after load/store sequence
2699 
        eor #$c3
2700 
        cmp abs1,x  ;test result
2701 
        trap_ne
2702 
        pla         ;load status
2703 
        eor_flag 0
2704 
        cmp fLDx,x  ;test flags
2705 
        trap_ne
2706 
        dex
2707 
        bpl tldax
2708 
 
2709 
        ldx #3
2710 
tldax1
2711 
        set_stat $ff
2712 
        lda zp1,x
2713 
        php         ;test stores do not alter flags
2714 
        eor #$c3
2715 
        plp
2716 
        sta abst,x
2717 
        php         ;flags after load/store sequence
2718 
        eor #$c3
2719 
        cmp abs1,x   ;test result
2720 
        trap_ne
2721 
        pla         ;load status
2722 
        eor_flag lo~fnz ;mask bits not altered
2723 
        cmp fLDx,x  ;test flags
2724 
        trap_ne
2725 
        dex
2726 
        bpl tldax1
2727 
 
2728 
        ldx #3
2729 
tldax2
2730 
        set_stat 0
2731 
        lda abs1,x
2732 
        php         ;test stores do not alter flags
2733 
        eor #$c3
2734 
        plp
2735 
        sta zpt,x
2736 
        php         ;flags after load/store sequence
2737 
        eor #$c3
2738 
        cmp zp1,x   ;test result
2739 
        trap_ne
2740 
        pla         ;load status
2741 
        eor_flag 0
2742 
        cmp fLDx,x  ;test flags
2743 
        trap_ne
2744 
        dex
2745 
        bpl tldax2
2746 
 
2747 
        ldx #3
2748 
tldax3
2749 
        set_stat $ff
2750 
        lda abs1,x
2751 
        php         ;test stores do not alter flags
2752 
        eor #$c3
2753 
        plp
2754 
        sta zpt,x
2755 
        php         ;flags after load/store sequence
2756 
        eor #$c3
2757 
        cmp zp1,x   ;test result
2758 
        trap_ne
2759 
        pla         ;load status
2760 
        eor_flag lo~fnz ;mask bits not altered
2761 
        cmp fLDx,x  ;test flags
2762 
        trap_ne
2763 
        dex
2764 
        bpl tldax3
2765 
 
2766 
        ldx #3      ;testing store result
2767 
        ldy #0
2768 
tstax   lda zpt,x
2769 
        eor #$c3
2770 
        cmp zp1,x
2771 
        trap_ne     ;store to zp,x data
2772 
        sty zpt,x   ;clear
2773 
        lda abst,x
2774 
        eor #$c3
2775 
        cmp abs1,x
2776 
        trap_ne     ;store to abs,x data
2777 
        txa
2778 
        sta abst,x  ;clear
2779 
        dex
2780 
        bpl tstax
2781 
        next_test
2782 
 
2783 
; LDA / STA - (zp),y / abs,y / (zp,x)
2784 
        ldy #3
2785 
tlday
2786 
        set_stat 0
2787 
        lda (ind1),y
2788 
        php         ;test stores do not alter flags
2789 
        eor #$c3
2790 
        plp
2791 
        sta abst,y
2792 
        php         ;flags after load/store sequence
2793 
        eor #$c3
2794 
        cmp abs1,y  ;test result
2795 
        trap_ne
2796 
        pla         ;load status
2797 
        eor_flag 0
2798 
        cmp fLDx,y  ;test flags
2799 
        trap_ne
2800 
        dey
2801 
        bpl tlday
2802 
 
2803 
        ldy #3
2804 
tlday1
2805 
        set_stat $ff
2806 
        lda (ind1),y
2807 
        php         ;test stores do not alter flags
2808 
        eor #$c3
2809 
        plp
2810 
        sta abst,y
2811 
        php         ;flags after load/store sequence
2812 
        eor #$c3
2813 
        cmp abs1,y  ;test result
2814 
        trap_ne
2815 
        pla         ;load status
2816 
        eor_flag lo~fnz ;mask bits not altered
2817 
        cmp fLDx,y  ;test flags
2818 
        trap_ne
2819 
        dey
2820 
        bpl tlday1
2821 
 
2822 
        ldy #3      ;testing store result
2823 
        ldx #0
2824 
tstay   lda abst,y
2825 
        eor #$c3
2826 
        cmp abs1,y
2827 
        trap_ne     ;store to abs data
2828 
        txa
2829 
        sta abst,y  ;clear
2830 
        dey
2831 
        bpl tstay
2832 
 
2833 
        ldy #3
2834 
tlday2
2835 
        set_stat 0
2836 
        lda abs1,y
2837 
        php         ;test stores do not alter flags
2838 
        eor #$c3
2839 
        plp
2840 
        sta (indt),y
2841 
        php         ;flags after load/store sequence
2842 
        eor #$c3
2843 
        cmp (ind1),y    ;test result
2844 
        trap_ne
2845 
        pla         ;load status
2846 
        eor_flag 0
2847 
        cmp fLDx,y  ;test flags
2848 
        trap_ne
2849 
        dey
2850 
        bpl tlday2
2851 
 
2852 
        ldy #3
2853 
tlday3
2854 
        set_stat $ff
2855 
        lda abs1,y
2856 
        php         ;test stores do not alter flags
2857 
        eor #$c3
2858 
        plp
2859 
        sta (indt),y
2860 
        php         ;flags after load/store sequence
2861 
        eor #$c3
2862 
        cmp (ind1),y   ;test result
2863 
        trap_ne
2864 
        pla         ;load status
2865 
        eor_flag lo~fnz ;mask bits not altered
2866 
        cmp fLDx,y  ;test flags
2867 
        trap_ne
2868 
        dey
2869 
        bpl tlday3
2870 
 
2871 
        ldy #3      ;testing store result
2872 
        ldx #0
2873 
tstay1  lda abst,y
2874 
        eor #$c3
2875 
        cmp abs1,y
2876 
        trap_ne     ;store to abs data
2877 
        txa
2878 
        sta abst,y  ;clear
2879 
        dey
2880 
        bpl tstay1
2881 
 
2882 
        ldx #6
2883 
        ldy #3
2884 
tldax4
2885 
        set_stat 0
2886 
        lda (ind1,x)
2887 
        php         ;test stores do not alter flags
2888 
        eor #$c3
2889 
        plp
2890 
        sta (indt,x)
2891 
        php         ;flags after load/store sequence
2892 
        eor #$c3
2893 
        cmp abs1,y  ;test result
2894 
        trap_ne
2895 
        pla         ;load status
2896 
        eor_flag 0
2897 
        cmp fLDx,y  ;test flags
2898 
        trap_ne
2899 
        dex
2900 
        dex
2901 
        dey
2902 
        bpl tldax4
2903 
 
2904 
        ldx #6
2905 
        ldy #3
2906 
tldax5
2907 
        set_stat $ff
2908 
        lda (ind1,x)
2909 
        php         ;test stores do not alter flags
2910 
        eor #$c3
2911 
        plp
2912 
        sta (indt,x)
2913 
        php         ;flags after load/store sequence
2914 
        eor #$c3
2915 
        cmp abs1,y  ;test result
2916 
        trap_ne
2917 
        pla         ;load status
2918 
        eor_flag lo~fnz ;mask bits not altered
2919 
        cmp fLDx,y  ;test flags
2920 
        trap_ne
2921 
        dex
2922 
        dex
2923 
        dey
2924 
        bpl tldax5
2925 
 
2926 
        ldy #3      ;testing store result
2927 
        ldx #0
2928 
tstay2  lda abst,y
2929 
        eor #$c3
2930 
        cmp abs1,y
2931 
        trap_ne     ;store to abs data
2932 
        txa
2933 
        sta abst,y  ;clear
2934 
        dey
2935 
        bpl tstay2
2936 
        next_test
2937 
 
2938 
; indexed wraparound test (only zp should wrap)
2939 
        ldx #3+$fa
2940 
tldax6  lda zp1-$fa&$ff,x   ;wrap on indexed zp
2941 
        sta abst-$fa,x      ;no STX abs,x!
2942 
        dex
2943 
        cpx #$fa
2944 
        bcs tldax6
2945 
        ldx #3+$fa
2946 
tldax7  lda abs1-$fa,x      ;no wrap on indexed abs
2947 
        sta zpt-$fa&$ff,x
2948 
        dex
2949 
        cpx #$fa
2950 
        bcs tldax7
2951 
 
2952 
        ldx #3      ;testing wraparound result
2953 
        ldy #0
2954 
tstax1  lda zpt,x
2955 
        cmp zp1,x
2956 
        trap_ne     ;store to zp,x data
2957 
        sty zpt,x   ;clear
2958 
        lda abst,x
2959 
        cmp abs1,x
2960 
        trap_ne     ;store to abs,x data
2961 
        txa
2962 
        sta abst,x  ;clear
2963 
        dex
2964 
        bpl tstax1
2965 
 
2966 
        ldy #3+$f8
2967 
        ldx #6+$f8
2968 
tlday4  lda (ind1-$f8&$ff,x) ;wrap on indexed zp indirect
2969 
        sta abst-$f8,y
2970 
        dex
2971 
        dex
2972 
        dey
2973 
        cpy #$f8
2974 
        bcs tlday4
2975 
        ldy #3      ;testing wraparound result
2976 
        ldx #0
2977 
tstay4  lda abst,y
2978 
        cmp abs1,y
2979 
        trap_ne     ;store to abs data
2980 
        txa
2981 
        sta abst,y  ;clear
2982 
        dey
2983 
        bpl tstay4
2984 
 
2985 
        ldy #3+$f8
2986 
tlday5  lda abs1-$f8,y  ;no wrap on indexed abs
2987 
        sta (inwt),y
2988 
        dey
2989 
        cpy #$f8
2990 
        bcs tlday5
2991 
        ldy #3      ;testing wraparound result
2992 
        ldx #0
2993 
tstay5  lda abst,y
2994 
        cmp abs1,y
2995 
        trap_ne     ;store to abs data
2996 
        txa
2997 
        sta abst,y  ;clear
2998 
        dey
2999 
        bpl tstay5
3000 
 
3001 
        ldy #3+$f8
3002 
        ldx #6+$f8
3003 
tlday6  lda (inw1),y    ;no wrap on zp indirect indexed
3004 
        sta (indt-$f8&$ff,x)
3005 
        dex
3006 
        dex
3007 
        dey
3008 
        cpy #$f8
3009 
        bcs tlday6
3010 
        ldy #3      ;testing wraparound result
3011 
        ldx #0
3012 
tstay6  lda abst,y
3013 
        cmp abs1,y
3014 
        trap_ne     ;store to abs data
3015 
        txa
3016 
        sta abst,y  ;clear
3017 
        dey
3018 
        bpl tstay6
3019 
        next_test
3020 
 
3021 
; LDA / STA - zp / abs / #
3022 
        set_stat 0
3023 
        lda zp1
3024 
        php         ;test stores do not alter flags
3025 
        eor #$c3
3026 
        plp
3027 
        sta abst
3028 
        php         ;flags after load/store sequence
3029 
        eor #$c3
3030 
        cmp #$c3    ;test result
3031 
        trap_ne
3032 
        pla         ;load status
3033 
        eor_flag 0
3034 
        cmp fLDx    ;test flags
3035 
        trap_ne
3036 
        set_stat 0
3037 
        lda zp1+1
3038 
        php         ;test stores do not alter flags
3039 
        eor #$c3
3040 
        plp
3041 
        sta abst+1
3042 
        php         ;flags after load/store sequence
3043 
        eor #$c3
3044 
        cmp #$82    ;test result
3045 
        trap_ne
3046 
        pla         ;load status
3047 
        eor_flag 0
3048 
        cmp fLDx+1  ;test flags
3049 
        trap_ne
3050 
        set_stat 0
3051 
        lda zp1+2
3052 
        php         ;test stores do not alter flags
3053 
        eor #$c3
3054 
        plp
3055 
        sta abst+2
3056 
        php         ;flags after load/store sequence
3057 
        eor #$c3
3058 
        cmp #$41    ;test result
3059 
        trap_ne
3060 
        pla         ;load status
3061 
        eor_flag 0
3062 
        cmp fLDx+2  ;test flags
3063 
        trap_ne
3064 
        set_stat 0
3065 
        lda zp1+3
3066 
        php         ;test stores do not alter flags
3067 
        eor #$c3
3068 
        plp
3069 
        sta abst+3
3070 
        php         ;flags after load/store sequence
3071 
        eor #$c3
3072 
        cmp #0      ;test result
3073 
        trap_ne
3074 
        pla         ;load status
3075 
        eor_flag 0
3076 
        cmp fLDx+3  ;test flags
3077 
        trap_ne
3078 
        set_stat $ff
3079 
        lda zp1
3080 
        php         ;test stores do not alter flags
3081 
        eor #$c3
3082 
        plp
3083 
        sta abst
3084 
        php         ;flags after load/store sequence
3085 
        eor #$c3
3086 
        cmp #$c3    ;test result
3087 
        trap_ne
3088 
        pla         ;load status
3089 
        eor_flag lo~fnz ;mask bits not altered
3090 
        cmp fLDx    ;test flags
3091 
        trap_ne
3092 
        set_stat $ff
3093 
        lda zp1+1
3094 
        php         ;test stores do not alter flags
3095 
        eor #$c3
3096 
        plp
3097 
        sta abst+1
3098 
        php         ;flags after load/store sequence
3099 
        eor #$c3
3100 
        cmp #$82    ;test result
3101 
        trap_ne
3102 
        pla         ;load status
3103 
        eor_flag lo~fnz ;mask bits not altered
3104 
        cmp fLDx+1  ;test flags
3105 
        trap_ne
3106 
        set_stat $ff
3107 
        lda zp1+2
3108 
        php         ;test stores do not alter flags
3109 
        eor #$c3
3110 
        plp
3111 
        sta abst+2
3112 
        php         ;flags after load/store sequence
3113 
        eor #$c3
3114 
        cmp #$41    ;test result
3115 
        trap_ne
3116 
        pla         ;load status
3117 
        eor_flag lo~fnz ;mask bits not altered
3118 
        cmp fLDx+2  ;test flags
3119 
        trap_ne
3120 
        set_stat $ff
3121 
        lda zp1+3
3122 
        php         ;test stores do not alter flags
3123 
        eor #$c3
3124 
        plp
3125 
        sta abst+3
3126 
        php         ;flags after load/store sequence
3127 
        eor #$c3
3128 
        cmp #0      ;test result
3129 
        trap_ne
3130 
        pla         ;load status
3131 
        eor_flag lo~fnz ;mask bits not altered
3132 
        cmp fLDx+3  ;test flags
3133 
        trap_ne
3134 
        set_stat 0
3135 
        lda abs1
3136 
        php         ;test stores do not alter flags
3137 
        eor #$c3
3138 
        plp
3139 
        sta zpt
3140 
        php         ;flags after load/store sequence
3141 
        eor #$c3
3142 
        cmp zp1     ;test result
3143 
        trap_ne
3144 
        pla         ;load status
3145 
        eor_flag 0
3146 
        cmp fLDx    ;test flags
3147 
        trap_ne
3148 
        set_stat 0
3149 
        lda abs1+1
3150 
        php         ;test stores do not alter flags
3151 
        eor #$c3
3152 
        plp
3153 
        sta zpt+1
3154 
        php         ;flags after load/store sequence
3155 
        eor #$c3
3156 
        cmp zp1+1   ;test result
3157 
        trap_ne
3158 
        pla         ;load status
3159 
        eor_flag 0
3160 
        cmp fLDx+1  ;test flags
3161 
        trap_ne
3162 
        set_stat 0
3163 
        lda abs1+2
3164 
        php         ;test stores do not alter flags
3165 
        eor #$c3
3166 
        plp
3167 
        sta zpt+2
3168 
        php         ;flags after load/store sequence
3169 
        eor #$c3
3170 
        cmp zp1+2   ;test result
3171 
        trap_ne
3172 
        pla         ;load status
3173 
        eor_flag 0
3174 
        cmp fLDx+2  ;test flags
3175 
        trap_ne
3176 
        set_stat 0
3177 
        lda abs1+3
3178 
        php         ;test stores do not alter flags
3179 
        eor #$c3
3180 
        plp
3181 
        sta zpt+3
3182 
        php         ;flags after load/store sequence
3183 
        eor #$c3
3184 
        cmp zp1+3   ;test result
3185 
        trap_ne
3186 
        pla         ;load status
3187 
        eor_flag 0
3188 
        cmp fLDx+3  ;test flags
3189 
        trap_ne
3190 
        set_stat $ff
3191 
        lda abs1
3192 
        php         ;test stores do not alter flags
3193 
        eor #$c3
3194 
        plp
3195 
        sta zpt
3196 
        php         ;flags after load/store sequence
3197 
        eor #$c3
3198 
        cmp zp1     ;test result
3199 
        trap_ne
3200 
        pla         ;load status
3201 
        eor_flag lo~fnz ;mask bits not altered
3202 
        cmp fLDx    ;test flags
3203 
        trap_ne
3204 
        set_stat $ff
3205 
        lda abs1+1
3206 
        php         ;test stores do not alter flags
3207 
        eor #$c3
3208 
        plp
3209 
        sta zpt+1
3210 
        php         ;flags after load/store sequence
3211 
        eor #$c3
3212 
        cmp zp1+1   ;test result
3213 
        trap_ne
3214 
        pla         ;load status
3215 
        eor_flag lo~fnz ;mask bits not altered
3216 
        cmp fLDx+1  ;test flags
3217 
        trap_ne
3218 
        set_stat $ff
3219 
        lda abs1+2
3220 
        php         ;test stores do not alter flags
3221 
        eor #$c3
3222 
        plp
3223 
        sta zpt+2
3224 
        php         ;flags after load/store sequence
3225 
        eor #$c3
3226 
        cmp zp1+2   ;test result
3227 
        trap_ne
3228 
        pla         ;load status
3229 
        eor_flag lo~fnz ;mask bits not altered
3230 
        cmp fLDx+2  ;test flags
3231 
        trap_ne
3232 
        set_stat $ff
3233 
        lda abs1+3
3234 
        php         ;test stores do not alter flags
3235 
        eor #$c3
3236 
        plp
3237 
        sta zpt+3
3238 
        php         ;flags after load/store sequence
3239 
        eor #$c3
3240 
        cmp zp1+3   ;test result
3241 
        trap_ne
3242 
        pla         ;load status
3243 
        eor_flag lo~fnz ;mask bits not altered
3244 
        cmp fLDx+3  ;test flags
3245 
        trap_ne
3246 
        set_stat 0
3247 
        lda #$c3
3248 
        php
3249 
        cmp abs1    ;test result
3250 
        trap_ne
3251 
        pla         ;load status
3252 
        eor_flag 0
3253 
        cmp fLDx    ;test flags
3254 
        trap_ne
3255 
        set_stat 0
3256 
        lda #$82
3257 
        php
3258 
        cmp abs1+1  ;test result
3259 
        trap_ne
3260 
        pla         ;load status
3261 
        eor_flag 0
3262 
        cmp fLDx+1  ;test flags
3263 
        trap_ne
3264 
        set_stat 0
3265 
        lda #$41
3266 
        php
3267 
        cmp abs1+2  ;test result
3268 
        trap_ne
3269 
        pla         ;load status
3270 
        eor_flag 0
3271 
        cmp fLDx+2  ;test flags
3272 
        trap_ne
3273 
        set_stat 0
3274 
        lda #0
3275 
        php
3276 
        cmp abs1+3  ;test result
3277 
        trap_ne
3278 
        pla         ;load status
3279 
        eor_flag 0
3280 
        cmp fLDx+3  ;test flags
3281 
        trap_ne
3282 
 
3283 
        set_stat $ff
3284 
        lda #$c3
3285 
        php
3286 
        cmp abs1    ;test result
3287 
        trap_ne
3288 
        pla         ;load status
3289 
        eor_flag lo~fnz ;mask bits not altered
3290 
        cmp fLDx    ;test flags
3291 
        trap_ne
3292 
        set_stat $ff
3293 
        lda #$82
3294 
        php
3295 
        cmp abs1+1  ;test result
3296 
        trap_ne
3297 
        pla         ;load status
3298 
        eor_flag lo~fnz ;mask bits not altered
3299 
        cmp fLDx+1  ;test flags
3300 
        trap_ne
3301 
        set_stat $ff
3302 
        lda #$41
3303 
        php
3304 
        cmp abs1+2  ;test result
3305 
        trap_ne
3306 
        pla         ;load status
3307 
        eor_flag lo~fnz ;mask bits not altered
3308 
        cmp fLDx+2  ;test flags
3309 
        trap_ne
3310 
        set_stat $ff
3311 
        lda #0
3312 
        php
3313 
        cmp abs1+3  ;test result
3314 
        trap_ne
3315 
        pla         ;load status
3316 
        eor_flag lo~fnz ;mask bits not altered
3317 
        cmp fLDx+3  ;test flags
3318 
        trap_ne
3319 
 
3320 
        ldx #0
3321 
        lda zpt
3322 
        eor #$c3
3323 
        cmp zp1
3324 
        trap_ne     ;store to zp data
3325 
        stx zpt     ;clear
3326 
        lda abst
3327 
        eor #$c3
3328 
        cmp abs1
3329 
        trap_ne     ;store to abs data
3330 
        stx abst    ;clear
3331 
        lda zpt+1
3332 
        eor #$c3
3333 
        cmp zp1+1
3334 
        trap_ne     ;store to zp data
3335 
        stx zpt+1   ;clear
3336 
        lda abst+1
3337 
        eor #$c3
3338 
        cmp abs1+1
3339 
        trap_ne     ;store to abs data
3340 
        stx abst+1  ;clear
3341 
        lda zpt+2
3342 
        eor #$c3
3343 
        cmp zp1+2
3344 
        trap_ne     ;store to zp data
3345 
        stx zpt+2   ;clear
3346 
        lda abst+2
3347 
        eor #$c3
3348 
        cmp abs1+2
3349 
        trap_ne     ;store to abs data
3350 
        stx abst+2  ;clear
3351 
        lda zpt+3
3352 
        eor #$c3
3353 
        cmp zp1+3
3354 
        trap_ne     ;store to zp data
3355 
        stx zpt+3   ;clear
3356 
        lda abst+3
3357 
        eor #$c3
3358 
        cmp abs1+3
3359 
        trap_ne     ;store to abs data
3360 
        stx abst+3  ;clear
3361 
        next_test
3362 
 
3363 
; testing bit test & compares BIT CPX CPY CMP all addressing modes
3364 
; BIT - zp / abs
3365 
        set_a $ff,0
3366 
        bit zp1+3   ;00 - should set Z / clear  NV
3367 
        tst_a $ff,fz
3368 
        set_a 1,0
3369 
        bit zp1+2   ;41 - should set V (M6) / clear NZ
3370 
        tst_a 1,fv
3371 
        set_a 1,0
3372 
        bit zp1+1   ;82 - should set N (M7) & Z / clear V
3373 
        tst_a 1,fnz
3374 
        set_a 1,0
3375 
        bit zp1     ;c3 - should set N (M7) & V (M6) / clear Z
3376 
        tst_a 1,fnv
3377 
 
3378 
        set_a $ff,$ff
3379 
        bit zp1+3   ;00 - should set Z / clear  NV
3380 
        tst_a $ff,~fnv
3381 
        set_a 1,$ff
3382 
        bit zp1+2   ;41 - should set V (M6) / clear NZ
3383 
        tst_a 1,~fnz
3384 
        set_a 1,$ff
3385 
        bit zp1+1   ;82 - should set N (M7) & Z / clear V
3386 
        tst_a 1,~fv
3387 
        set_a 1,$ff
3388 
        bit zp1     ;c3 - should set N (M7) & V (M6) / clear Z
3389 
        tst_a 1,~fz
3390 
 
3391 
        set_a $ff,0
3392 
        bit abs1+3  ;00 - should set Z / clear  NV
3393 
        tst_a $ff,fz
3394 
        set_a 1,0
3395 
        bit abs1+2  ;41 - should set V (M6) / clear NZ
3396 
        tst_a 1,fv
3397 
        set_a 1,0
3398 
        bit abs1+1  ;82 - should set N (M7) & Z / clear V
3399 
        tst_a 1,fnz
3400 
        set_a 1,0
3401 
        bit abs1    ;c3 - should set N (M7) & V (M6) / clear Z
3402 
        tst_a 1,fnv
3403 
 
3404 
        set_a $ff,$ff
3405 
        bit abs1+3  ;00 - should set Z / clear  NV
3406 
        tst_a $ff,~fnv
3407 
        set_a 1,$ff
3408 
        bit abs1+2  ;41 - should set V (M6) / clear NZ
3409 
        tst_a 1,~fnz
3410 
        set_a 1,$ff
3411 
        bit abs1+1  ;82 - should set N (M7) & Z / clear V
3412 
        tst_a 1,~fv
3413 
        set_a 1,$ff
3414 
        bit abs1    ;c3 - should set N (M7) & V (M6) / clear Z
3415 
        tst_a 1,~fz
3416 
        next_test
3417 
 
3418 
; CPX - zp / abs / #
3419 
        set_x $80,0
3420 
        cpx zp7f
3421 
        tst_stat fc
3422 
        dex
3423 
        cpx zp7f
3424 
        tst_stat fzc
3425 
        dex
3426 
        cpx zp7f
3427 
        tst_x $7e,fn
3428 
        set_x $80,$ff
3429 
        cpx zp7f
3430 
        tst_stat ~fnz
3431 
        dex
3432 
        cpx zp7f
3433 
        tst_stat ~fn
3434 
        dex
3435 
        cpx zp7f
3436 
        tst_x $7e,~fzc
3437 
 
3438 
        set_x $80,0
3439 
        cpx abs7f
3440 
        tst_stat fc
3441 
        dex
3442 
        cpx abs7f
3443 
        tst_stat fzc
3444 
        dex
3445 
        cpx abs7f
3446 
        tst_x $7e,fn
3447 
        set_x $80,$ff
3448 
        cpx abs7f
3449 
        tst_stat ~fnz
3450 
        dex
3451 
        cpx abs7f
3452 
        tst_stat ~fn
3453 
        dex
3454 
        cpx abs7f
3455 
        tst_x $7e,~fzc
3456 
 
3457 
        set_x $80,0
3458 
        cpx #$7f
3459 
        tst_stat fc
3460 
        dex
3461 
        cpx #$7f
3462 
        tst_stat fzc
3463 
        dex
3464 
        cpx #$7f
3465 
        tst_x $7e,fn
3466 
        set_x $80,$ff
3467 
        cpx #$7f
3468 
        tst_stat ~fnz
3469 
        dex
3470 
        cpx #$7f
3471 
        tst_stat ~fn
3472 
        dex
3473 
        cpx #$7f
3474 
        tst_x $7e,~fzc
3475 
        next_test
3476 
 
3477 
; CPY - zp / abs / #
3478 
        set_y $80,0
3479 
        cpy zp7f
3480 
        tst_stat fc
3481 
        dey
3482 
        cpy zp7f
3483 
        tst_stat fzc
3484 
        dey
3485 
        cpy zp7f
3486 
        tst_y $7e,fn
3487 
        set_y $80,$ff
3488 
        cpy zp7f
3489 
        tst_stat ~fnz
3490 
        dey
3491 
        cpy zp7f
3492 
        tst_stat ~fn
3493 
        dey
3494 
        cpy zp7f
3495 
        tst_y $7e,~fzc
3496 
 
3497 
        set_y $80,0
3498 
        cpy abs7f
3499 
        tst_stat fc
3500 
        dey
3501 
        cpy abs7f
3502 
        tst_stat fzc
3503 
        dey
3504 
        cpy abs7f
3505 
        tst_y $7e,fn
3506 
        set_y $80,$ff
3507 
        cpy abs7f
3508 
        tst_stat ~fnz
3509 
        dey
3510 
        cpy abs7f
3511 
        tst_stat ~fn
3512 
        dey
3513 
        cpy abs7f
3514 
        tst_y $7e,~fzc
3515 
 
3516 
        set_y $80,0
3517 
        cpy #$7f
3518 
        tst_stat fc
3519 
        dey
3520 
        cpy #$7f
3521 
        tst_stat fzc
3522 
        dey
3523 
        cpy #$7f
3524 
        tst_y $7e,fn
3525 
        set_y $80,$ff
3526 
        cpy #$7f
3527 
        tst_stat ~fnz
3528 
        dey
3529 
        cpy #$7f
3530 
        tst_stat ~fn
3531 
        dey
3532 
        cpy #$7f
3533 
        tst_y $7e,~fzc
3534 
        next_test
3535 
 
3536 
; CMP - zp / abs / #
3537 
        set_a $80,0
3538 
        cmp zp7f
3539 
        tst_a $80,fc
3540 
        set_a $7f,0
3541 
        cmp zp7f
3542 
        tst_a $7f,fzc
3543 
        set_a $7e,0
3544 
        cmp zp7f
3545 
        tst_a $7e,fn
3546 
        set_a $80,$ff
3547 
        cmp zp7f
3548 
        tst_a $80,~fnz
3549 
        set_a $7f,$ff
3550 
        cmp zp7f
3551 
        tst_a $7f,~fn
3552 
        set_a $7e,$ff
3553 
        cmp zp7f
3554 
        tst_a $7e,~fzc
3555 
 
3556 
        set_a $80,0
3557 
        cmp abs7f
3558 
        tst_a $80,fc
3559 
        set_a $7f,0
3560 
        cmp abs7f
3561 
        tst_a $7f,fzc
3562 
        set_a $7e,0
3563 
        cmp abs7f
3564 
        tst_a $7e,fn
3565 
        set_a $80,$ff
3566 
        cmp abs7f
3567 
        tst_a $80,~fnz
3568 
        set_a $7f,$ff
3569 
        cmp abs7f
3570 
        tst_a $7f,~fn
3571 
        set_a $7e,$ff
3572 
        cmp abs7f
3573 
        tst_a $7e,~fzc
3574 
 
3575 
        set_a $80,0
3576 
        cmp #$7f
3577 
        tst_a $80,fc
3578 
        set_a $7f,0
3579 
        cmp #$7f
3580 
        tst_a $7f,fzc
3581 
        set_a $7e,0
3582 
        cmp #$7f
3583 
        tst_a $7e,fn
3584 
        set_a $80,$ff
3585 
        cmp #$7f
3586 
        tst_a $80,~fnz
3587 
        set_a $7f,$ff
3588 
        cmp #$7f
3589 
        tst_a $7f,~fn
3590 
        set_a $7e,$ff
3591 
        cmp #$7f
3592 
        tst_a $7e,~fzc
3593 
 
3594 
        ldx #4          ;with indexing by X
3595 
        set_a $80,0
3596 
        cmp zp1,x
3597 
        tst_a $80,fc
3598 
        set_a $7f,0
3599 
        cmp zp1,x
3600 
        tst_a $7f,fzc
3601 
        set_a $7e,0
3602 
        cmp zp1,x
3603 
        tst_a $7e,fn
3604 
        set_a $80,$ff
3605 
        cmp zp1,x
3606 
        tst_a $80,~fnz
3607 
        set_a $7f,$ff
3608 
        cmp zp1,x
3609 
        tst_a $7f,~fn
3610 
        set_a $7e,$ff
3611 
        cmp zp1,x
3612 
        tst_a $7e,~fzc
3613 
 
3614 
        set_a $80,0
3615 
        cmp abs1,x
3616 
        tst_a $80,fc
3617 
        set_a $7f,0
3618 
        cmp abs1,x
3619 
        tst_a $7f,fzc
3620 
        set_a $7e,0
3621 
        cmp abs1,x
3622 
        tst_a $7e,fn
3623 
        set_a $80,$ff
3624 
        cmp abs1,x
3625 
        tst_a $80,~fnz
3626 
        set_a $7f,$ff
3627 
        cmp abs1,x
3628 
        tst_a $7f,~fn
3629 
        set_a $7e,$ff
3630 
        cmp abs1,x
3631 
        tst_a $7e,~fzc
3632 
 
3633 
        ldy #4          ;with indexing by Y
3634 
        ldx #8          ;with indexed indirect
3635 
        set_a $80,0
3636 
        cmp abs1,y
3637 
        tst_a $80,fc
3638 
        set_a $7f,0
3639 
        cmp abs1,y
3640 
        tst_a $7f,fzc
3641 
        set_a $7e,0
3642 
        cmp abs1,y
3643 
        tst_a $7e,fn
3644 
        set_a $80,$ff
3645 
        cmp abs1,y
3646 
        tst_a $80,~fnz
3647 
        set_a $7f,$ff
3648 
        cmp abs1,y
3649 
        tst_a $7f,~fn
3650 
        set_a $7e,$ff
3651 
        cmp abs1,y
3652 
        tst_a $7e,~fzc
3653 
 
3654 
        set_a $80,0
3655 
        cmp (ind1,x)
3656 
        tst_a $80,fc
3657 
        set_a $7f,0
3658 
        cmp (ind1,x)
3659 
        tst_a $7f,fzc
3660 
        set_a $7e,0
3661 
        cmp (ind1,x)
3662 
        tst_a $7e,fn
3663 
        set_a $80,$ff
3664 
        cmp (ind1,x)
3665 
        tst_a $80,~fnz
3666 
        set_a $7f,$ff
3667 
        cmp (ind1,x)
3668 
        tst_a $7f,~fn
3669 
        set_a $7e,$ff
3670 
        cmp (ind1,x)
3671 
        tst_a $7e,~fzc
3672 
 
3673 
        set_a $80,0
3674 
        cmp (ind1),y
3675 
        tst_a $80,fc
3676 
        set_a $7f,0
3677 
        cmp (ind1),y
3678 
        tst_a $7f,fzc
3679 
        set_a $7e,0
3680 
        cmp (ind1),y
3681 
        tst_a $7e,fn
3682 
        set_a $80,$ff
3683 
        cmp (ind1),y
3684 
        tst_a $80,~fnz
3685 
        set_a $7f,$ff
3686 
        cmp (ind1),y
3687 
        tst_a $7f,~fn
3688 
        set_a $7e,$ff
3689 
        cmp (ind1),y
3690 
        tst_a $7e,~fzc
3691 
        next_test
3692 
 
3693 
; testing shifts - ASL LSR ROL ROR all addressing modes
3694 
; shifts - accumulator
3695 
        ldx #3
3696 
tasl
3697 
        set_ax zp1,0
3698 
        asl a
3699 
        tst_ax rASL,fASL,0
3700 
        dex
3701 
        bpl tasl
3702 
        ldx #3
3703 
tasl1
3704 
        set_ax zp1,$ff
3705 
        asl a
3706 
        tst_ax rASL,fASL,$ff-fnzc
3707 
        dex
3708 
        bpl tasl1
3709 
 
3710 
        ldx #3
3711 
tlsr
3712 
        set_ax zp1,0
3713 
        lsr a
3714 
        tst_ax rLSR,fLSR,0
3715 
        dex
3716 
        bpl tlsr
3717 
        ldx #3
3718 
tlsr1
3719 
        set_ax zp1,$ff
3720 
        lsr a
3721 
        tst_ax rLSR,fLSR,$ff-fnzc
3722 
        dex
3723 
        bpl tlsr1
3724 
 
3725 
        ldx #3
3726 
trol
3727 
        set_ax zp1,0
3728 
        rol a
3729 
        tst_ax rROL,fROL,0
3730 
        dex
3731 
        bpl trol
3732 
        ldx #3
3733 
trol1
3734 
        set_ax zp1,$ff-fc
3735 
        rol a
3736 
        tst_ax rROL,fROL,$ff-fnzc
3737 
        dex
3738 
        bpl trol1
3739 
 
3740 
        ldx #3
3741 
trolc
3742 
        set_ax zp1,fc
3743 
        rol a
3744 
        tst_ax rROLc,fROLc,0
3745 
        dex
3746 
        bpl trolc
3747 
        ldx #3
3748 
trolc1
3749 
        set_ax zp1,$ff
3750 
        rol a
3751 
        tst_ax rROLc,fROLc,$ff-fnzc
3752 
        dex
3753 
        bpl trolc1
3754 
 
3755 
        ldx #3
3756 
tror
3757 
        set_ax zp1,0
3758 
        ror a
3759 
        tst_ax rROR,fROR,0
3760 
        dex
3761 
        bpl tror
3762 
        ldx #3
3763 
tror1
3764 
        set_ax zp1,$ff-fc
3765 
        ror a
3766 
        tst_ax rROR,fROR,$ff-fnzc
3767 
        dex
3768 
        bpl tror1
3769 
 
3770 
        ldx #3
3771 
trorc
3772 
        set_ax zp1,fc
3773 
        ror a
3774 
        tst_ax rRORc,fRORc,0
3775 
        dex
3776 
        bpl trorc
3777 
        ldx #3
3778 
trorc1
3779 
        set_ax zp1,$ff
3780 
        ror a
3781 
        tst_ax rRORc,fRORc,$ff-fnzc
3782 
        dex
3783 
        bpl trorc1
3784 
        next_test
3785 
 
3786 
; shifts - zeropage
3787 
        ldx #3
3788 
tasl2
3789 
        set_z zp1,0
3790 
        asl zpt
3791 
        tst_z rASL,fASL,0
3792 
        dex
3793 
        bpl tasl2
3794 
        ldx #3
3795 
tasl3
3796 
        set_z zp1,$ff
3797 
        asl zpt
3798 
        tst_z rASL,fASL,$ff-fnzc
3799 
        dex
3800 
        bpl tasl3
3801 
 
3802 
        ldx #3
3803 
tlsr2
3804 
        set_z zp1,0
3805 
        lsr zpt
3806 
        tst_z rLSR,fLSR,0
3807 
        dex
3808 
        bpl tlsr2
3809 
        ldx #3
3810 
tlsr3
3811 
        set_z zp1,$ff
3812 
        lsr zpt
3813 
        tst_z rLSR,fLSR,$ff-fnzc
3814 
        dex
3815 
        bpl tlsr3
3816 
 
3817 
        ldx #3
3818 
trol2
3819 
        set_z zp1,0
3820 
        rol zpt
3821 
        tst_z rROL,fROL,0
3822 
        dex
3823 
        bpl trol2
3824 
        ldx #3
3825 
trol3
3826 
        set_z zp1,$ff-fc
3827 
        rol zpt
3828 
        tst_z rROL,fROL,$ff-fnzc
3829 
        dex
3830 
        bpl trol3
3831 
 
3832 
        ldx #3
3833 
trolc2
3834 
        set_z zp1,fc
3835 
        rol zpt
3836 
        tst_z rROLc,fROLc,0
3837 
        dex
3838 
        bpl trolc2
3839 
        ldx #3
3840 
trolc3
3841 
        set_z zp1,$ff
3842 
        rol zpt
3843 
        tst_z rROLc,fROLc,$ff-fnzc
3844 
        dex
3845 
        bpl trolc3
3846 
 
3847 
        ldx #3
3848 
tror2
3849 
        set_z zp1,0
3850 
        ror zpt
3851 
        tst_z rROR,fROR,0
3852 
        dex
3853 
        bpl tror2
3854 
        ldx #3
3855 
tror3
3856 
        set_z zp1,$ff-fc
3857 
        ror zpt
3858 
        tst_z rROR,fROR,$ff-fnzc
3859 
        dex
3860 
        bpl tror3
3861 
 
3862 
        ldx #3
3863 
trorc2
3864 
        set_z zp1,fc
3865 
        ror zpt
3866 
        tst_z rRORc,fRORc,0
3867 
        dex
3868 
        bpl trorc2
3869 
        ldx #3
3870 
trorc3
3871 
        set_z zp1,$ff
3872 
        ror zpt
3873 
        tst_z rRORc,fRORc,$ff-fnzc
3874 
        dex
3875 
        bpl trorc3
3876 
        next_test
3877 
 
3878 
; shifts - absolute
3879 
        ldx #3
3880 
tasl4
3881 
        set_abs zp1,0
3882 
        asl abst
3883 
        tst_abs rASL,fASL,0
3884 
        dex
3885 
        bpl tasl4
3886 
        ldx #3
3887 
tasl5
3888 
        set_abs zp1,$ff
3889 
        asl abst
3890 
        tst_abs rASL,fASL,$ff-fnzc
3891 
        dex
3892 
        bpl tasl5
3893 
 
3894 
        ldx #3
3895 
tlsr4
3896 
        set_abs zp1,0
3897 
        lsr abst
3898 
        tst_abs rLSR,fLSR,0
3899 
        dex
3900 
        bpl tlsr4
3901 
        ldx #3
3902 
tlsr5
3903 
        set_abs zp1,$ff
3904 
        lsr abst
3905 
        tst_abs rLSR,fLSR,$ff-fnzc
3906 
        dex
3907 
        bpl tlsr5
3908 
 
3909 
        ldx #3
3910 
trol4
3911 
        set_abs zp1,0
3912 
        rol abst
3913 
        tst_abs rROL,fROL,0
3914 
        dex
3915 
        bpl trol4
3916 
        ldx #3
3917 
trol5
3918 
        set_abs zp1,$ff-fc
3919 
        rol abst
3920 
        tst_abs rROL,fROL,$ff-fnzc
3921 
        dex
3922 
        bpl trol5
3923 
 
3924 
        ldx #3
3925 
trolc4
3926 
        set_abs zp1,fc
3927 
        rol abst
3928 
        tst_abs rROLc,fROLc,0
3929 
        dex
3930 
        bpl trolc4
3931 
        ldx #3
3932 
trolc5
3933 
        set_abs zp1,$ff
3934 
        rol abst
3935 
        tst_abs rROLc,fROLc,$ff-fnzc
3936 
        dex
3937 
        bpl trolc5
3938 
 
3939 
        ldx #3
3940 
tror4
3941 
        set_abs zp1,0
3942 
        ror abst
3943 
        tst_abs rROR,fROR,0
3944 
        dex
3945 
        bpl tror4
3946 
        ldx #3
3947 
tror5
3948 
        set_abs zp1,$ff-fc
3949 
        ror abst
3950 
        tst_abs rROR,fROR,$ff-fnzc
3951 
        dex
3952 
        bpl tror5
3953 
 
3954 
        ldx #3
3955 
trorc4
3956 
        set_abs zp1,fc
3957 
        ror abst
3958 
        tst_abs rRORc,fRORc,0
3959 
        dex
3960 
        bpl trorc4
3961 
        ldx #3
3962 
trorc5
3963 
        set_abs zp1,$ff
3964 
        ror abst
3965 
        tst_abs rRORc,fRORc,$ff-fnzc
3966 
        dex
3967 
        bpl trorc5
3968 
        next_test
3969 
 
3970 
; shifts - zp indexed
3971 
        ldx #3
3972 
tasl6
3973 
        set_zx zp1,0
3974 
        asl zpt,x
3975 
        tst_zx rASL,fASL,0
3976 
        dex
3977 
        bpl tasl6
3978 
        ldx #3
3979 
tasl7
3980 
        set_zx zp1,$ff
3981 
        asl zpt,x
3982 
        tst_zx rASL,fASL,$ff-fnzc
3983 
        dex
3984 
        bpl tasl7
3985 
 
3986 
        ldx #3
3987 
tlsr6
3988 
        set_zx zp1,0
3989 
        lsr zpt,x
3990 
        tst_zx rLSR,fLSR,0
3991 
        dex
3992 
        bpl tlsr6
3993 
        ldx #3
3994 
tlsr7
3995 
        set_zx zp1,$ff
3996 
        lsr zpt,x
3997 
        tst_zx rLSR,fLSR,$ff-fnzc
3998 
        dex
3999 
        bpl tlsr7
4000 
 
4001 
        ldx #3
4002 
trol6
4003 
        set_zx zp1,0
4004 
        rol zpt,x
4005 
        tst_zx rROL,fROL,0
4006 
        dex
4007 
        bpl trol6
4008 
        ldx #3
4009 
trol7
4010 
        set_zx zp1,$ff-fc
4011 
        rol zpt,x
4012 
        tst_zx rROL,fROL,$ff-fnzc
4013 
        dex
4014 
        bpl trol7
4015 
 
4016 
        ldx #3
4017 
trolc6
4018 
        set_zx zp1,fc
4019 
        rol zpt,x
4020 
        tst_zx rROLc,fROLc,0
4021 
        dex
4022 
        bpl trolc6
4023 
        ldx #3
4024 
trolc7
4025 
        set_zx zp1,$ff
4026 
        rol zpt,x
4027 
        tst_zx rROLc,fROLc,$ff-fnzc
4028 
        dex
4029 
        bpl trolc7
4030 
 
4031 
        ldx #3
4032 
tror6
4033 
        set_zx zp1,0
4034 
        ror zpt,x
4035 
        tst_zx rROR,fROR,0
4036 
        dex
4037 
        bpl tror6
4038 
        ldx #3
4039 
tror7
4040 
        set_zx zp1,$ff-fc
4041 
        ror zpt,x
4042 
        tst_zx rROR,fROR,$ff-fnzc
4043 
        dex
4044 
        bpl tror7
4045 
 
4046 
        ldx #3
4047 
trorc6
4048 
        set_zx zp1,fc
4049 
        ror zpt,x
4050 
        tst_zx rRORc,fRORc,0
4051 
        dex
4052 
        bpl trorc6
4053 
        ldx #3
4054 
trorc7
4055 
        set_zx zp1,$ff
4056 
        ror zpt,x
4057 
        tst_zx rRORc,fRORc,$ff-fnzc
4058 
        dex
4059 
        bpl trorc7
4060 
        next_test
4061 
 
4062 
; shifts - abs indexed
4063 
        ldx #3
4064 
tasl8
4065 
        set_absx zp1,0
4066 
        asl abst,x
4067 
        tst_absx rASL,fASL,0
4068 
        dex
4069 
        bpl tasl8
4070 
        ldx #3
4071 
tasl9
4072 
        set_absx zp1,$ff
4073 
        asl abst,x
4074 
        tst_absx rASL,fASL,$ff-fnzc
4075 
        dex
4076 
        bpl tasl9
4077 
 
4078 
        ldx #3
4079 
tlsr8
4080 
        set_absx zp1,0
4081 
        lsr abst,x
4082 
        tst_absx rLSR,fLSR,0
4083 
        dex
4084 
        bpl tlsr8
4085 
        ldx #3
4086 
tlsr9
4087 
        set_absx zp1,$ff
4088 
        lsr abst,x
4089 
        tst_absx rLSR,fLSR,$ff-fnzc
4090 
        dex
4091 
        bpl tlsr9
4092 
 
4093 
        ldx #3
4094 
trol8
4095 
        set_absx zp1,0
4096 
        rol abst,x
4097 
        tst_absx rROL,fROL,0
4098 
        dex
4099 
        bpl trol8
4100 
        ldx #3
4101 
trol9
4102 
        set_absx zp1,$ff-fc
4103 
        rol abst,x
4104 
        tst_absx rROL,fROL,$ff-fnzc
4105 
        dex
4106 
        bpl trol9
4107 
 
4108 
        ldx #3
4109 
trolc8
4110 
        set_absx zp1,fc
4111 
        rol abst,x
4112 
        tst_absx rROLc,fROLc,0
4113 
        dex
4114 
        bpl trolc8
4115 
        ldx #3
4116 
trolc9
4117 
        set_absx zp1,$ff
4118 
        rol abst,x
4119 
        tst_absx rROLc,fROLc,$ff-fnzc
4120 
        dex
4121 
        bpl trolc9
4122 
 
4123 
        ldx #3
4124 
tror8
4125 
        set_absx zp1,0
4126 
        ror abst,x
4127 
        tst_absx rROR,fROR,0
4128 
        dex
4129 
        bpl tror8
4130 
        ldx #3
4131 
tror9
4132 
        set_absx zp1,$ff-fc
4133 
        ror abst,x
4134 
        tst_absx rROR,fROR,$ff-fnzc
4135 
        dex
4136 
        bpl tror9
4137 
 
4138 
        ldx #3
4139 
trorc8
4140 
        set_absx zp1,fc
4141 
        ror abst,x
4142 
        tst_absx rRORc,fRORc,0
4143 
        dex
4144 
        bpl trorc8
4145 
        ldx #3
4146 
trorc9
4147 
        set_absx zp1,$ff
4148 
        ror abst,x
4149 
        tst_absx rRORc,fRORc,$ff-fnzc
4150 
        dex
4151 
        bpl trorc9
4152 
        next_test
4153 
 
4154 
; testing memory increment/decrement - INC DEC all addressing modes
4155 
; zeropage
4156 
        ldx #0
4157 
        lda #$7e
4158 
        sta zpt
4159 
tinc
4160 
        set_stat 0
4161 
        inc zpt
4162 
        tst_z rINC,fINC,0
4163 
        inx
4164 
        cpx #2
4165 
        bne tinc1
4166 
        lda #$fe
4167 
        sta zpt
4168 
tinc1   cpx #5
4169 
        bne tinc
4170 
        dex
4171 
        inc zpt
4172 
tdec
4173 
        set_stat 0
4174 
        dec zpt
4175 
        tst_z rINC,fINC,0
4176 
        dex
4177 
        bmi tdec1
4178 
        cpx #1
4179 
        bne tdec
4180 
        lda #$81
4181 
        sta zpt
4182 
        bne tdec
4183 
tdec1
4184 
        ldx #0
4185 
        lda #$7e
4186 
        sta zpt
4187 
tinc10
4188 
        set_stat $ff
4189 
        inc zpt
4190 
        tst_z rINC,fINC,$ff-fnz
4191 
        inx
4192 
        cpx #2
4193 
        bne tinc11
4194 
        lda #$fe
4195 
        sta zpt
4196 
tinc11  cpx #5
4197 
        bne tinc10
4198 
        dex
4199 
        inc zpt
4200 
tdec10
4201 
        set_stat $ff
4202 
        dec zpt
4203 
        tst_z rINC,fINC,$ff-fnz
4204 
        dex
4205 
        bmi tdec11
4206 
        cpx #1
4207 
        bne tdec10
4208 
        lda #$81
4209 
        sta zpt
4210 
        bne tdec10
4211 
tdec11
4212 
        next_test
4213 
 
4214 
; absolute memory
4215 
        ldx #0
4216 
        lda #$7e
4217 
        sta abst
4218 
tinc2
4219 
        set_stat 0
4220 
        inc abst
4221 
        tst_abs rINC,fINC,0
4222 
        inx
4223 
        cpx #2
4224 
        bne tinc3
4225 
        lda #$fe
4226 
        sta abst
4227 
tinc3   cpx #5
4228 
        bne tinc2
4229 
        dex
4230 
        inc abst
4231 
tdec2
4232 
        set_stat 0
4233 
        dec abst
4234 
        tst_abs rINC,fINC,0
4235 
        dex
4236 
        bmi tdec3
4237 
        cpx #1
4238 
        bne tdec2
4239 
        lda #$81
4240 
        sta abst
4241 
        bne tdec2
4242 
tdec3
4243 
        ldx #0
4244 
        lda #$7e
4245 
        sta abst
4246 
tinc12
4247 
        set_stat $ff
4248 
        inc abst
4249 
        tst_abs rINC,fINC,$ff-fnz
4250 
        inx
4251 
        cpx #2
4252 
        bne tinc13
4253 
        lda #$fe
4254 
        sta abst
4255 
tinc13   cpx #5
4256 
        bne tinc12
4257 
        dex
4258 
        inc abst
4259 
tdec12
4260 
        set_stat $ff
4261 
        dec abst
4262 
        tst_abs rINC,fINC,$ff-fnz
4263 
        dex
4264 
        bmi tdec13
4265 
        cpx #1
4266 
        bne tdec12
4267 
        lda #$81
4268 
        sta abst
4269 
        bne tdec12
4270 
tdec13
4271 
        next_test
4272 
 
4273 
; zeropage indexed
4274 
        ldx #0
4275 
        lda #$7e
4276 
tinc4   sta zpt,x
4277 
        set_stat 0
4278 
        inc zpt,x
4279 
        tst_zx rINC,fINC,0
4280 
        lda zpt,x
4281 
        inx
4282 
        cpx #2
4283 
        bne tinc5
4284 
        lda #$fe
4285 
tinc5   cpx #5
4286 
        bne tinc4
4287 
        dex
4288 
        lda #2
4289 
tdec4   sta zpt,x
4290 
        set_stat 0
4291 
        dec zpt,x
4292 
        tst_zx rINC,fINC,0
4293 
        lda zpt,x
4294 
        dex
4295 
        bmi tdec5
4296 
        cpx #1
4297 
        bne tdec4
4298 
        lda #$81
4299 
        bne tdec4
4300 
tdec5
4301 
        ldx #0
4302 
        lda #$7e
4303 
tinc14  sta zpt,x
4304 
        set_stat $ff
4305 
        inc zpt,x
4306 
        tst_zx rINC,fINC,$ff-fnz
4307 
        lda zpt,x
4308 
        inx
4309 
        cpx #2
4310 
        bne tinc15
4311 
        lda #$fe
4312 
tinc15  cpx #5
4313 
        bne tinc14
4314 
        dex
4315 
        lda #2
4316 
tdec14  sta zpt,x
4317 
        set_stat $ff
4318 
        dec zpt,x
4319 
        tst_zx rINC,fINC,$ff-fnz
4320 
        lda zpt,x
4321 
        dex
4322 
        bmi tdec15
4323 
        cpx #1
4324 
        bne tdec14
4325 
        lda #$81
4326 
        bne tdec14
4327 
tdec15
4328 
        next_test
4329 
 
4330 
; memory indexed
4331 
        ldx #0
4332 
        lda #$7e
4333 
tinc6   sta abst,x
4334 
        set_stat 0
4335 
        inc abst,x
4336 
        tst_absx rINC,fINC,0
4337 
        lda abst,x
4338 
        inx
4339 
        cpx #2
4340 
        bne tinc7
4341 
        lda #$fe
4342 
tinc7   cpx #5
4343 
        bne tinc6
4344 
        dex
4345 
        lda #2
4346 
tdec6   sta abst,x
4347 
        set_stat 0
4348 
        dec abst,x
4349 
        tst_absx rINC,fINC,0
4350 
        lda abst,x
4351 
        dex
4352 
        bmi tdec7
4353 
        cpx #1
4354 
        bne tdec6
4355 
        lda #$81
4356 
        bne tdec6
4357 
tdec7
4358 
        ldx #0
4359 
        lda #$7e
4360 
tinc16  sta abst,x
4361 
        set_stat $ff
4362 
        inc abst,x
4363 
        tst_absx rINC,fINC,$ff-fnz
4364 
        lda abst,x
4365 
        inx
4366 
        cpx #2
4367 
        bne tinc17
4368 
        lda #$fe
4369 
tinc17  cpx #5
4370 
        bne tinc16
4371 
        dex
4372 
        lda #2
4373 
tdec16  sta abst,x
4374 
        set_stat $ff
4375 
        dec abst,x
4376 
        tst_absx rINC,fINC,$ff-fnz
4377 
        lda abst,x
4378 
        dex
4379 
        bmi tdec17
4380 
        cpx #1
4381 
        bne tdec16
4382 
        lda #$81
4383 
        bne tdec16
4384 
tdec17
4385 
        next_test
4386 
 
4387 
; testing logical instructions - AND EOR ORA all addressing modes
4388 
; AND
4389 
        ldx #3      ;immediate - self modifying code
4390 
tand    lda zpAN,x
4391 
        sta tandi1
4392 
        set_ax  absANa,0
4393 
tandi1  equ *+1     ;target for immediate operand
4394 
        and #99
4395 
        tst_ax  absrlo,absflo,0
4396 
        dex
4397 
        bpl tand
4398 
        ldx #3
4399 
tand1   lda zpAN,x
4400 
        sta tandi2
4401 
        set_ax  absANa,$ff
4402 
tandi2  equ *+1     ;target for immediate operand
4403 
        and #99
4404 
        tst_ax  absrlo,absflo,$ff-fnz
4405 
        dex
4406 
        bpl tand1
4407 
 
4408 
        ldx #3      ;zp
4409 
tand2    lda zpAN,x
4410 
        sta zpt
4411 
        set_ax  absANa,0
4412 
        and zpt
4413 
        tst_ax  absrlo,absflo,0
4414 
        dex
4415 
        bpl tand2
4416 
        ldx #3
4417 
tand3   lda zpAN,x
4418 
        sta zpt
4419 
        set_ax  absANa,$ff
4420 
        and zpt
4421 
        tst_ax  absrlo,absflo,$ff-fnz
4422 
        dex
4423 
        bpl tand3
4424 
 
4425 
        ldx #3      ;abs
4426 
tand4   lda zpAN,x
4427 
        sta abst
4428 
        set_ax  absANa,0
4429 
        and abst
4430 
        tst_ax  absrlo,absflo,0
4431 
        dex
4432 
        bpl tand4
4433 
        ldx #3
4434 
tand5   lda zpAN,x
4435 
        sta abst
4436 
        set_ax  absANa,$ff
4437 
        and abst
4438 
        tst_ax  absrlo,absflo,$ff-fnz
4439 
        dex
4440 
        bpl tand6
4441 
 
4442 
        ldx #3      ;zp,x
4443 
tand6
4444 
        set_ax  absANa,0
4445 
        and zpAN,x
4446 
        tst_ax  absrlo,absflo,0
4447 
        dex
4448 
        bpl tand6
4449 
        ldx #3
4450 
tand7
4451 
        set_ax  absANa,$ff
4452 
        and zpAN,x
4453 
        tst_ax  absrlo,absflo,$ff-fnz
4454 
        dex
4455 
        bpl tand7
4456 
 
4457 
        ldx #3      ;abs,x
4458 
tand8
4459 
        set_ax  absANa,0
4460 
        and absAN,x
4461 
        tst_ax  absrlo,absflo,0
4462 
        dex
4463 
        bpl tand8
4464 
        ldx #3
4465 
tand9
4466 
        set_ax  absANa,$ff
4467 
        and absAN,x
4468 
        tst_ax  absrlo,absflo,$ff-fnz
4469 
        dex
4470 
        bpl tand9
4471 
 
4472 
        ldy #3      ;abs,y
4473 
tand10
4474 
        set_ay  absANa,0
4475 
        and absAN,y
4476 
        tst_ay  absrlo,absflo,0
4477 
        dey
4478 
        bpl tand10
4479 
        ldy #3
4480 
tand11
4481 
        set_ay  absANa,$ff
4482 
        and absAN,y
4483 
        tst_ay  absrlo,absflo,$ff-fnz
4484 
        dey
4485 
        bpl tand11
4486 
 
4487 
        ldx #6      ;(zp,x)
4488 
        ldy #3
4489 
tand12
4490 
        set_ay  absANa,0
4491 
        and (indAN,x)
4492 
        tst_ay  absrlo,absflo,0
4493 
        dex
4494 
        dex
4495 
        dey
4496 
        bpl tand12
4497 
        ldx #6
4498 
        ldy #3
4499 
tand13
4500 
        set_ay  absANa,$ff
4501 
        and (indAN,x)
4502 
        tst_ay  absrlo,absflo,$ff-fnz
4503 
        dex
4504 
        dex
4505 
        dey
4506 
        bpl tand13
4507 
 
4508 
        ldy #3      ;(zp),y
4509 
tand14
4510 
        set_ay  absANa,0
4511 
        and (indAN),y
4512 
        tst_ay  absrlo,absflo,0
4513 
        dey
4514 
        bpl tand14
4515 
        ldy #3
4516 
tand15
4517 
        set_ay  absANa,$ff
4518 
        and (indAN),y
4519 
        tst_ay  absrlo,absflo,$ff-fnz
4520 
        dey
4521 
        bpl tand15
4522 
        next_test
4523 
 
4524 
; EOR
4525 
        ldx #3      ;immediate - self modifying code
4526 
teor    lda zpEO,x
4527 
        sta teori1
4528 
        set_ax  absEOa,0
4529 
teori1  equ *+1     ;target for immediate operand
4530 
        eor #99
4531 
        tst_ax  absrlo,absflo,0
4532 
        dex
4533 
        bpl teor
4534 
        ldx #3
4535 
teor1   lda zpEO,x
4536 
        sta teori2
4537 
        set_ax  absEOa,$ff
4538 
teori2  equ *+1     ;target for immediate operand
4539 
        eor #99
4540 
        tst_ax  absrlo,absflo,$ff-fnz
4541 
        dex
4542 
        bpl teor1
4543 
 
4544 
        ldx #3      ;zp
4545 
teor2    lda zpEO,x
4546 
        sta zpt
4547 
        set_ax  absEOa,0
4548 
        eor zpt
4549 
        tst_ax  absrlo,absflo,0
4550 
        dex
4551 
        bpl teor2
4552 
        ldx #3
4553 
teor3   lda zpEO,x
4554 
        sta zpt
4555 
        set_ax  absEOa,$ff
4556 
        eor zpt
4557 
        tst_ax  absrlo,absflo,$ff-fnz
4558 
        dex
4559 
        bpl teor3
4560 
 
4561 
        ldx #3      ;abs
4562 
teor4   lda zpEO,x
4563 
        sta abst
4564 
        set_ax  absEOa,0
4565 
        eor abst
4566 
        tst_ax  absrlo,absflo,0
4567 
        dex
4568 
        bpl teor4
4569 
        ldx #3
4570 
teor5   lda zpEO,x
4571 
        sta abst
4572 
        set_ax  absEOa,$ff
4573 
        eor abst
4574 
        tst_ax  absrlo,absflo,$ff-fnz
4575 
        dex
4576 
        bpl teor6
4577 
 
4578 
        ldx #3      ;zp,x
4579 
teor6
4580 
        set_ax  absEOa,0
4581 
        eor zpEO,x
4582 
        tst_ax  absrlo,absflo,0
4583 
        dex
4584 
        bpl teor6
4585 
        ldx #3
4586 
teor7
4587 
        set_ax  absEOa,$ff
4588 
        eor zpEO,x
4589 
        tst_ax  absrlo,absflo,$ff-fnz
4590 
        dex
4591 
        bpl teor7
4592 
 
4593 
        ldx #3      ;abs,x
4594 
teor8
4595 
        set_ax  absEOa,0
4596 
        eor absEO,x
4597 
        tst_ax  absrlo,absflo,0
4598 
        dex
4599 
        bpl teor8
4600 
        ldx #3
4601 
teor9
4602 
        set_ax  absEOa,$ff
4603 
        eor absEO,x
4604 
        tst_ax  absrlo,absflo,$ff-fnz
4605 
        dex
4606 
        bpl teor9
4607 
 
4608 
        ldy #3      ;abs,y
4609 
teor10
4610 
        set_ay  absEOa,0
4611 
        eor absEO,y
4612 
        tst_ay  absrlo,absflo,0
4613 
        dey
4614 
        bpl teor10
4615 
        ldy #3
4616 
teor11
4617 
        set_ay  absEOa,$ff
4618 
        eor absEO,y
4619 
        tst_ay  absrlo,absflo,$ff-fnz
4620 
        dey
4621 
        bpl teor11
4622 
 
4623 
        ldx #6      ;(zp,x)
4624 
        ldy #3
4625 
teor12
4626 
        set_ay  absEOa,0
4627 
        eor (indEO,x)
4628 
        tst_ay  absrlo,absflo,0
4629 
        dex
4630 
        dex
4631 
        dey
4632 
        bpl teor12
4633 
        ldx #6
4634 
        ldy #3
4635 
teor13
4636 
        set_ay  absEOa,$ff
4637 
        eor (indEO,x)
4638 
        tst_ay  absrlo,absflo,$ff-fnz
4639 
        dex
4640 
        dex
4641 
        dey
4642 
        bpl teor13
4643 
 
4644 
        ldy #3      ;(zp),y
4645 
teor14
4646 
        set_ay  absEOa,0
4647 
        eor (indEO),y
4648 
        tst_ay  absrlo,absflo,0
4649 
        dey
4650 
        bpl teor14
4651 
        ldy #3
4652 
teor15
4653 
        set_ay  absEOa,$ff
4654 
        eor (indEO),y
4655 
        tst_ay  absrlo,absflo,$ff-fnz
4656 
        dey
4657 
        bpl teor15
4658 
        next_test
4659 
 
4660 
; OR
4661 
        ldx #3      ;immediate - self modifying code
4662 
tora    lda zpOR,x
4663 
        sta torai1
4664 
        set_ax  absORa,0
4665 
torai1  equ *+1     ;target for immediate operand
4666 
        ora #99
4667 
        tst_ax  absrlo,absflo,0
4668 
        dex
4669 
        bpl tora
4670 
        ldx #3
4671 
tora1   lda zpOR,x
4672 
        sta torai2
4673 
        set_ax  absORa,$ff
4674 
torai2  equ *+1     ;target for immediate operand
4675 
        ora #99
4676 
        tst_ax  absrlo,absflo,$ff-fnz
4677 
        dex
4678 
        bpl tora1
4679 
 
4680 
        ldx #3      ;zp
4681 
tora2    lda zpOR,x
4682 
        sta zpt
4683 
        set_ax  absORa,0
4684 
        ora zpt
4685 
        tst_ax  absrlo,absflo,0
4686 
        dex
4687 
        bpl tora2
4688 
        ldx #3
4689 
tora3   lda zpOR,x
4690 
        sta zpt
4691 
        set_ax  absORa,$ff
4692 
        ora zpt
4693 
        tst_ax  absrlo,absflo,$ff-fnz
4694 
        dex
4695 
        bpl tora3
4696 
 
4697 
        ldx #3      ;abs
4698 
tora4   lda zpOR,x
4699 
        sta abst
4700 
        set_ax  absORa,0
4701 
        ora abst
4702 
        tst_ax  absrlo,absflo,0
4703 
        dex
4704 
        bpl tora4
4705 
        ldx #3
4706 
tora5   lda zpOR,x
4707 
        sta abst
4708 
        set_ax  absORa,$ff
4709 
        ora abst
4710 
        tst_ax  absrlo,absflo,$ff-fnz
4711 
        dex
4712 
        bpl tora6
4713 
 
4714 
        ldx #3      ;zp,x
4715 
tora6
4716 
        set_ax  absORa,0
4717 
        ora zpOR,x
4718 
        tst_ax  absrlo,absflo,0
4719 
        dex
4720 
        bpl tora6
4721 
        ldx #3
4722 
tora7
4723 
        set_ax  absORa,$ff
4724 
        ora zpOR,x
4725 
        tst_ax  absrlo,absflo,$ff-fnz
4726 
        dex
4727 
        bpl tora7
4728 
 
4729 
        ldx #3      ;abs,x
4730 
tora8
4731 
        set_ax  absORa,0
4732 
        ora absOR,x
4733 
        tst_ax  absrlo,absflo,0
4734 
        dex
4735 
        bpl tora8
4736 
        ldx #3
4737 
tora9
4738 
        set_ax  absORa,$ff
4739 
        ora absOR,x
4740 
        tst_ax  absrlo,absflo,$ff-fnz
4741 
        dex
4742 
        bpl tora9
4743 
 
4744 
        ldy #3      ;abs,y
4745 
tora10
4746 
        set_ay  absORa,0
4747 
        ora absOR,y
4748 
        tst_ay  absrlo,absflo,0
4749 
        dey
4750 
        bpl tora10
4751 
        ldy #3
4752 
tora11
4753 
        set_ay  absORa,$ff
4754 
        ora absOR,y
4755 
        tst_ay  absrlo,absflo,$ff-fnz
4756 
        dey
4757 
        bpl tora11
4758 
 
4759 
        ldx #6      ;(zp,x)
4760 
        ldy #3
4761 
tora12
4762 
        set_ay  absORa,0
4763 
        ora (indOR,x)
4764 
        tst_ay  absrlo,absflo,0
4765 
        dex
4766 
        dex
4767 
        dey
4768 
        bpl tora12
4769 
        ldx #6
4770 
        ldy #3
4771 
tora13
4772 
        set_ay  absORa,$ff
4773 
        ora (indOR,x)
4774 
        tst_ay  absrlo,absflo,$ff-fnz
4775 
        dex
4776 
        dex
4777 
        dey
4778 
        bpl tora13
4779 
 
4780 
        ldy #3      ;(zp),y
4781 
tora14
4782 
        set_ay  absORa,0
4783 
        ora (indOR),y
4784 
        tst_ay  absrlo,absflo,0
4785 
        dey
4786 
        bpl tora14
4787 
        ldy #3
4788 
tora15
4789 
        set_ay  absORa,$ff
4790 
        ora (indOR),y
4791 
        tst_ay  absrlo,absflo,$ff-fnz
4792 
        dey
4793 
        bpl tora15
4794 
    if I_flag = 3
4795 
        cli
4796 
    endif
4797 
 
4798 
bin_test
4799 
    if skip_bin_test = 1
4800 
        jmp dec_test
4801 
    else
4802 
        lda #test_num
4803 
        sta test_case
4804 
    endif
4805 
 
4806 
        next_test
4807 
 
4808 
 
4809 
; full binary add/subtract test
4810 
; iterates through all combinations of operands and carry input
4811 
; uses increments/decrements to predict result & result flags
4812 
        cld
4813 
        ldx #ad2        ;for indexed test
4814 
        ldy #$ff        ;max range
4815 
        lda #0          ;start with adding zeroes & no carry
4816 
        sta adfc        ;carry in - for diag
4817 
        sta ad1         ;operand 1 - accumulator
4818 
        sta ad2         ;operand 2 - memory or immediate
4819 
        sta ada2        ;non zp
4820 
        sta adrl        ;expected result bits 0-7
4821 
        sta adrh        ;expected result bit 8 (carry out)
4822 
        lda #$ff        ;complemented operand 2 for subtract
4823 
        sta sb2
4824 
        sta sba2        ;non zp
4825 
        lda #2          ;expected Z-flag
4826 
        sta adrf
4827 
tadd    clc             ;test with carry clear
4828 
        jsr chkadd
4829 
        inc adfc        ;now with carry
4830 
        inc adrl        ;result +1
4831 
        php             ;save N & Z from low result
4832 
        php
4833 
        pla             ;accu holds expected flags
4834 
        and #$82        ;mask N & Z
4835 
        plp
4836 
        bne tadd1
4837 
        inc adrh        ;result bit 8 - carry
4838 
tadd1   ora adrh        ;merge C to expected flags
4839 
        sta adrf        ;save expected flags except overflow
4840 
        sec             ;test with carry set
4841 
        jsr chkadd
4842 
        dec adfc        ;same for operand +1 but no carry
4843 
        inc ad1
4844 
        bne tadd        ;iterate op1
4845 
        lda #0          ;preset result to op2 when op1 = 0
4846 
        sta adrh
4847 
        inc ada2
4848 
        inc ad2
4849 
        php             ;save NZ as operand 2 becomes the new result
4850 
        pla
4851 
        and #$82        ;mask N00000Z0
4852 
        sta adrf        ;no need to check carry as we are adding to 0
4853 
        dec sb2         ;complement subtract operand 2
4854 
        dec sba2
4855 
        lda ad2
4856 
        sta adrl
4857 
        bne tadd        ;iterate op2
4858 
 
4859 
dec_test
4860 
    if skip_dec_test = 1
4861 
        jmp success
4862 
    else
4863 
        lda #test_num
4864 
        sta test_case
4865 
    endif
4866 
 
4867 
        next_test
4868 
 
4869 
; decimal add/subtract test
4870 
; *** WARNING - tests documented behavior only! ***
4871 
;   only valid BCD operands are tested, N V Z flags are ignored
4872 
; iterates through all valid combinations of operands and carry input
4873 
; uses increments/decrements to predict result & carry flag
4874 
        sed
4875 
        ldx #ad2        ;for indexed test
4876 
        ldy #$ff        ;max range
4877 
        lda #$99        ;start with adding 99 to 99 with carry
4878 
        sta ad1         ;operand 1 - accumulator
4879 
        sta ad2         ;operand 2 - memory or immediate
4880 
        sta ada2        ;non zp
4881 
        sta adrl        ;expected result bits 0-7
4882 
        lda #1          ;set carry in & out
4883 
        sta adfc        ;carry in - for diag
4884 
        sta adrh        ;expected result bit 8 (carry out)
4885 
        lda #0          ;complemented operand 2 for subtract
4886 
        sta sb2
4887 
        sta sba2        ;non zp
4888 
tdad    sec             ;test with carry set
4889 
        jsr chkdad
4890 
        dec adfc        ;now with carry clear
4891 
        lda adrl        ;decimal adjust result
4892 
        bne tdad1       ;skip clear carry & preset result 99 (9A-1)
4893 
        dec adrh
4894 
        lda #$99
4895 
        sta adrl
4896 
        bne tdad3
4897 
tdad1   and #$f         ;lower nibble mask
4898 
        bne tdad2       ;no decimal adjust needed
4899 
        dec adrl        ;decimal adjust (?0-6)
4900 
        dec adrl
4901 
        dec adrl
4902 
        dec adrl
4903 
        dec adrl
4904 
        dec adrl
4905 
tdad2   dec adrl        ;result -1
4906 
tdad3   clc             ;test with carry clear
4907 
        jsr chkdad
4908 
        inc adfc        ;same for operand -1 but with carry
4909 
        lda ad1         ;decimal adjust operand 1
4910 
        beq tdad5       ;iterate operand 2
4911 
        and #$f         ;lower nibble mask
4912 
        bne tdad4       ;skip decimal adjust
4913 
        dec ad1         ;decimal adjust (?0-6)
4914 
        dec ad1
4915 
        dec ad1
4916 
        dec ad1
4917 
        dec ad1
4918 
        dec ad1
4919 
tdad4   dec ad1         ;operand 1 -1
4920 
        jmp tdad        ;iterate op1
4921 
 
4922 
tdad5   lda #$99        ;precharge op1 max
4923 
        sta ad1
4924 
        lda ad2         ;decimal adjust operand 2
4925 
        beq tdad7       ;end of iteration
4926 
        and #$f         ;lower nibble mask
4927 
        bne tdad6       ;skip decimal adjust
4928 
        dec ad2         ;decimal adjust (?0-6)
4929 
        dec ad2
4930 
        dec ad2
4931 
        dec ad2
4932 
        dec ad2
4933 
        dec ad2
4934 
        inc sb2         ;complemented decimal adjust for subtract (?9+6)
4935 
        inc sb2
4936 
        inc sb2
4937 
        inc sb2
4938 
        inc sb2
4939 
        inc sb2
4940 
tdad6   dec ad2         ;operand 2 -1
4941 
        inc sb2         ;complemented operand for subtract
4942 
        lda sb2
4943 
        sta sba2        ;copy as non zp operand
4944 
        lda ad2
4945 
        sta ada2        ;copy as non zp operand
4946 
        sta adrl        ;new result since op1+carry=00+carry +op2=op2
4947 
        inc adrh        ;result carry
4948 
        bne tdad        ;iterate op2
4949 
tdad7   cld
4950 
 
4951 
        lda test_case
4952 
        cmp #test_num
4953 
        trap_ne         ;test is out of sequence
4954 
 
4955 
; final RAM integrity test
4956 
;   verifies that none of the previous tests has altered RAM outside of the
4957 
;   designated write areas.
4958 
        check_ram
4959 
; *** DEBUG INFO ***
4960 
; to debug checksum errors uncomment check_ram in the next_test macro to
4961 
; narrow down the responsible opcode.
4962 
; may give false errors when monitor, OS or other background activity is
4963 
; allowed during previous tests.
4964 
 
4965 
 
4966 
 
4967 
; S U C C E S S ************************************************
4968 
; -------------
4969 
success jmp start       ;if you get here everything went well
4970 
; -------------
4971 
; S U C C E S S ************************************************
4972 
 
4973 
; core subroutine of the decimal add/subtract test
4974 
; *** WARNING - tests documented behavior only! ***
4975 
;   only valid BCD operands are tested, N V Z flags are ignored
4976 
; iterates through all valid combinations of operands and carry input
4977 
; uses increments/decrements to predict result & carry flag
4978 
chkdad
4979 
; decimal ADC / SBC zp
4980 
        php             ;save carry for subtract
4981 
        lda ad1
4982 
        adc ad2         ;perform add
4983 
        php
4984 
        cmp adrl        ;check result
4985 
        trap_ne         ;bad result
4986 
        pla             ;check flags
4987 
        and #1          ;mask carry
4988 
        cmp adrh
4989 
        trap_ne         ;bad carry
4990 
        plp
4991 
        php             ;save carry for next add
4992 
        lda ad1
4993 
        sbc sb2         ;perform subtract
4994 
        php
4995 
        cmp adrl        ;check result
4996 
        trap_ne         ;bad result
4997 
        pla             ;check flags
4998 
        and #1          ;mask carry
4999 
        cmp adrh
5000 
        trap_ne         ;bad flags
5001 
        plp
5002 
; decimal ADC / SBC abs
5003 
        php             ;save carry for subtract
5004 
        lda ad1
5005 
        adc ada2        ;perform add
5006 
        php
5007 
        cmp adrl        ;check result
5008 
        trap_ne         ;bad result
5009 
        pla             ;check flags
5010 
        and #1          ;mask carry
5011 
        cmp adrh
5012 
        trap_ne         ;bad carry
5013 
        plp
5014 
        php             ;save carry for next add
5015 
        lda ad1
5016 
        sbc sba2        ;perform subtract
5017 
        php
5018 
        cmp adrl        ;check result
5019 
        trap_ne         ;bad result
5020 
        pla             ;check flags
5021 
        and #1          ;mask carry
5022 
        cmp adrh
5023 
        trap_ne         ;bad carry
5024 
        plp
5025 
; decimal ADC / SBC #
5026 
        php             ;save carry for subtract
5027 
        lda ad2
5028 
        sta chkdadi     ;self modify immediate
5029 
        lda ad1
5030 
chkdadi = * + 1         ;operand of the immediate ADC
5031 
        adc #0          ;perform add
5032 
        php
5033 
        cmp adrl        ;check result
5034 
        trap_ne         ;bad result
5035 
        pla             ;check flags
5036 
        and #1          ;mask carry
5037 
        cmp adrh
5038 
        trap_ne         ;bad carry
5039 
        plp
5040 
        php             ;save carry for next add
5041 
        lda sb2
5042 
        sta chkdsbi     ;self modify immediate
5043 
        lda ad1
5044 
chkdsbi = * + 1         ;operand of the immediate SBC
5045 
        sbc #0          ;perform subtract
5046 
        php
5047 
        cmp adrl        ;check result
5048 
        trap_ne         ;bad result
5049 
        pla             ;check flags
5050 
        and #1          ;mask carry
5051 
        cmp adrh
5052 
        trap_ne         ;bad carry
5053 
        plp
5054 
; decimal ADC / SBC zp,x
5055 
        php             ;save carry for subtract
5056 
        lda ad1
5057 
        adc 0,x         ;perform add
5058 
        php
5059 
        cmp adrl        ;check result
5060 
        trap_ne         ;bad result
5061 
        pla             ;check flags
5062 
        and #1          ;mask carry
5063 
        cmp adrh
5064 
        trap_ne         ;bad carry
5065 
        plp
5066 
        php             ;save carry for next add
5067 
        lda ad1
5068 
        sbc sb2-ad2,x   ;perform subtract
5069 
        php
5070 
        cmp adrl        ;check result
5071 
        trap_ne         ;bad result
5072 
        pla             ;check flags
5073 
        and #1          ;mask carry
5074 
        cmp adrh
5075 
        trap_ne         ;bad carry
5076 
        plp
5077 
; decimal ADC / SBC abs,x
5078 
        php             ;save carry for subtract
5079 
        lda ad1
5080 
        adc ada2-ad2,x  ;perform add
5081 
        php
5082 
        cmp adrl        ;check result
5083 
        trap_ne         ;bad result
5084 
        pla             ;check flags
5085 
        and #1          ;mask carry
5086 
        cmp adrh
5087 
        trap_ne         ;bad carry
5088 
        plp
5089 
        php             ;save carry for next add
5090 
        lda ad1
5091 
        sbc sba2-ad2,x  ;perform subtract
5092 
        php
5093 
        cmp adrl        ;check result
5094 
        trap_ne         ;bad result
5095 
        pla             ;check flags
5096 
        and #1          ;mask carry
5097 
        cmp adrh
5098 
        trap_ne         ;bad carry
5099 
        plp
5100 
; decimal ADC / SBC abs,y
5101 
        php             ;save carry for subtract
5102 
        lda ad1
5103 
        adc ada2-$ff,y  ;perform add
5104 
        php
5105 
        cmp adrl        ;check result
5106 
        trap_ne         ;bad result
5107 
        pla             ;check flags
5108 
        and #1          ;mask carry
5109 
        cmp adrh
5110 
        trap_ne         ;bad carry
5111 
        plp
5112 
        php             ;save carry for next add
5113 
        lda ad1
5114 
        sbc sba2-$ff,y  ;perform subtract
5115 
        php
5116 
        cmp adrl        ;check result
5117 
        trap_ne         ;bad result
5118 
        pla             ;check flags
5119 
        and #1          ;mask carry
5120 
        cmp adrh
5121 
        trap_ne         ;bad carry
5122 
        plp
5123 
; decimal ADC / SBC (zp,x)
5124 
        php             ;save carry for subtract
5125 
        lda ad1
5126 
        adc (lo adi2-ad2,x) ;perform add
5127 
        php
5128 
        cmp adrl        ;check result
5129 
        trap_ne         ;bad result
5130 
        pla             ;check flags
5131 
        and #1          ;mask carry
5132 
        cmp adrh
5133 
        trap_ne         ;bad carry
5134 
        plp
5135 
        php             ;save carry for next add
5136 
        lda ad1
5137 
        sbc (lo sbi2-ad2,x) ;perform subtract
5138 
        php
5139 
        cmp adrl        ;check result
5140 
        trap_ne         ;bad result
5141 
        pla             ;check flags
5142 
        and #1          ;mask carry
5143 
        cmp adrh
5144 
        trap_ne         ;bad carry
5145 
        plp
5146 
; decimal ADC / SBC (abs),y
5147 
        php             ;save carry for subtract
5148 
        lda ad1
5149 
        adc (adiy2),y   ;perform add
5150 
        php
5151 
        cmp adrl        ;check result
5152 
        trap_ne         ;bad result
5153 
        pla             ;check flags
5154 
        and #1          ;mask carry
5155 
        cmp adrh
5156 
        trap_ne         ;bad carry
5157 
        plp
5158 
        php             ;save carry for next add
5159 
        lda ad1
5160 
        sbc (sbiy2),y   ;perform subtract
5161 
        php
5162 
        cmp adrl        ;check result
5163 
        trap_ne         ;bad result
5164 
        pla             ;check flags
5165 
        and #1          ;mask carry
5166 
        cmp adrh
5167 
        trap_ne         ;bad carry
5168 
        plp
5169 
        rts
5170 
 
5171 
; core subroutine of the full binary add/subtract test
5172 
; iterates through all combinations of operands and carry input
5173 
; uses increments/decrements to predict result & result flags
5174 
chkadd  lda adrf        ;add V-flag if overflow
5175 
        and #$83        ;keep N-----ZC / clear V
5176 
        pha
5177 
        lda ad1         ;test sign unequal between operands
5178 
        eor ad2
5179 
        bmi ckad1       ;no overflow possible - operands have different sign
5180 
        lda ad1         ;test sign equal between operands and result
5181 
        eor adrl
5182 
        bpl ckad1       ;no overflow occured - operand and result have same sign
5183 
        pla
5184 
        ora #$40        ;set V
5185 
        pha
5186 
ckad1   pla
5187 
        sta adrf        ;save expected flags
5188 
; binary ADC / SBC zp
5189 
        php             ;save carry for subtract
5190 
        lda ad1
5191 
        adc ad2         ;perform add
5192 
        php
5193 
        cmp adrl        ;check result
5194 
        trap_ne         ;bad result
5195 
        pla             ;check flags
5196 
        and #$c3        ;mask NV----ZC
5197 
        cmp adrf
5198 
        trap_ne         ;bad flags
5199 
        plp
5200 
        php             ;save carry for next add
5201 
        lda ad1
5202 
        sbc sb2         ;perform subtract
5203 
        php
5204 
        cmp adrl        ;check result
5205 
        trap_ne         ;bad result
5206 
        pla             ;check flags
5207 
        and #$c3        ;mask NV----ZC
5208 
        cmp adrf
5209 
        trap_ne         ;bad flags
5210 
        plp
5211 
; binary ADC / SBC abs
5212 
        php             ;save carry for subtract
5213 
        lda ad1
5214 
        adc ada2        ;perform add
5215 
        php
5216 
        cmp adrl        ;check result
5217 
        trap_ne         ;bad result
5218 
        pla             ;check flags
5219 
        and #$c3        ;mask NV----ZC
5220 
        cmp adrf
5221 
        trap_ne         ;bad flags
5222 
        plp
5223 
        php             ;save carry for next add
5224 
        lda ad1
5225 
        sbc sba2        ;perform subtract
5226 
        php
5227 
        cmp adrl        ;check result
5228 
        trap_ne         ;bad result
5229 
        pla             ;check flags
5230 
        and #$c3        ;mask NV----ZC
5231 
        cmp adrf
5232 
        trap_ne         ;bad flags
5233 
        plp
5234 
; binary ADC / SBC #
5235 
        php             ;save carry for subtract
5236 
        lda ad2
5237 
        sta chkadi      ;self modify immediate
5238 
        lda ad1
5239 
chkadi  = * + 1         ;operand of the immediate ADC
5240 
        adc #0          ;perform add
5241 
        php
5242 
        cmp adrl        ;check result
5243 
        trap_ne         ;bad result
5244 
        pla             ;check flags
5245 
        and #$c3        ;mask NV----ZC
5246 
        cmp adrf
5247 
        trap_ne         ;bad flags
5248 
        plp
5249 
        php             ;save carry for next add
5250 
        lda sb2
5251 
        sta chksbi      ;self modify immediate
5252 
        lda ad1
5253 
chksbi  = * + 1         ;operand of the immediate SBC
5254 
        sbc #0          ;perform subtract
5255 
        php
5256 
        cmp adrl        ;check result
5257 
        trap_ne         ;bad result
5258 
        pla             ;check flags
5259 
        and #$c3        ;mask NV----ZC
5260 
        cmp adrf
5261 
        trap_ne         ;bad flags
5262 
        plp
5263 
; binary ADC / SBC zp,x
5264 
        php             ;save carry for subtract
5265 
        lda ad1
5266 
        adc 0,x         ;perform add
5267 
        php
5268 
        cmp adrl        ;check result
5269 
        trap_ne         ;bad result
5270 
        pla             ;check flags
5271 
        and #$c3        ;mask NV----ZC
5272 
        cmp adrf
5273 
        trap_ne         ;bad flags
5274 
        plp
5275 
        php             ;save carry for next add
5276 
        lda ad1
5277 
        sbc sb2-ad2,x   ;perform subtract
5278 
        php
5279 
        cmp adrl        ;check result
5280 
        trap_ne         ;bad result
5281 
        pla             ;check flags
5282 
        and #$c3        ;mask NV----ZC
5283 
        cmp adrf
5284 
        trap_ne         ;bad flags
5285 
        plp
5286 
; binary ADC / SBC abs,x
5287 
        php             ;save carry for subtract
5288 
        lda ad1
5289 
        adc ada2-ad2,x  ;perform add
5290 
        php
5291 
        cmp adrl        ;check result
5292 
        trap_ne         ;bad result
5293 
        pla             ;check flags
5294 
        and #$c3        ;mask NV----ZC
5295 
        cmp adrf
5296 
        trap_ne         ;bad flags
5297 
        plp
5298 
        php             ;save carry for next add
5299 
        lda ad1
5300 
        sbc sba2-ad2,x  ;perform subtract
5301 
        php
5302 
        cmp adrl        ;check result
5303 
        trap_ne         ;bad result
5304 
        pla             ;check flags
5305 
        and #$c3        ;mask NV----ZC
5306 
        cmp adrf
5307 
        trap_ne         ;bad flags
5308 
        plp
5309 
; binary ADC / SBC abs,y
5310 
        php             ;save carry for subtract
5311 
        lda ad1
5312 
        adc ada2-$ff,y  ;perform add
5313 
        php
5314 
        cmp adrl        ;check result
5315 
        trap_ne         ;bad result
5316 
        pla             ;check flags
5317 
        and #$c3        ;mask NV----ZC
5318 
        cmp adrf
5319 
        trap_ne         ;bad flags
5320 
        plp
5321 
        php             ;save carry for next add
5322 
        lda ad1
5323 
        sbc sba2-$ff,y  ;perform subtract
5324 
        php
5325 
        cmp adrl        ;check result
5326 
        trap_ne         ;bad result
5327 
        pla             ;check flags
5328 
        and #$c3        ;mask NV----ZC
5329 
        cmp adrf
5330 
        trap_ne         ;bad flags
5331 
        plp
5332 
; binary ADC / SBC (zp,x)
5333 
        php             ;save carry for subtract
5334 
        lda ad1
5335 
        adc (lo adi2-ad2,x) ;perform add
5336 
        php
5337 
        cmp adrl        ;check result
5338 
        trap_ne         ;bad result
5339 
        pla             ;check flags
5340 
        and #$c3        ;mask NV----ZC
5341 
        cmp adrf
5342 
        trap_ne         ;bad flags
5343 
        plp
5344 
        php             ;save carry for next add
5345 
        lda ad1
5346 
        sbc (lo sbi2-ad2,x) ;perform subtract
5347 
        php
5348 
        cmp adrl        ;check result
5349 
        trap_ne         ;bad result
5350 
        pla             ;check flags
5351 
        and #$c3        ;mask NV----ZC
5352 
        cmp adrf
5353 
        trap_ne         ;bad flags
5354 
        plp
5355 
; binary ADC / SBC (abs),y
5356 
        php             ;save carry for subtract
5357 
        lda ad1
5358 
        adc (adiy2),y   ;perform add
5359 
        php
5360 
        cmp adrl        ;check result
5361 
        trap_ne         ;bad result
5362 
        pla             ;check flags
5363 
        and #$c3        ;mask NV----ZC
5364 
        cmp adrf
5365 
        trap_ne         ;bad flags
5366 
        plp
5367 
        php             ;save carry for next add
5368 
        lda ad1
5369 
        sbc (sbiy2),y   ;perform subtract
5370 
        php
5371 
        cmp adrl        ;check result
5372 
        trap_ne         ;bad result
5373 
        pla             ;check flags
5374 
        and #$c3        ;mask NV----ZC
5375 
        cmp adrf
5376 
        trap_ne         ;bad flags
5377 
        plp
5378 
        rts
5379 
 
5380 
; target for the jump absolute test
5381 
        dey
5382 
        dey
5383 
test_far
5384 
        php             ;either SP or Y count will fail, if we do not hit
5385 
        dey
5386 
        dey
5387 
        dey
5388 
        plp
5389 
        trap_cs         ;flags loaded?
5390 
        trap_vs
5391 
        trap_mi
5392 
        trap_eq
5393 
        cmp #'F'        ;registers loaded?
5394 
        trap_ne
5395 
        cpx #'A'
5396 
        trap_ne
5397 
        cpy #('R'-3)
5398 
        trap_ne
5399 
        pha             ;save a,x
5400 
        txa
5401 
        pha
5402 
        tsx
5403 
        cpx #$fd        ;check SP
5404 
        trap_ne
5405 
        pla             ;restore x
5406 
        tax
5407 
        set_stat $ff
5408 
        pla             ;restore a
5409 
        inx             ;return registers with modifications
5410 
        eor #$aa        ;N=1, V=1, Z=0, C=1
5411 
        jmp far_ret
5412 
 
5413 
; target for the jump indirect test
5414 
        align
5415 
ptr_tst_ind dw test_ind
5416 
ptr_ind_ret dw ind_ret
5417 
        trap            ;runover protection
5418 
        dey
5419 
        dey
5420 
test_ind
5421 
        php             ;either SP or Y count will fail, if we do not hit
5422 
        dey
5423 
        dey
5424 
        dey
5425 
        plp
5426 
        trap_cs         ;flags loaded?
5427 
        trap_vs
5428 
        trap_mi
5429 
        trap_eq
5430 
        cmp #'I'        ;registers loaded?
5431 
        trap_ne
5432 
        cpx #'N'
5433 
        trap_ne
5434 
        cpy #('D'-3)
5435 
        trap_ne
5436 
        pha             ;save a,x
5437 
        txa
5438 
        pha
5439 
        tsx
5440 
        cpx #$fd        ;check SP
5441 
        trap_ne
5442 
        pla             ;restore x
5443 
        tax
5444 
        set_stat $ff
5445 
        pla             ;restore a
5446 
        inx             ;return registers with modifications
5447 
        eor #$aa        ;N=1, V=1, Z=0, C=1
5448 
        jmp (ptr_ind_ret)
5449 
        trap            ;runover protection
5450 
 
5451 
; target for the jump subroutine test
5452 
        dey
5453 
        dey
5454 
test_jsr
5455 
        php             ;either SP or Y count will fail, if we do not hit
5456 
        dey
5457 
        dey
5458 
        dey
5459 
        plp
5460 
        trap_cs         ;flags loaded?
5461 
        trap_vs
5462 
        trap_mi
5463 
        trap_eq
5464 
        cmp #'J'        ;registers loaded?
5465 
        trap_ne
5466 
        cpx #'S'
5467 
        trap_ne
5468 
        cpy #('R'-3)
5469 
        trap_ne
5470 
        pha             ;save a,x
5471 
        txa
5472 
        pha
5473 
        tsx             ;sp -4? (return addr,a,x)
5474 
        cpx #$fb
5475 
        trap_ne
5476 
        lda $1ff        ;propper return on stack
5477 
        cmp #hi(jsr_ret)
5478 
        trap_ne
5479 
        lda $1fe
5480 
        cmp #lo(jsr_ret)
5481 
        trap_ne
5482 
        set_stat $ff
5483 
        pla             ;pull x,a
5484 
        tax
5485 
        pla
5486 
        inx             ;return registers with modifications
5487 
        eor #$aa        ;N=1, V=1, Z=0, C=1
5488 
        rts
5489 
        trap            ;runover protection
5490 
 
5491 
;trap in case of unexpected IRQ, NMI, BRK, RESET - BRK test target
5492 
nmi_trap
5493 
        trap            ;check stack for conditions at NMI
5494 
res_trap
5495 
        trap            ;unexpected RESET
5496 
 
5497 
        dey
5498 
        dey
5499 
irq_trap                ;BRK test or unextpected BRK or IRQ
5500 
        php             ;either SP or Y count will fail, if we do not hit
5501 
        dey
5502 
        dey
5503 
        dey
5504 
        ;next 4 traps could be caused by unexpected BRK or IRQ
5505 
        ;check stack for BREAK and originating location
5506 
        ;possible jump/branch into weeds (uninitialized space)
5507 
        cmp #'B'        ;registers loaded?
5508 
        trap_ne
5509 
        cpx #'R'
5510 
        trap_ne
5511 
        cpy #('K'-3)
5512 
        trap_ne
5513 
        sta irq_a       ;save registers during break test
5514 
        stx irq_x
5515 
        tsx             ;test break on stack
5516 
        lda $102,x
5517 
        cmp_flag 0      ;break test should have B=1
5518 
        trap_ne         ; - no break flag on stack
5519 
        pla
5520 
        cmp #$34        ;should have added interrupt disable
5521 
        trap_ne
5522 
        tsx
5523 
        cpx #$fc        ;sp -3? (return addr, flags)
5524 
        trap_ne
5525 
        lda $1ff        ;propper return on stack
5526 
        cmp #hi(brk_ret)
5527 
        trap_ne
5528 
        lda $1fe
5529 
;        cmp #lo(brk_ret)
5530 
        cmp #lo(brk_ret - 1)    ; M65C02 treats JSR and traps (NMI, BRK/IRQ, RST) the same; add one to return address on RTI/RTS
5531 
        trap_ne
5532 
        set_stat $ff
5533 
        ldx irq_x
5534 
        inx             ;return registers with modifications
5535 
        lda irq_a
5536 
        eor #$aa        ;N=1, V=1, Z=0, C=1 but original flags should be restored
5537 
        rti
5538 
        trap            ;runover protection
5539 
 
5540 
;copy of data to initialize BSS segment
5541 
    if load_data_direct != 1
5542 
zp_init
5543 
zp1_    db  $c3,$82,$41,0   ;test patterns for LDx BIT ROL ROR ASL LSR
5544 
zp7f_   db  $7f             ;test pattern for compare
5545 
;logical zeropage operands
5546 
zpOR_   db  0,$1f,$71,$80   ;test pattern for OR
5547 
zpAN_   db  $0f,$ff,$7f,$80 ;test pattern for AND
5548 
zpEO_   db  $ff,$0f,$8f,$8f ;test pattern for EOR
5549 
;indirect addressing pointers
5550 
ind1_   dw  abs1            ;indirect pointer to pattern in absolute memory
5551 
        dw  abs1+1
5552 
        dw  abs1+2
5553 
        dw  abs1+3
5554 
        dw  abs7f
5555 
inw1_   dw  abs1-$f8        ;indirect pointer for wrap-test pattern
5556 
indt_   dw  abst            ;indirect pointer to store area in absolute memory
5557 
        dw  abst+1
5558 
        dw  abst+2
5559 
        dw  abst+3
5560 
inwt_   dw  abst-$f8        ;indirect pointer for wrap-test store
5561 
indAN_  dw  absAN           ;indirect pointer to AND pattern in absolute memory
5562 
        dw  absAN+1
5563 
        dw  absAN+2
5564 
        dw  absAN+3
5565 
indEO_  dw  absEO           ;indirect pointer to EOR pattern in absolute memory
5566 
        dw  absEO+1
5567 
        dw  absEO+2
5568 
        dw  absEO+3
5569 
indOR_  dw  absOR           ;indirect pointer to OR pattern in absolute memory
5570 
        dw  absOR+1
5571 
        dw  absOR+2
5572 
        dw  absOR+3
5573 
;add/subtract indirect pointers
5574 
adi2_   dw  ada2            ;indirect pointer to operand 2 in absolute memory
5575 
sbi2_   dw  sba2            ;indirect pointer to complemented operand 2 (SBC)
5576 
adiy2_  dw  ada2-$ff        ;with offset for indirect indexed
5577 
sbiy2_  dw  sba2-$ff
5578 
zp_end
5579 
    if (zp_end - zp_init) != (zp_bss_end - zp_bss)
5580 
        ;force assembler error if size is different
5581 
        ERROR ERROR ERROR   ;mismatch between bss and zeropage data
5582 
    endif
5583 
data_init
5584 
abs1_   db  $c3,$82,$41,0   ;test patterns for LDx BIT ROL ROR ASL LSR
5585 
abs7f_  db  $7f             ;test pattern for compare
5586 
;loads
5587 
fLDx_   db  fn,fn,0,fz      ;expected flags for load
5588 
;shifts
5589 
rASL_                       ;expected result ASL & ROL -carry
5590 
rROL_   db  $86,$04,$82,0   ; "
5591 
rROLc_  db  $87,$05,$83,1   ;expected result ROL +carry
5592 
rLSR_                       ;expected result LSR & ROR -carry
5593 
rROR_   db  $61,$41,$20,0   ; "
5594 
rRORc_  db  $e1,$c1,$a0,$80 ;expected result ROR +carry
5595 
fASL_                       ;expected flags for shifts
5596 
fROL_   db  fnc,fc,fn,fz    ;no carry in
5597 
fROLc_  db  fnc,fc,fn,0     ;carry in
5598 
fLSR_
5599 
fROR_   db  fc,0,fc,fz      ;no carry in
5600 
fRORc_  db  fnc,fn,fnc,fn   ;carry in
5601 
;increments (decrements)
5602 
rINC_   db  $7f,$80,$ff,0,1 ;expected result for INC/DEC
5603 
fINC_   db  0,fn,fn,fz,0    ;expected flags for INC/DEC
5604 
;logical memory operand
5605 
absOR_  db  0,$1f,$71,$80   ;test pattern for OR
5606 
absAN_  db  $0f,$ff,$7f,$80 ;test pattern for AND
5607 
absEO_  db  $ff,$0f,$8f,$8f ;test pattern for EOR
5608 
;logical accu operand
5609 
absORa_ db  0,$f1,$1f,0     ;test pattern for OR
5610 
absANa_ db  $f0,$ff,$ff,$ff ;test pattern for AND
5611 
absEOa_ db  $ff,$f0,$f0,$0f ;test pattern for EOR
5612 
;logical results
5613 
absrlo_ db  0,$ff,$7f,$80
5614 
absflo_ db  fz,fn,0,fn
5615 
data_end
5616 
    if (data_end - data_init) != (data_bss_end - data_bss)
5617 
        ;force assembler error if size is different
5618 
        ERROR ERROR ERROR   ;mismatch between bss and data
5619 
    endif
5620 
 
5621 
vec_init
5622 
        dw  nmi_trap
5623 
        dw  res_trap
5624 
        dw  irq_trap
5625 
vec_bss equ $fffa
5626 
    endif                   ;end of RAM init data
5627 
 
5628 
    if (load_data_direct = 1) & (ROM_vectors = 1)
5629 
        org $fffa       ;vectors
5630 
        dw  nmi_trap
5631 
        dw  res_trap
5632 
        dw  irq_trap
5633 
    endif
5634 
 
5635 
        end start
5636 
 

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