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;;
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;; Copyright 2012 by Michael A. Morris, dba M. A. Morris & Associates
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;;
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;; All rights reserved. The source code contained herein is publicly released
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;; under the terms and conditions of the GNU Lesser Public License. No part of
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;; this source code may be reproduced or transmitted in any form or by any
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;; means, electronic or mechanical, including photocopying, recording, or any
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;; information storage and retrieval system in violation of the license under
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;; which the source code is released.
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;;
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;; The souce code contained herein is free; it may be redistributed and/or
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;; modified in accordance with the terms of the GNU Lesser General Public
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;; License as published by the Free Software Foundation; either version 2.1 of
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;; the GNU Lesser General Public License, or any later version.
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;;
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;; The souce code contained herein is freely released WITHOUT ANY WARRANTY;
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;; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A
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;; PARTICULAR PURPOSE. (Refer to the GNU Lesser General Public License for
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;; more details.)
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;;
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;; A copy of the GNU Lesser General Public License should have been received
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;; along with the source code contained herein; if not, a copy can be obtained
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;; by writing to:
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;;
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;; Free Software Foundation, Inc.
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;; 51 Franklin Street, Fifth Floor
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;; Boston, MA 02110-1301 USA
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;;
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;; Further, no use of this source code is permitted in any form or means
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;; without inclusion of this banner prominently in any derived works.
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;;
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;; Michael A. Morris
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;; Huntsville, AL
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;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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; #------------------------------------------------------------------------#
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; | |
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; | M65C02_Tst2.A65 |
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; | |
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; | Test program for M65C02_Core.v |
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; | |
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; | Copyright 2012, Michael A. Morris |
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; | |
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; #------------------------------------------------------------------------#
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;
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; File created 11-Feb-2012
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;
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; Modified 09-Dec-2012 mam Changed to a "ROM" type of test program
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; where the program is at the top of memory
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; and includes the three vectors. Intent is to
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; convert core so it indirectly jump through
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; the normal processor vectors when an excep-
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; is performed: Reset, NMI, or IRQ/BRK.
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;
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; To make this change need to add code to
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; initialize page 0, 1, and 2 RAM locations.
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;
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; Modified 15-Dec-2012 mam Modified to remove Rockwell instruction op-
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; codes from the NOP/Invalid instruction list.
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;
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title "M65C02_Core Test Program - all instructions"
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;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Define macros for the Rockwell instructions
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;;
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RMBx macro BitNum, ZP
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db ((BitNum+0)*16)+7
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db ZP
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endm
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;;
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SMBx macro BitNum, ZP
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db ((BitNum+8)*16)+7
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db ZP
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endm
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;;
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BBRx macro BitNum, ZP, Dst
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LBL\? db ((BitNum+0)*16)+15
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db ZP
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if(Dst < LBL\?+3)
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db -(Dst-LBL\?+1)
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else
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db (Dst-LBL\?-3)
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endif
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endm
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;;
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BBSx macro BitNum, ZP, Dst
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LBL\? db ((BitNum+8)*16)+15
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db ZP
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if(Dst < LBL\?+3)
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db -(Dst-LBL\?+1)
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else
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db (Dst-LBL\?-3)
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endif
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endm
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;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Define macros for the W65802/65816 instructions implemented in W65C02S
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;;
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STP macro
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db $DB
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endm
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;;
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WAI macro
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db $CB
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endm
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;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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ROM_Start equ $F800 ;; Boot "ROM" Start Address
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;;
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NMI_Vector equ $FFFA ;; Normal Non-maskable Interrupt Vector
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RST_Vector equ $FFFC ;; Normal Reset Vector
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IRQ_Vector equ $FFFE ;; Normal Maskable Interrupt or BRK Vector
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;;
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IRQ_On equ $FFF8 ;; Set External Interrupt Request
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IRQ_Off equ $FFF9 ;; Clr External Interrupt Request
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;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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bss
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org $0000
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;;
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Hi_Return ds 1
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Neg_Return ds 2
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;;
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org $0008
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;;
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pDPI ds 2 ;; DP = (pDPI)
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pDPXI ds 2 ;; DPX = (pDPI,X) {X = 2}
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pDPIY ds 2 ;; DPY = (pDPI),Y {Y = 2}
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;;
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org $0010
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;;
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DP ds 1 ;; DP; DP,X (X = 0); DP,Y (Y = 0)
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DPX ds 1 ;; DPX; DP,X (X = 1); DP,Y (Y = 1)
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DPY ds 1 ;; DPY; DP,X (X = 2); DP,Y (Y = 2)
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;;
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org $00FF
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;;
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Lo_Return ds 1
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;;
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bss
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Stack_Page org $0100
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;;
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RAM_Start org $0200
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;;
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Abs ds 1
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AbsX ds 1
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AbsY ds 1
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;;
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code
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org ROM_Start
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Start jmp Abs_Dst
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;;
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Jmp_AbsI dw AbsI_Dst
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Jmp_AbsXI dw AbsXI_Dst
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;;
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ds 1
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;;
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Interrupt pha ;; preserve Acc
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php ;; push current PSW, on entry D cleared and
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pla ;; I should be set
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bit #$08 ;; check if BCD mode not set
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bne * ;; if <> 0, error
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bit #$04 ;; check is Interrupt Mask set
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beq * ;; if == 0, error
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pla ;; restore Acc
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ISR_End rti ;; Exit ISR
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;;
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Init_RAM lda #(lo Return)
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sta Lo_Return
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lda #(hi Return)
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sta Hi_Return
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;;
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lda #(lo -Return)
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sta Hi_Return+1
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lda #(hi -Return)
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sta Hi_Return+2
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;;
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lda #(lo DP)
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sta pDPI
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stz pDPI+1
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;;
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lda #(lo DPX)
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sta pDPXI
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stz pDPXI+1
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;;
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lda #(lo DPY)
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sta pDPIY
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stz pDPIY+1
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;;
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Return rts
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;;
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Abs_Dst jmp (Jmp_AbsI)
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nop
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AbsI_Dst jmp (Jmp_AbsXI, x)
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nop
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;;
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AbsXI_Dst jsr Return
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nop
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Test_Main bra Fwd ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}
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Tst_BPL lda #$80 ;; Imm, A = 0x80, P = 0xA4
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Err_BPL bpl Err_BPL ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}
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eor #$80 ;; Imm, A = 0x00, P = 0x26
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Err_BMI bmi Err_BMI ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}
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sec ;; Imp, A = 0x00, P = 0x27
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Err_BCC bcc Err_BCC ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}
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sbc #$80 ;; Imm, A = 0x80, P = 0xE4
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Err_BVC bvc Err_BVC ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}
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Err_BCS bcs Err_BCS ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}
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Err_BEQ beq Err_BEQ ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}
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sbc #$7F ;; Imm, A = 0x00, P = 0x67
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clv ;; Imp, A = 0x00, P = 0x27
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Err_BVS bvs Err_BVS ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}
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Err_BNE bne Err_BNE ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}
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clc ;; Imp, A = 0x00, P = 0x26
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Err_BCS2 bcs Err_BCS2 ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}
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bra Continue
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Fwd bra Tst_BPL ;; Test Conditional Branch Instructions
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;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Implicit/Accumulator/Immediate Address Instructions
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;;
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Continue nop ;; Imp, A = 0x00, P = 0x26
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;;
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cli ;; Imp, A = 0x00, P = 0x22
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php ;; Psh, (S) = 0x22, P = 0x22
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pla ;; Pop, A = 0x22, P = 0x20
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and #$04 ;; Imm, A = 0x00, P = 0x22
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bne * ;; Rel, A = 0x00, P = 0x22
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nop ;; Imp, A = 0x00, P = 0x22
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;;
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sei ;; Imp, A = 0x00, P = 0x26
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php ;; Psh, (S) = 0x26, P = 0x26
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pla ;; Pop, A = 0x26, P = 0x24
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and #$04 ;; Imm, A = 0x04, P = 0x24
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beq * ;; Rel, A = 0x04, P = 0x24
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nop ;; Imp, A = 0x04, P = 0x24
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;;
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sed ;; Imp, A = 0x04, P = 0x2C
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php ;; Psh, (S) = 0x2C, P = 0x2C
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pla ;; Pop, A = 0x2C, P = 0x2C
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and #$08 ;; Imm, A = 0x08, P = 0x2C
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beq * ;; Rel, A = 0x08, P = 0x2C
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nop ;; Imp, A = 0x08, P = 0x2C
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;;
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cld ;; Imp, A = 0x08, P = 0x24
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php ;; Psh, A = 0x08, P = 0x24
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pla ;; Pop, A = 0x24, P = 0x24
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and #$08 ;; Imm, A = 0x00, P = 0x26
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bne * ;; Rel, P = {N, V, 1'b1, B, D, I, Z, C}
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nop ;; Imp, A = 0x00, P = 0x26
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;;
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lda #$55 ;; Imm, A = 0x55, P = 0x24
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ora #$AA ;; Imm, A = 0xFF, P = 0xA4
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pha ;; Psh, A = 0xFF, P = 0xA4
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plp ;; Pop, A = 0xFF, P = 0xEF
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bvc * ;; Stop if ~V
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bne * ;; Stop if ~Z
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bcc * ;; Stop if ~C
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bpl * ;; Stop if ~N
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;;
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cmp #$FF ;; Imm, A = 0xFF, P = 0x6F Make sure A is -1
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bne * ;; Rel, A = 0xFF, P = 0x6F
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bmi * ;; Rel, A = 0xFF, P = 0x6F
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bcc * ;; Rel, A = 0xFF, P = 0x6F
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;;
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clc ;; Imp, A = 0xFF, P = 0x6E
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cld ;; Imp, A = 0xFF, P = 0x66
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clv ;; Imm, A = 0xFF, P = 0x66
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adc #$01 ;; Imm, A = 0x00, P = 0x27
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ora #$04 ;; Imm, A = 0x04, P = 0x25
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pha ;; Psh, A = 0x04, P = 0x25
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279 |
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plp ;; Pop, A = 0x04, P = 0x24
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280 |
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;;
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ldy #$AA ;; Imm, Y = 0xAA, P = 0xA4
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cpy #$AA ;; Imm, Y = 0xAA, P = 0x27
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bne * ;; Rel, Y = 0xAA, P = 0x27
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284 |
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bmi * ;; Rel, Y = 0xAA, P = 0x27
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285 |
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bcc * ;; Rel, Y = 0xAA, P = 0x27
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286 |
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phy
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;;
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ldx #$55 ;; Imm, X = 0x55, P = 0x25
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289 |
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cpx #$55 ;; Imm, X = 0x55, P = 0x27
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290 |
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bne * ;; Rel, X = 0x55, P = 0x27
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291 |
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bmi * ;; Rel, X = 0x55, P = 0x27
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292 |
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bcc * ;; Rel, X = 0x55, P = 0x27
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293 |
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phx
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;;
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295 |
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ply ;; Imm, Y = 0x55, P = 0x25
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296 |
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cpy #$55 ;; Imm, Y = 0x55, P = 0x27
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297 |
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bne * ;; Rel, Y = 0x55, P = 0x27
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298 |
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bmi * ;; Rel, Y = 0x55, P = 0x27
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299 |
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bcc * ;; Rel, Y = 0x55, P = 0x27
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300 |
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;;
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301 |
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plx ;; Imm, X = 0xAA, P = 0xA5
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cpx #$AA ;; Imm, X = 0xAA, P = 0x27
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303 |
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bne * ;; Rel, X = 0xAA, P = 0x27
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304 |
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bmi * ;; Rel, X = 0xAA, P = 0x27
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305 |
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bcc * ;; Rel, X = 0xAA, P = 0x27
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306 |
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;;
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307 |
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bit #$04 ;; Imm, A = 0x04, P = 0x25
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308 |
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beq * ;; Rel, A = 0x04, P = 0x25
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309 |
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bit #$00 ;; Imm, A = 0x04, P = 0x27
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310 |
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bne * ;; Rel, A = 0x04, P = 0x27
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311 |
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;;
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312 |
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tya ;; Imm, A = 0x55, P = 0x25
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313 |
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cmp #$55 ;; Imm, A = 0x55, P = 0x27
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314 |
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bne * ;; Rel, A = 0x55, P = 0x27
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315 |
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bmi * ;; Rel, A = 0x55, P = 0x27
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316 |
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bcc * ;; Rel, A = 0x55, P = 0x27
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317 |
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;;
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318 |
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tay ;; Imm, Y = 0x55, P = 0x25
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319 |
|
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cpy #$55 ;; Imm, Y = 0x55, P = 0x27
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320 |
|
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bne * ;; Rel, Y = 0x55, P = 0x27
|
321 |
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bmi * ;; Rel, Y = 0x55, P = 0x27
|
322 |
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bcc * ;; Rel, Y = 0x55, P = 0x27
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323 |
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;;
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324 |
|
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txa ;; Imm, A = 0xAA, P = 0xA5
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325 |
|
|
cmp #$AA ;; Imm, A = 0xAA, P = 0x27
|
326 |
|
|
bne * ;; Rel, A = 0xAA, P = 0x27
|
327 |
|
|
bmi * ;; Rel, A = 0xAA, P = 0x27
|
328 |
|
|
bcc * ;; Rel, A = 0xAA, P = 0x27
|
329 |
|
|
;;
|
330 |
|
|
tax ;; Imm, X = 0xAA, P = 0xA5
|
331 |
|
|
cpx #$AA ;; Imm, X = 0xAA, P = 0x27
|
332 |
|
|
bne * ;; Rel, X = 0xAA, P = 0x27
|
333 |
|
|
bmi * ;; Rel, X = 0xAA, P = 0x27
|
334 |
|
|
bcc * ;; Rel, X = 0xAA, P = 0x27
|
335 |
|
|
;;
|
336 |
|
|
tsx ;; Imm, X = 0xFF, P = 0xA5
|
337 |
|
|
txs ;; Imm, S = 0xFF, P = 0xA5
|
338 |
|
|
cpx #$FF ;; Imm, X = 0xFF, P = 0x27
|
339 |
|
|
bne * ;; Rel, X = 0xFF, P = 0x27
|
340 |
|
|
bmi * ;; Rel, X = 0xFF, P = 0x27
|
341 |
|
|
bcc * ;; Rel, X = 0xFF, P = 0x27
|
342 |
|
|
;;
|
343 |
|
|
asl a ;; Acc, A = 0x54, P = 0x25
|
344 |
|
|
bmi * ;; Rel, A = 0x54, P = 0x25
|
345 |
|
|
bcc * ;; Rel, A = 0x54, P = 0x25
|
346 |
|
|
cmp #$54 ;; Imm, A = 0x54, P = 0x27
|
347 |
|
|
bne * ;; Rel, A = 0x54, P = 0x27
|
348 |
|
|
;;
|
349 |
|
|
rol a ;; Acc, A = 0xA9, P = 0xA5
|
350 |
|
|
bpl * ;; Rel, A = 0xA9, P = 0xA4
|
351 |
|
|
bcs * ;; Rel, A = 0xA9, P = 0xA4
|
352 |
|
|
cmp #$A9 ;; Imm, A = 0xA9, P = 0x26
|
353 |
|
|
bne * ;; Rel, A = 0xA9, P = 0x26
|
354 |
|
|
;;
|
355 |
|
|
lsr a ;; Acc, A = 0x54, P = 0x25
|
356 |
|
|
bmi * ;; Rel, A = 0x54, P = 0x25
|
357 |
|
|
bcc * ;; Rel, A = 0x54, P = 0x25
|
358 |
|
|
cmp #$54 ;; Imm, A = 0x54, P = 0x27
|
359 |
|
|
bne * ;; Rel, A = 0x54, P = 0x27
|
360 |
|
|
;;
|
361 |
|
|
ror a ;; Acc, A = 0xAA, P = 0xA4
|
362 |
|
|
bpl * ;; Rel, A = 0xA9, P = 0xA4
|
363 |
|
|
bcs * ;; Rel, A = 0xA9, P = 0xA4
|
364 |
|
|
cmp #$AA ;; Imm, A = 0xAA, P = 0x27
|
365 |
|
|
bne * ;; Rel, A = 0xAA, P = 0x27
|
366 |
|
|
;;
|
367 |
|
|
inc a ;; Acc, A = 0xAB, P = 0xA5
|
368 |
|
|
cmp #$AB ;; Imm, A = 0xAB, P = 0x27
|
369 |
|
|
bne * ;; Rel, A = 0xAB, P = 0x27
|
370 |
|
|
bmi * ;; Rel, A = 0xAB, P = 0x27
|
371 |
|
|
bcc * ;; Rel, A = 0xAB, P = 0x27
|
372 |
|
|
;;
|
373 |
|
|
inx ;; Imp, X = 0x00, P = 0x27
|
374 |
|
|
cpx #$00 ;; Imm, X = 0x00, P = 0x27
|
375 |
|
|
bne * ;; Rel, X = 0x00, P = 0x27
|
376 |
|
|
bmi * ;; Rel, X = 0x00, P = 0x27
|
377 |
|
|
bcc * ;; Rel, X = 0x00, P = 0x27
|
378 |
|
|
;;
|
379 |
|
|
iny ;; Imp, Y = 0x56, P = 0x25
|
380 |
|
|
cpy #$56 ;; Imm, Y = 0x56, P = 0x27
|
381 |
|
|
bne * ;; Rel, Y = 0x56, P = 0x27
|
382 |
|
|
bmi * ;; Rel, Y = 0x56, P = 0x27
|
383 |
|
|
bcc * ;; Rel, Y = 0x56, P = 0x27
|
384 |
|
|
;;
|
385 |
|
|
dec a ;; Acc, A = 0xAA, P = 0xA5
|
386 |
|
|
cmp #$AA ;; Imm, A = 0xAA, P = 0x27
|
387 |
|
|
bne * ;; Rel, A = 0xAA, P = 0x27
|
388 |
|
|
bmi * ;; Rel, A = 0xAA, P = 0x27
|
389 |
|
|
bcc * ;; Rel, A = 0xAA, P = 0x27
|
390 |
|
|
;;
|
391 |
|
|
dex ;; Imp, X = 0xFF, P = 0xA5
|
392 |
|
|
cpx #$FF ;; Imm, X = 0xFF, P = 0x27
|
393 |
|
|
bne * ;; Rel, X = 0xFF, P = 0x27
|
394 |
|
|
bmi * ;; Rel, X = 0xFF, P = 0x27
|
395 |
|
|
bcc * ;; Rel, X = 0xFF, P = 0x27
|
396 |
|
|
;;
|
397 |
|
|
dey ;; Imp, Y = 0x55, P = 0x25
|
398 |
|
|
cpy #$55 ;; Imm, Y = 0x55, P = 0x27
|
399 |
|
|
bne * ;; Rel, Y = 0x55, P = 0x27
|
400 |
|
|
bmi * ;; Rel, Y = 0x55, P = 0x27
|
401 |
|
|
bcc * ;; Rel, Y = 0x55, P = 0x27
|
402 |
|
|
;;
|
403 |
|
|
lda #$00 ;; Imm, A = 0x00, P = 0x27
|
404 |
|
|
tax ;; Imp, X = 0x00, P = 0x27
|
405 |
|
|
tay ;; Imp, Y = 0x00, P = 0x27
|
406 |
|
|
;;
|
407 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
408 |
|
|
;;
|
409 |
|
|
;; Direct/Zero Page Instructions
|
410 |
|
|
;;
|
411 |
|
|
dec a ;; Acc, A = 0xFF, P = 0xA5
|
412 |
|
|
sta DP ;; WO_DP, DP = 0xFF, P = 0xA5
|
413 |
|
|
rol a ;; Acc, A = 0xFF, P = 0xA5
|
414 |
|
|
ora DP ;; RO_DP, A = 0xFF, P = 0xA5
|
415 |
|
|
cmp #$FF ;; Imm, A = 0xFF, P = 0x27
|
416 |
|
|
bne * ;; Rel, A = 0xFF, P = 0x27
|
417 |
|
|
;;
|
418 |
|
|
stz DP ;; WO_DP, DP = 0x00, P = 0x27
|
419 |
|
|
dec a ;; Acc, A = 0xFE, P = 0xA5
|
420 |
|
|
lda DP ;; RO_DP, A = 0x00, P = 0x27
|
421 |
|
|
bne * ;; Rel, A = 0x00, P = 0x27
|
422 |
|
|
cmp DP ;; RO_DP, A = 0x00, P = 0x27
|
423 |
|
|
bne * ;; Rel, A = 0x00, P = 0x27
|
424 |
|
|
;;
|
425 |
|
|
stz DP ;; WO_DP, DP = 0x00, p = 0x27
|
426 |
|
|
dey ;; Imp, Y = 0xFF, P = 0xA5
|
427 |
|
|
sty DP ;; RO_DP, Y = 0xFF, P = 0xA5
|
428 |
|
|
iny ;; Imp, Y = 0x00, P = 0x27
|
429 |
|
|
ldy DP ;; RO_DP, Y = 0xFF, P = 0xA5
|
430 |
|
|
cpy #$FF ;; Imm, Y = 0xFF, P = 0x27
|
431 |
|
|
bne *
|
432 |
|
|
cpy DP ;; RO_DP, Y = 0xFF, P = 0x27
|
433 |
|
|
bne *
|
434 |
|
|
;;
|
435 |
|
|
stz DP ;; WO_DP, DP = 0x00, p = 0x27
|
436 |
|
|
dex ;; Imp, X = 0xFF, P = 0xA5
|
437 |
|
|
stx DP ;; RO_DP, DP = 0xFF, P = 0xA5
|
438 |
|
|
inx ;; Imp, X = 0x00, P = 0x27
|
439 |
|
|
ldx DP ;; RO_DP, X = 0xFF, P = 0xA5
|
440 |
|
|
cpx #$FF ;; Imm, X = 0xFF, P = 0x27
|
441 |
|
|
bne *
|
442 |
|
|
cpx DP ;; RO_DP, X = 0xFF, P = 0x27
|
443 |
|
|
bne *
|
444 |
|
|
;;
|
445 |
|
|
txa ;; Imp, A = 0xFF, P = 0xA5
|
446 |
|
|
eor DP ;; RO_DP, A = 0x00, P = 0x27
|
447 |
|
|
bne *
|
448 |
|
|
;;
|
449 |
|
|
lda #$55 ;; Imm, A = 0x55, P = 0x25
|
450 |
|
|
sta DP ;; WO_DO, DP = 0x55, P = 0x25
|
451 |
|
|
lda #$FF ;; Imm, A = 0xFF, P = 0xA5
|
452 |
|
|
and DP ;; RO_DP, A = 0x55, P = 0x25
|
453 |
|
|
cmp #$55 ;; Imm, A = 0x55, P = 0x27
|
454 |
|
|
bne *
|
455 |
|
|
;;
|
456 |
|
|
adc DP ;; RO_DP, A = 0xAB, P = 0xE4
|
457 |
|
|
cmp #$AB ;; Imm, A = 0xAB, P = 0x67
|
458 |
|
|
bne *
|
459 |
|
|
sbc DP ;; RO_DP, A = 0x55, P = 0x65
|
460 |
|
|
cmp #$56 ;; Imm, A = 0x56, P = 0x67
|
461 |
|
|
bne *
|
462 |
|
|
lda #$82 ;; Imm, A = 0x82, P = 0xE5
|
463 |
|
|
bit DP ;; RO_DP A = 0x82, P = 0x67
|
464 |
|
|
bmi *
|
465 |
|
|
bvc *
|
466 |
|
|
;;
|
467 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
468 |
|
|
;;
|
469 |
|
|
;; Direct/Zero Page Indexed Instructions
|
470 |
|
|
;;
|
471 |
|
|
lda #$24 ;; Imm, A = 0x24, P = 0x65
|
472 |
|
|
pha ;; Imp, A = 0x24, P = 0x65
|
473 |
|
|
plp ;; Imp, A = 0x24, P = 0x24
|
474 |
|
|
;;
|
475 |
|
|
stz DP ;; DP, DP = 0x00, P = 0x24
|
476 |
|
|
stz DP+1 ;; DP, DPX = 0x00, P = 0x24
|
477 |
|
|
stz DP+2 ;; DP, DPY = 0x00, P = 0x24
|
478 |
|
|
;;
|
479 |
|
|
lda #$55 ;; Imm, A = 0x55, P = 0x24
|
480 |
|
|
sta DPY ;; DP, DPY = 0x55, P = 0x24
|
481 |
|
|
asl a ;; Acc, A = 0xAA, P = 0xA4
|
482 |
|
|
ldx DPX ;; DP, X = 0x00, P = 0x26
|
483 |
|
|
ldy DPY ;; DP, Y = 0x55, P = 0x26
|
484 |
|
|
;;
|
485 |
|
|
inx ;; Imp, X = 0x01, P = 0x24
|
486 |
|
|
sta DP,x ;; WO_DPX, DPX = 0xAA, P = 0x24
|
487 |
|
|
lsr a ;; Acc, A = 0x55, P = 0x24
|
488 |
|
|
inx ;; Imp, X = 0x02, P = 0x24
|
489 |
|
|
sta DP,x ;; WO_DPX, DPY = 0x55, P = 0x24
|
490 |
|
|
dex ;; Imp, X = 0x01, P = 0x24
|
491 |
|
|
ora DP,x ;; RO_DPX, A = 0xFF, P = 0xA4
|
492 |
|
|
and DP,x ;; RO_DPX, A = 0xAA, P = 0xA4
|
493 |
|
|
eor DP,x ;; RO_DPX, A = 0x00, P = 0x26
|
494 |
|
|
bne * ;; Rel, A = 0x00, P = 0x26
|
495 |
|
|
stz DP,x ;; WO_DPX, DPX = 0x00, P = 0x26
|
496 |
|
|
cmp DP,x ;; RO_DPX, A = 0x00, P = 0x27
|
497 |
|
|
bne * ;; Rel, A = 0x00, P = 0x27
|
498 |
|
|
bcc * ;; Rel, A = 0x00, P = 0x27
|
499 |
|
|
inx ;; Imp, X = 0x02, P = 0x25
|
500 |
|
|
ldy DP,x ;; RO_DPX, Y = 0x55, P = 0x25
|
501 |
|
|
tya ;; Imp, A = 0x55, P = 0x25
|
502 |
|
|
asl a ;; Acc, A = 0xAA, P = 0xA4
|
503 |
|
|
bit DP,x ;; RO_DPX, A = 0xAA, M = 0x55, P = 0x66
|
504 |
|
|
bmi * ;; Rel, A = 0xAA, P = 0x66
|
505 |
|
|
bvc * ;; Rel, A = 0xAA, P = 0x66
|
506 |
|
|
bne * ;; Rel, A = 0xAA, P = 0x66
|
507 |
|
|
clv ;; Imp, A = 0xAA, P = 0x26
|
508 |
|
|
sec ;; Imp, A = 0xAA, P = 0x27
|
509 |
|
|
adc DP,x ;; RO_DPX, A = 0x00, P = 0x27
|
510 |
|
|
clc
|
511 |
|
|
sbc DP,x ;; RO_DPX, A = 0xAA, P = 0xA4
|
512 |
|
|
bpl * ;; Rel, A = 0xAA, P = 0xA4
|
513 |
|
|
bvs * ;; Rel, A = 0xAA, P = 0xA4
|
514 |
|
|
beq * ;; Rel, A = 0xAA, P = 0xA4
|
515 |
|
|
bcs * ;; Rel, A = 0xAA, P = 0xA4
|
516 |
|
|
;;
|
517 |
|
|
lda DP-2,x ;; RO_DPX, A = 0x00, P = 0x26
|
518 |
|
|
tay ;; Imp, Y = 0x00, P = 0x26
|
519 |
|
|
sty DP,x ;; WO_DPX, DPY = 0x00, P = 0x26
|
520 |
|
|
;;
|
521 |
|
|
ldx DP,y ;; RO_DPY, X = 0x00, P = 0x26
|
522 |
|
|
iny ;; Imp, Y = 0x01, P = 0x24
|
523 |
|
|
stx DP,y ;; WO_DPY, DPX = 0x00, P = 0x24
|
524 |
|
|
;;
|
525 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
526 |
|
|
;;
|
527 |
|
|
;; Absolute Address Instructions
|
528 |
|
|
;;
|
529 |
|
|
lda #$24 ;; Imm, A = 0x24, P = 0x67
|
530 |
|
|
pha ;; Imp, A = 0x24, P = 0x67
|
531 |
|
|
plp ;; Imp, A = 0x24, P = 0x24
|
532 |
|
|
;;
|
533 |
|
|
stz Abs ;; WO_Abs, Abs = 0x00, P = 0x24
|
534 |
|
|
stz Abs+1 ;; WO_Abs, AbsX = 0x00, P = 0x24
|
535 |
|
|
stz Abs+2 ;; WO_Abs, AbsY = 0x00, P = 0x24
|
536 |
|
|
;;
|
537 |
|
|
lda #$55 ;; Imm, A = 0x55, P = 0x24
|
538 |
|
|
sta AbsY ;; WO_Abs, AbsY = 0x55, P = 0x24
|
539 |
|
|
asl a ;; Acc, A = 0xAA, P = 0xA4
|
540 |
|
|
ldx AbsX ;; RO_Abs, X = 0x00, P = 0x26
|
541 |
|
|
ldy AbsY ;; RO_Abs, Y = 0x55, P = 0x26
|
542 |
|
|
;;
|
543 |
|
|
sta AbsX ;; WO_Abs, AbsX = 0xAA, P = 0x24
|
544 |
|
|
lsr a ;; Acc, A = 0x55, P = 0x24
|
545 |
|
|
sta AbsY ;; WO_Abs, AbsY = 0x55, P = 0x24
|
546 |
|
|
;;
|
547 |
|
|
ora AbsX ;; RO_Abs, A = 0xFF, P = 0xA4
|
548 |
|
|
and AbsX ;; RO_Abs, A = 0xAA, P = 0xA4
|
549 |
|
|
eor AbsX ;; RO_Abs, A = 0x00, P = 0x26
|
550 |
|
|
bne * ;; Rel, A = 0x00, P = 0x26
|
551 |
|
|
stz AbsX ;; WO_Abs, AbsX = 0x00, P = 0x26
|
552 |
|
|
cmp AbsX ;; RO_Abs, A = 0x00, P = 0x27
|
553 |
|
|
bne * ;; Rel, A = 0x00, P = 0x27
|
554 |
|
|
bcc * ;; Rel, A = 0x00, P = 0x27
|
555 |
|
|
ldy AbsY ;; RO_Abs, Y = 0x55, P = 0x25
|
556 |
|
|
tya ;; Imp, A = 0x55, P = 0x25
|
557 |
|
|
asl a ;; Acc, A = 0xAA, P = 0xA4
|
558 |
|
|
bit AbsY ;; RO_Abs, A = 0xAA, M = 0x55, P = 0x66
|
559 |
|
|
bmi * ;; Rel, A = 0xAA, P = 0x66
|
560 |
|
|
bvc * ;; Rel, A = 0xAA, P = 0x66
|
561 |
|
|
bne * ;; Rel, A = 0xAA, P = 0x66
|
562 |
|
|
clv ;; Imp, A = 0xAA, P = 0x26
|
563 |
|
|
sec ;; Imp, A = 0xAA, P = 0x27
|
564 |
|
|
adc AbsY ;; RO_Abs, A = 0x00, P = 0x27
|
565 |
|
|
clc
|
566 |
|
|
sbc AbsY ;; RO_Abs, A = 0xAA, P = 0xA4
|
567 |
|
|
bpl * ;; Rel, A = 0xAA, P = 0xA4
|
568 |
|
|
bvs * ;; Rel, A = 0xAA, P = 0xA4
|
569 |
|
|
beq * ;; Rel, A = 0xAA, P = 0xA4
|
570 |
|
|
bcs * ;; Rel, A = 0xAA, P = 0xA4
|
571 |
|
|
;;
|
572 |
|
|
lda Abs ;; RO_Abs, A = 0x00, P = 0x26
|
573 |
|
|
tay ;; Imp, Y = 0x00, P = 0x26
|
574 |
|
|
sty AbsY ;; WO_Abs, AbsY = 0x00, P = 0x26
|
575 |
|
|
cpy Abs ;; RO_Abs, Y = 0x00, Abs = 0x00, P = 0x26
|
576 |
|
|
bne * ;; Rel, A = 0xAA, P = 0x66
|
577 |
|
|
;;
|
578 |
|
|
ldx Abs ;; RO_Abs, X = 0x00, P = 0x26
|
579 |
|
|
stx AbsX ;; WO_Abs, AbsX = 0x00, P = 0x26
|
580 |
|
|
cpx Abs ;; RO_Abs, X = 0x00, Abs = 0x00, P = 0x26
|
581 |
|
|
bne * ;; Rel, A = 0xAA, P = 0x26
|
582 |
|
|
;;
|
583 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
584 |
|
|
;;
|
585 |
|
|
;; Absolute Indexed Address Instructions
|
586 |
|
|
;;
|
587 |
|
|
lda #$24 ;; Imm, A = 0x24, P = 0x67
|
588 |
|
|
pha ;; Imp, A = 0x24, P = 0x67
|
589 |
|
|
plp ;; Imp, A = 0x24, P = 0x24
|
590 |
|
|
;;
|
591 |
|
|
stz Abs ;; Abs, Abs = 0x00, P = 0x24
|
592 |
|
|
stz Abs+1 ;; Abs, AbsX = 0x00, P = 0x24
|
593 |
|
|
stz Abs+2 ;; Abs, AbsY = 0x00, P = 0x24
|
594 |
|
|
;;
|
595 |
|
|
lda #$55 ;; Imm, A = 0x55, P = 0x24
|
596 |
|
|
sta AbsY ;; Abs, AbsY = 0x55, P = 0x24
|
597 |
|
|
asl a ;; Acc, A = 0xAA, P = 0xA4
|
598 |
|
|
ldx AbsX ;; Abs, X = 0x00, P = 0x26
|
599 |
|
|
ldy AbsY ;; Abs, Y = 0x55, P = 0x26
|
600 |
|
|
;;
|
601 |
|
|
inx ;; Imp, X = 0x01, P = 0x24
|
602 |
|
|
sta Abs,x ;; WO_AbsX, AbsX = 0xAA, P = 0x24
|
603 |
|
|
lsr a ;; Acc, A = 0x55, P = 0x24
|
604 |
|
|
inx ;; Imp, X = 0x02, P = 0x24
|
605 |
|
|
sta Abs,x ;; WO_AbsX, AbsX = 0x55, P = 0x24
|
606 |
|
|
dex ;; Imp, X = 0x01, P = 0x24
|
607 |
|
|
ora Abs,x ;; RO_AbsX, A = 0xFF, P = 0xA4
|
608 |
|
|
and Abs,x ;; RO_AbsX, A = 0xAA, P = 0xA4
|
609 |
|
|
eor Abs,x ;; RO_AbsX, A = 0x00, P = 0x26
|
610 |
|
|
bne * ;; Rel, A = 0x00, P = 0x26
|
611 |
|
|
stz Abs,x ;; WO_AbsX, AbsX = 0x00, P = 0x26
|
612 |
|
|
cmp Abs,x ;; RO_AbsX, A = 0x00, P = 0x27
|
613 |
|
|
bne * ;; Rel, A = 0x00, P = 0x27
|
614 |
|
|
bcc * ;; Rel, A = 0x00, P = 0x27
|
615 |
|
|
inx ;; Imp, X = 0x02, P = 0x25
|
616 |
|
|
ldy Abs,x ;; RO_AbsX, Y = 0x55, P = 0x25
|
617 |
|
|
tya ;; Imp, A = 0x55, P = 0x25
|
618 |
|
|
asl a ;; Acc, A = 0xAA, P = 0xA4
|
619 |
|
|
bit Abs,x ;; RO_AbsX, A = 0xAA, M = 0x55, P = 0x66
|
620 |
|
|
bmi * ;; Rel, A = 0xAA, P = 0x66
|
621 |
|
|
bvc * ;; Rel, A = 0xAA, P = 0x66
|
622 |
|
|
bne * ;; Rel, A = 0xAA, P = 0x66
|
623 |
|
|
clv ;; Imp, A = 0xAA, P = 0x26
|
624 |
|
|
sec ;; Imp, A = 0xAA, P = 0x27
|
625 |
|
|
adc Abs,x ;; RO_AbsX, A = 0x00, P = 0x27
|
626 |
|
|
clc
|
627 |
|
|
sbc Abs,x ;; RO_AbsX, A = 0xAA, P = 0xA4
|
628 |
|
|
bpl * ;; Rel, A = 0xAA, P = 0xA4
|
629 |
|
|
bvs * ;; Rel, A = 0xAA, P = 0xA4
|
630 |
|
|
beq * ;; Rel, A = 0xAA, P = 0xA4
|
631 |
|
|
bcs * ;; Rel, A = 0xAA, P = 0xA4
|
632 |
|
|
;;
|
633 |
|
|
lda Abs-2,x ;; RO_AbsX, A = 0x00, P = 0x26
|
634 |
|
|
tay ;; Imp, Y = 0x00, P = 0x26
|
635 |
|
|
sty AbsY ;; WO_Abs, AbsY = 0x00, P = 0x26
|
636 |
|
|
;;
|
637 |
|
|
ldx Abs,y ;; RO_AbsY, X = 0x00, P = 0x26
|
638 |
|
|
stx AbsX ;; WO_Abs, AbsX = 0x00, P = 0x24
|
639 |
|
|
;;
|
640 |
|
|
ldy #$02 ;; Imm, Y = 0x02, P = 0x24
|
641 |
|
|
lda #$AA ;; Imm, A = 0xAA, P = 0xA4
|
642 |
|
|
;;
|
643 |
|
|
sta Abs,y ;; WO_AbsY, AbsY = 0xAA, P = 0xA4
|
644 |
|
|
eor Abs,y ;; RO_AbsY, A = 0x00, P = 0x26
|
645 |
|
|
lda Abs,y ;; RO_AbsY, A = 0xAA, P = 0xA4
|
646 |
|
|
lsr a ;; Acc, A = 0x55, P = 0x24
|
647 |
|
|
ora Abs,y ;; RO_AbsY, A = 0xFF, P = 0xA4
|
648 |
|
|
and Abs,y ;; RO_AbsY, A = 0xAA, P = 0xA4
|
649 |
|
|
cmp Abs,y ;; RO_AbsY, A = 0xAA, P = 0x27
|
650 |
|
|
;;
|
651 |
|
|
sbc Abs,y ;; RO_AbsY, A = 0x00, P = 0x27
|
652 |
|
|
clc ;; Imp, A = 0x00, P = 0x26
|
653 |
|
|
adc Abs,y ;; RO_AbsY, A = 0xAA, P = 0xA4
|
654 |
|
|
;;
|
655 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
656 |
|
|
;;
|
657 |
|
|
;; Direct/Zero Page RMW Instructions
|
658 |
|
|
;;
|
659 |
|
|
lda #$24 ;; Imm, A = 0x24, P = 0xXX
|
660 |
|
|
pha ;; Imp, A = 0x24, P = 0xXX
|
661 |
|
|
plp ;; Imp, A = 0x24, P = 0x24
|
662 |
|
|
;;
|
663 |
|
|
lda #$AA ;; Imm, A = 0xAA, P = 0xA4
|
664 |
|
|
sta DP ;; WO_DP, DP = 0xAA, P = 0xA4
|
665 |
|
|
;;
|
666 |
|
|
asl DP ;; RMW_DP, DP = 0x54, P = 0x25
|
667 |
|
|
rol DP ;; RMW_DP, DP = 0xA9, P = 0xA4
|
668 |
|
|
lsr DP ;; RMW_DP, DP = 0x54, P = 0x25
|
669 |
|
|
ror DP ;; RMW_DP, DP = 0xAA, P = 0xA4
|
670 |
|
|
;;
|
671 |
|
|
dec DP ;; RMW_DP, DP = 0xA9, P = 0xA4
|
672 |
|
|
inc DP ;; RMW_DP, DP = 0xAA, P = 0xA4
|
673 |
|
|
;;
|
674 |
|
|
lsr a ;; Acc, A = 0x55, P = 0x24
|
675 |
|
|
;;
|
676 |
|
|
tsb DP ;; RMW_DP, DP = 0xFF, P = 0x26
|
677 |
|
|
trb DP ;; RMW_DP, DP = 0xAA, P = 0x24
|
678 |
|
|
;;
|
679 |
|
|
ldx #$01 ;; Imm, X = 0x01, P = 0x24
|
680 |
|
|
asl a ;; Acc, A = 0xAA, P = 0x24
|
681 |
|
|
sta DP,x ;; WO_DPX, DPX = 0xAA, P = 0x24
|
682 |
|
|
;;
|
683 |
|
|
asl DP,x ;; RMW_DPX, DPX = 0x54, P = 0x25
|
684 |
|
|
rol DP,x ;; RMW_DPX, DPX = 0xA9, P = 0xA4
|
685 |
|
|
lsr DP,x ;; RMW_DPX, DPX = 0x54, P = 0x25
|
686 |
|
|
ror DP,x ;; RMW_DPX, DPX = 0xAA, P = 0xA4
|
687 |
|
|
;;
|
688 |
|
|
dec DP,x ;; RMW_DPX, DPX = 0xA9, P = 0xA4
|
689 |
|
|
inc DP,x ;; RMW_DPX, DPX = 0xAA, P = 0xA4
|
690 |
|
|
;;
|
691 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
692 |
|
|
;;
|
693 |
|
|
;; Absolute Address RMW Instructions
|
694 |
|
|
;;
|
695 |
|
|
lda #$24 ;; Imm, A = 0x24, P = 0xXX
|
696 |
|
|
pha ;; Imp, A = 0x24, P = 0xXX
|
697 |
|
|
plp ;; Imp, A = 0x24, P = 0x24
|
698 |
|
|
;;
|
699 |
|
|
lda #$AA ;; Imm, A = 0xAA, P = 0xA4
|
700 |
|
|
sta Abs ;; WO_Abs, Abs = 0xAA, P = 0xA4
|
701 |
|
|
;;
|
702 |
|
|
asl Abs ;; RMW_Abs, Abs = 0x54, P = 0x25
|
703 |
|
|
rol Abs ;; RMW_Abs, Abs = 0xA9, P = 0xA4
|
704 |
|
|
lsr Abs ;; RMW_Abs, Abs = 0x54, P = 0x25
|
705 |
|
|
ror Abs ;; RMW_Abs, Abs = 0xAA, P = 0xA4
|
706 |
|
|
;;
|
707 |
|
|
dec Abs ;; RMW_Abs, Abs = 0xA9, P = 0xA5
|
708 |
|
|
inc Abs ;; RMW_Abs, Abs = 0xAA, P = 0xA4
|
709 |
|
|
;;
|
710 |
|
|
lsr a ;; Acc, A = 0x55, P = 0x24
|
711 |
|
|
;;
|
712 |
|
|
tsb Abs ;; RMW_Abs, Abs = 0xFF, P = 0x26
|
713 |
|
|
trb Abs ;; RMW_Abs, Abs = 0xAA, P = 0x24
|
714 |
|
|
;;
|
715 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
716 |
|
|
;;
|
717 |
|
|
;; Absolute Address Indexed RMW Instructions
|
718 |
|
|
;;
|
719 |
|
|
ldx #$01 ;; Imm, X = 0x01, P = 0x24
|
720 |
|
|
asl a ;; Acc, A = 0xAA, P = 0xA4
|
721 |
|
|
sta Abs,x ;; WO_AbsX, AbsX = 0xAA, P = 0xA4
|
722 |
|
|
;;
|
723 |
|
|
asl Abs,x ;; RMW_AbsX, AbsX = 0x54, P = 0x25
|
724 |
|
|
rol Abs,x ;; RMW_AbsX, AbsX = 0xA9, P = 0xA4
|
725 |
|
|
lsr Abs,x ;; RMW_AbsX, AbsX = 0x54, P = 0x25
|
726 |
|
|
ror Abs,x ;; RMW_AbsX, AbsX = 0xAA, P = 0xA4
|
727 |
|
|
;;
|
728 |
|
|
dec Abs,x ;; RMW_AbsX, AbsX = 0xA9, P = 0xA4
|
729 |
|
|
inc Abs,x ;; RMW_AbsX, AbsX = 0xAA, P = 0xA4
|
730 |
|
|
;;
|
731 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
732 |
|
|
;;
|
733 |
|
|
;; Direct/Zero Page Indirect Instructions
|
734 |
|
|
;;
|
735 |
|
|
jsr Init_RAM ;; Initialize RAM used for pointers
|
736 |
|
|
;;
|
737 |
|
|
lda #$24 ;; Imm, A = 0x24, P = 0xXX
|
738 |
|
|
pha ;; Imp, A = 0x24, P = 0xXX
|
739 |
|
|
plp ;; Imp, A = 0x24, P = 0x24
|
740 |
|
|
;;
|
741 |
|
|
lda #$AA ;; Imm, A = 0xAA, P = 0xA4
|
742 |
|
|
sta DP ;; WO_DP, DP = 0xAA, P = 0xA4
|
743 |
|
|
lda #$00 ;; Imm, A = 0x00, P = 0x26
|
744 |
|
|
;;
|
745 |
|
|
ora (pDPI) ;; RO_DPI A = 0xAA, P = 0xA4
|
746 |
|
|
lsr a ;; Acc, A = 0x55, P = 0x24
|
747 |
|
|
eor (pDPI) ;; RO_DPI, A = 0xFF, P = 0xA4
|
748 |
|
|
sec ;; Imp, A = 0xFF, P = 0xA5
|
749 |
|
|
adc (pDPI) ;; RO_DPI, A = 0xAA, P = 0xA5
|
750 |
|
|
clc ;; Imp, A = 0xAA, P = 0xA4
|
751 |
|
|
sbc (pDPI) ;; RO_DPI, A = 0xFF, P = 0xA4
|
752 |
|
|
and (pDPI) ;; RO_DPI, A = 0xAA, P = 0xA4
|
753 |
|
|
cmp (pDPI) ;; RO_DPI, A = 0xAA, P = 0x27
|
754 |
|
|
;;
|
755 |
|
|
lda (pDPI) ;; RO_DPI, A = 0xAA, P = 0xA5
|
756 |
|
|
lsr a ;; Acc, A = 0x55, P = 0x24
|
757 |
|
|
sta (pDPI) ;; WO_DPI DP = 0x55, P = 0x24
|
758 |
|
|
cmp DP ;; RO_DP A = 0x55, P = 0x27
|
759 |
|
|
;;
|
760 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
761 |
|
|
;;
|
762 |
|
|
;; Direct/Zero Page Pre-Indexed Indirect Instructions
|
763 |
|
|
;;
|
764 |
|
|
ldx #$02 ;; Imm, X = 0x02, P = 0x25
|
765 |
|
|
ora (pDPI,x) ;; RO_DPXI, A = 0xFF, P = 0xA5
|
766 |
|
|
and (pDPI,x) ;; RO_DPXI, A = 0xAA, P = 0xA5
|
767 |
|
|
eor (pDPI,x) ;; RO_DPXI, A = 0x00, P = 0x27
|
768 |
|
|
clc ;; Imp, A = 0x00, P = 0x26
|
769 |
|
|
adc (pDPI,x) ;; RO_DPXI, A = 0xAA, P = 0xA4
|
770 |
|
|
cmp (pDPI,x) ;; RO_DPXI, A = 0xAA, P = 0x27
|
771 |
|
|
sbc (pDPI,x) ;; RO_DPXI, A = 0x00, P = 0x27
|
772 |
|
|
lda (pDPI,x) ;; RO_DPXI, A = 0xAA, P = 0xA5
|
773 |
|
|
ldx #$04 ;; Imm, X = 0x04, P = 0x25
|
774 |
|
|
sta (pDPI,x) ;; WO_DPXI, DPY = 0xAA, P = 0x25
|
775 |
|
|
;;
|
776 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
777 |
|
|
;;
|
778 |
|
|
;; Direct/Zero Page Post-Indexed Indirect Instructions
|
779 |
|
|
;;
|
780 |
|
|
ldy #$00 ;; Imm, Y = 0x00, P = 0x27
|
781 |
|
|
;;
|
782 |
|
|
ora (pDPI),y ;; RO_DPIY, A = 0xFF, P = 0xA5
|
783 |
|
|
iny ;; Imp, Y = 0x01, P = 0x25
|
784 |
|
|
and (pDPI),y ;; RO_DPIY, A = 0xAA, P = 0xA5
|
785 |
|
|
dey ;; Imp, Y = 0x00, P = 0x27
|
786 |
|
|
eor (pDPI),y ;; RO_DPIY, A = 0xFF, P = 0xA5
|
787 |
|
|
adc (pDPI),y ;; RO_DPIY, A = 0x55, P = 0x25
|
788 |
|
|
cmp (pDPI),y ;; RO_DPIY, A = 0x55, P = 0x27
|
789 |
|
|
sbc (pDPI),y ;; RO_DPIY, A = 0x00, P = 0x27
|
790 |
|
|
iny ;; Imp, Y = 0x01, P = 0x25
|
791 |
|
|
sta (pDPI),y ;; WO_DPIY, DPX = 0x00, P = 0x25
|
792 |
|
|
dey ;; Imp, Y = 0x00, P = 0x26
|
793 |
|
|
lda (pDPI),y ;; RO_DPIY, A = 0x55, P = 0x24
|
794 |
|
|
;;
|
795 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
796 |
|
|
;;
|
797 |
|
|
;; All Unused Op-codes - Expected to execute in single cycle as NOPs.
|
798 |
|
|
;;
|
799 |
|
|
|
800 |
|
|
db $02, $22, $42, $62, $82, $C2, $E2
|
801 |
|
|
db $03, $13, $23, $33, $43, $53, $63, $73
|
802 |
|
|
db $83, $93, $A3, $B3, $C3, $D3, $E3, $F3
|
803 |
|
|
db $44, $54, $D4, $F4
|
804 |
|
|
;; db $07, $17, $27, $37, $47, $57, $67, $77 ;; RMBx dp
|
805 |
|
|
;; db $87, $97, $A7, $B7, $C7, $D7, $E7, $F7 ;; SMBx dp
|
806 |
|
|
db $0B, $1B, $2B, $3B, $4B, $5B, $6B, $7B
|
807 |
|
|
db $8B, $9B, $AB, $BB, $EB, $FB
|
808 |
|
|
db $5C, $DC, $FC
|
809 |
|
|
;; db $0F, $1F, $2F, $3F, $4F, $5F, $6F, $7F ;; BBRx dp,rel
|
810 |
|
|
;; db $8F, $9F, $AF, $BF, $CF, $DF, $EF, $FF ;; BBSx dp,rel
|
811 |
|
|
;;
|
812 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
813 |
|
|
;;
|
814 |
|
|
;; BRK Instruction
|
815 |
|
|
;;
|
816 |
|
|
sed ;; Set Decimal Mode Flag
|
817 |
|
|
cli ;; Clear Interrupt Mask
|
818 |
|
|
;;
|
819 |
|
|
brk ;; Single Cycle, Nxt
|
820 |
|
|
db $FF ;; Simple tag so ISR does not need to return PC
|
821 |
|
|
;;
|
822 |
|
|
sei
|
823 |
|
|
;;
|
824 |
|
|
BCD_Tst: clc
|
825 |
|
|
lda #$99
|
826 |
|
|
adc #$01
|
827 |
|
|
bcc *
|
828 |
|
|
bne *
|
829 |
|
|
sbc #$01
|
830 |
|
|
beq *
|
831 |
|
|
bcs *
|
832 |
|
|
cmp #$99
|
833 |
|
|
bne *
|
834 |
|
|
clc
|
835 |
|
|
;;
|
836 |
|
|
stz IRQ_On
|
837 |
|
|
;;
|
838 |
|
|
IRQ_Tst: sed
|
839 |
|
|
cli
|
840 |
|
|
nop
|
841 |
|
|
sec
|
842 |
|
|
lda #$00
|
843 |
|
|
bne IRQ_Tst3
|
844 |
|
|
IRQ_Tst2: sbc #$01
|
845 |
|
|
jsr Return
|
846 |
|
|
bra IRQ_Tst4
|
847 |
|
|
IRQ_Tst3: jmp IRQ_Tst2
|
848 |
|
|
IRQ_Tst4: sei
|
849 |
|
|
cld
|
850 |
|
|
;;
|
851 |
|
|
stz IRQ_Off
|
852 |
|
|
;;
|
853 |
|
|
;; Test zp,x and zp,y page zero wrapping
|
854 |
|
|
;;
|
855 |
|
|
lda #$00 ;; clear Accumulator
|
856 |
|
|
ldx #$01 ;; Set X to test first page 0 index operation
|
857 |
|
|
ldy #$02 ;; Set Y to test second index operation
|
858 |
|
|
;; tax ;; clear X
|
859 |
|
|
;; tay ;; clear Y
|
860 |
|
|
;; inx ;; increment X to test first index operation
|
861 |
|
|
;; iny ;; increment Y twice to force it to point to
|
862 |
|
|
;; iny ;; wrapped negative of the wrapped pointer.
|
863 |
|
|
;;
|
864 |
|
|
clc ;; clear carry before summation
|
865 |
|
|
lda $FE,x ;; load low byte of the
|
866 |
|
|
adc $FFFF,y ;; add low bytes of Return and -Return
|
867 |
|
|
;;
|
868 |
|
|
bne * ;; halt here if sum is not zero
|
869 |
|
|
;;
|
870 |
|
|
inx ;; point to wrapped high bytes
|
871 |
|
|
iny
|
872 |
|
|
lda $FE,x ;; load high byte of Return
|
873 |
|
|
adc $FFFF,y ;; add high bytes of Return and -Return
|
874 |
|
|
;;
|
875 |
|
|
bne * ;; halt here if the sum is not zero
|
876 |
|
|
;;
|
877 |
|
|
dey ;; point back to lsb
|
878 |
|
|
ldx $ff,y ;; load lsb of -Return value
|
879 |
|
|
cpx #(lo -Return) ;; compare
|
880 |
|
|
;;
|
881 |
|
|
bne * ;; halt here if the values are not equal
|
882 |
|
|
;;
|
883 |
|
|
txa ;; complement value and store back
|
884 |
|
|
eor #$ff ;; pointer will point to location Return-1
|
885 |
|
|
tax ;; because of 1's complement math
|
886 |
|
|
stx $ff,y
|
887 |
|
|
;;
|
888 |
|
|
iny ;; point to msb
|
889 |
|
|
ldx $ff,y ;; load msb of -Return value
|
890 |
|
|
cpx #(hi -Return) ;; compare
|
891 |
|
|
;;
|
892 |
|
|
bne * ;; halt here if the values are not equal
|
893 |
|
|
;;
|
894 |
|
|
txa ;; complement value and store back
|
895 |
|
|
eor #$ff ;; pointer will point to location Return-1
|
896 |
|
|
tax ;; because of 1's complement math
|
897 |
|
|
stx $ff,y
|
898 |
|
|
;;
|
899 |
|
|
;; Test (dp), (dp,x), and (dp,y) address mode page 0 wrapping
|
900 |
|
|
;;
|
901 |
|
|
lda ($ff) ;; load value stored in Return
|
902 |
|
|
ldy #$01 ;; ptr stored at $0001 points to Return-1
|
903 |
|
|
cmp ($01),y ;; compare
|
904 |
|
|
;;
|
905 |
|
|
bne * ;; halt here if the *($ff) <> *(*($01)+1)
|
906 |
|
|
;;
|
907 |
|
|
ldx #$02 ;; increment pointer at $0001
|
908 |
|
|
clc
|
909 |
|
|
lda $FF,x ;; load lsb from $0001
|
910 |
|
|
adc #$01 ;; increment
|
911 |
|
|
sta $FF,x ;; store lsb
|
912 |
|
|
inx ;; point to msb
|
913 |
|
|
lda $FF,x ;; load lsb from $0002
|
914 |
|
|
adc #$00 ;; increment msb if carry out of lsb
|
915 |
|
|
sta $FF,x
|
916 |
|
|
;;
|
917 |
|
|
dex ;; point back to lsb
|
918 |
|
|
lda ($ff,x) ;; load opcode at Return
|
919 |
|
|
dec $ff ;; change pointer to point to Return-1
|
920 |
|
|
cmp ($ff),y ;; both pointers (after indexing) -> Return
|
921 |
|
|
;;
|
922 |
|
|
bne *
|
923 |
|
|
;;
|
924 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
925 |
|
|
;;
|
926 |
|
|
;; Test Rockwell Instructions
|
927 |
|
|
;;
|
928 |
|
|
stz $80 ;; ZP location for Rockwell Instruction Test
|
929 |
|
|
;;
|
930 |
|
|
SMBx 0,$80
|
931 |
|
|
BBRx 0,$80,$
|
932 |
|
|
RMBx 0,$80
|
933 |
|
|
BBSx 0,$80,$
|
934 |
|
|
;;
|
935 |
|
|
SMBx 1,$80
|
936 |
|
|
BBRx 1,$80,$
|
937 |
|
|
RMBx 1,$80
|
938 |
|
|
BBSx 1,$80,$
|
939 |
|
|
;;
|
940 |
|
|
SMBx 2,$80
|
941 |
|
|
BBRx 2,$80,$
|
942 |
|
|
RMBx 2,$80
|
943 |
|
|
BBSx 2,$80,$
|
944 |
|
|
;;
|
945 |
|
|
SMBx 3,$80
|
946 |
|
|
BBRx 3,$80,$
|
947 |
|
|
RMBx 3,$80
|
948 |
|
|
BBSx 3,$80,$
|
949 |
|
|
;;
|
950 |
|
|
SMBx 4,$80
|
951 |
|
|
BBRx 4,$80,$
|
952 |
|
|
RMBx 4,$80
|
953 |
|
|
BBSx 4,$80,$
|
954 |
|
|
;;
|
955 |
|
|
SMBx 5,$80
|
956 |
|
|
BBRx 5,$80,$
|
957 |
|
|
RMBx 5,$80
|
958 |
|
|
BBSx 5,$80,$
|
959 |
|
|
;;
|
960 |
|
|
SMBx 6,$80
|
961 |
|
|
BBRx 6,$80,$
|
962 |
|
|
RMBx 6,$80
|
963 |
|
|
BBSx 6,$80,$
|
964 |
|
|
;;
|
965 |
|
|
SMBx 7,$80
|
966 |
|
|
BBRx 7,$80,$
|
967 |
|
|
RMBx 7,$80
|
968 |
|
|
BBSx 7,$80,$
|
969 |
|
|
;;
|
970 |
|
|
lda #$ff
|
971 |
|
|
sta $80
|
972 |
|
|
;;
|
973 |
|
|
BBSx 7,$80,MSB_Set
|
974 |
|
|
Clr_MSB:
|
975 |
|
|
RMBx 7,$80
|
976 |
|
|
BBRx 7,$80,MSB_Clr
|
977 |
|
|
MSB_Set bra Clr_MSB
|
978 |
|
|
MSB_Clr:
|
979 |
|
|
WAI
|
980 |
|
|
nop 4
|
981 |
|
|
stz IRQ_On
|
982 |
|
|
nop 4
|
983 |
|
|
cli
|
984 |
|
|
WAI
|
985 |
|
|
sei
|
986 |
|
|
stz IRQ_Off
|
987 |
|
|
;;
|
988 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
989 |
|
|
;;
|
990 |
|
|
;; Prepare Registers for looping to start of the test program
|
991 |
|
|
;;
|
992 |
|
|
lda #$00 ;; Imm, A = 0x00, P = 0x26
|
993 |
|
|
tax ;; Imp, X = 0x00, P = 0x26
|
994 |
|
|
tay ;; Imp, Y = 0x00, P = 0x26
|
995 |
|
|
;;
|
996 |
|
|
jmp Start ;; Imp, A = X = Y = 0x00, P = 0x26
|
997 |
|
|
;;
|
998 |
|
|
Last_Addrs:
|
999 |
|
|
;;
|
1000 |
|
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
1001 |
|
|
;;
|
1002 |
|
|
;; Vector Table
|
1003 |
|
|
;;
|
1004 |
|
|
Vect_Table org $FFFA
|
1005 |
|
|
;;
|
1006 |
|
|
dw Start ;; NMI Interrupt Vector
|
1007 |
|
|
dw Start ;; Reset Vector
|
1008 |
|
|
dw Interrupt ;; IRQ/BRK Interrupt Vector
|
1009 |
|
|
;;
|
1010 |
|
|
end Start
|