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[/] [macroblock_motion_detection/] [trunk/] [macroblock_motion_detection/] [MotionTest.v] - Blame information for rev 24

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/////////////////////////////////////////////////////////////////////
////                                                             ////
////  MotionTest.v                                               ////
////                                                             ////
////  Test Bench for MotionDetection.v                           ////
////  This file inputs a current macroblock and nine             ////
////  test macroblocks to be searched for the best match         ////
////  every 512 cycles to be tested in the next 521 cycles.      ////
////                                                             ////
////  Author: James Edgar                                        ////
////          JamesSEDgar@Hotmail.com                            ////
////                                                             ////
/////////////////////////////////////////////////////////////////////
////                                                             ////
//// Copyright (C) 2004 James Edgar                              ////
////                                                             ////
//// This source file may be used and distributed without        ////
//// restriction provided that this copyright statement is not   ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer.////
////                                                             ////
////     THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY     ////
//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED   ////
//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS   ////
//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR      ////
//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,         ////
//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES    ////
//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE   ////
//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        ////
//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF  ////
//// LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT  ////
//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT  ////
//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE         ////
//// POSSIBILITY OF SUCH DAMAGE.                                 ////
////                                                             ////
/////////////////////////////////////////////////////////////////////
////                                                             ////
//// This disclaimer of warranty extends to the user of these    ////
//// programs and user's customers, employees, agents,           ////
//// transferees, successors, and assigns.                       ////
////                                                             ////
//// The author does not represent or warrant that the programs  ////
//// furnished hereunder are free of infringement of any         ////
//// third-party patents.                                        ////
////                                                             ////
//// Commercial implementations of MPEG like video encoders      ////
//// including shareware, are subject to royalty fees to patent  ////
//// holders.  Many of these patents are general enough such     ////
//// that they are unavoidable regardless of implementation      ////
//// design.                                                     ////
////                                                             ////
/////////////////////////////////////////////////////////////////////
 
//synopsys translate_off
`include "timescale.v"
//synopsys translate_on
module MotionDetection_MotionTest_v_tf();
// DATE:     22:50:06 09/11/2004 
// MODULE:   MotionDetection
// DESIGN:   MotionDetection
// FILENAME: MotionTest.v
// PROJECT:  NTSCtoMacroblock
// VERSION:  
 
integer i,j;
reg clk2;  //half speed clock
// Inputs
    reg clk;
    reg ena;
    reg rst;
    reg [31:0] din1, din2;
    reg [3:0] state;
    reg [8:0] count;
    reg [31:0] curinput;
    reg [3:0]  curcount;
 
 
// Outputs
    wire [31:0] dout;
 
 
// Bidirs
 
// Instantiate the UUT
    MotionDetection uut (
        .clk(clk),
        .ena(ena),
        .rst(rst),
        .din1(din1),
           .din2(din2),
        .dout(dout),
        .state(state),
           .count(count)
        );
 
 
        initial begin
            clk <= 0;
            ena <= 0;
            rst <= 0;
                  @(posedge clk);
                  ena <= 1;
                  rst <= 1;
                  @(posedge clk);
            state = 0;
                  for (j = 0; j < 10; j = j + 1)     // Initilization + 9 tests
                  begin
                    for (i = 0; i < 512; i = i + 1)  // 512 counts per test
                      begin
                     @(posedge clk);                      // Two clocks per count
                        @(posedge clk);
                      end
                  end
                  $stop;
        end
 
always @(posedge clk2 or negedge rst)
  begin
    if (~rst)
      begin
           count  <= 0;
         end
    else
    if (ena)
      begin
           count <= count + 1;
         end
  end
 
always @(posedge clk2 or negedge rst)
  begin
    if (~rst)
      begin
           curcount  <= 0;
           curinput  <= {8'd1,8'd1,8'd1,8'd1};
         end
    else
    if (ena)
      begin
           if (count == 511)
             begin
                  curcount <= curcount + 1;
                  case (curcount)
                    0: curinput  <= {8'd2,8'd2,8'd2,8'd2};
                    1: curinput  <= {8'd3,8'd3,8'd3,8'd3};
                    2: curinput  <= {8'd4,8'd4,8'd4,8'd4};
                    3: curinput  <= {8'd5,8'd5,8'd5,8'd5};
                    4: curinput  <= {8'd6,8'd6,8'd6,8'd6};
                    5: curinput  <= {8'd7,8'd7,8'd7,8'd7};
                    6: curinput  <= {8'd8,8'd8,8'd8,8'd8};
                    7: curinput  <= {8'd9,8'd9,8'd9,8'd9};
                  endcase
                end
         end
  end
 
 
// address control for block memories control
always @(posedge clk2 or negedge rst)
  begin
    if (~rst)
      begin
        din1 <= 0;
           din2 <= 0;
         end
    else
    if (ena)
      begin
           case (count)
                47:      // Writes for CUR and 1 for next macroblock
                     begin
                          din1 <= curinput;
                    din2 <= {8'd1,8'd1,8'd1,8'd1};
                     end
                159:    // Writes for 2 and 3 for next macroblock
                     begin
                          din1 <= {8'd2,8'd2,8'd2,8'd2};
                    din2 <= {8'd3,8'd3,8'd3,8'd3};
                     end
                271:    // Writes for 4 and 5 for next macroblock
                     begin
                          din2 <= {8'd4,8'd4,8'd4,8'd4};
                    din1 <= {8'd5,8'd5,8'd5,8'd5};
                     end
                383:     // Writes for 6 and 7 for next macroblock
                      begin
                          din1 <= {8'd6,8'd6,8'd6,8'd6};
                    din2 <= {8'd7,8'd7,8'd7,8'd7};
                      end
                447:     // Writes for 8 and 9 for next macroblock
                      begin
                          din1 <= {8'd8,8'd8,8'd8,8'd8};
                    din2 <= {8'd9,8'd9,8'd9,8'd9};
                      end
                default:
                      begin
                          din1 <= din1;
                    din2 <= din2;
                      end
             endcase
 
         end // if(ena)
  end // always
 
        // generate clock
        always #2.5 clk <= ~clk;
 
 
  // control for clk2
always @(posedge clk or negedge rst)
  begin
    if (~rst)
      begin
           clk2  <= 0;
         end
    else
    if (ena)
      begin
           clk2 <= ~clk2;
         end
  end
 
   // Display changes to the signals
  always @(posedge clk2)
    begin
      if (ena)
      begin
           if (count == 511)
             begin
                  if (dout) // eliminates 0 0 from initialization cycle
                    begin
                      $display("X offset is  %d  Y offset is  %d",  dout[31:16], dout[15:0]);
                   case (curcount)
                     3:  begin
                                 $display(" Note this search failed to find the block ");
                                    $display(" in the upper right corrner since a log search ");
                                    $display(" was used and on the first pass there was a tie");
                                    $display(" between the upper left and upper right blocks");
                                    $display(" at (8,8) and (24,8) and the first was selected");
                                    $display(" then a local minima was found.");
                                  end
                     7:  begin
                                 $display(" Note this search failed to find the block ");
                                    $display(" in the lower left corrner since a log search ");
                                    $display(" was used and on the first pass there was a tie ");
                                    $display(" between the lower left and lower right blocks ");
                                    $display(" at (8,24) and (24,24) and the second was selected");
                                    $display(" then a local minima was found.");
                                    $display(" ");
                                    $display(" ");
                                    $display(" ");
 
                                  end
                   endcase
                    end
                end
      end
    end
endmodule
 

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Subversion Repositories macroblock_motion_detection

[/] [macroblock_motion_detection/] [trunk/] [macroblock_motion_detection/] [MotionTest.v] - Blame information for rev 24

Line No.	Rev	Author	Line
1	15	jamesedgar	`/////////////////////////////////////////////////////////////////////`
2			`//// ////`
3			`//// MotionTest.v ////`
4			`//// ////`
5			`//// Test Bench for MotionDetection.v ////`
6			`//// This file inputs a current macroblock and nine ////`
7			`//// test macroblocks to be searched for the best match ////`
8			`//// every 512 cycles to be tested in the next 521 cycles. ////`
9			`//// ////`
10			`//// Author: James Edgar ////`
11			`//// JamesSEDgar@Hotmail.com ////`
12			`//// ////`
13			`/////////////////////////////////////////////////////////////////////`
14			`//// ////`
15			`//// Copyright (C) 2004 James Edgar ////`
16			`//// ////`
17			`//// This source file may be used and distributed without ////`
18			`//// restriction provided that this copyright statement is not ////`
19			`//// removed from the file and that any derivative work contains ////`
20			`//// the original copyright notice and the associated disclaimer.////`
21			`//// ////`
22			//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
23			`//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////`
24			`//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////`
25			`//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////`
26			`//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////`
27			`//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////`
28			`//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////`
29			`//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////`
30			`//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////`
31			`//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////`
32			`//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////`
33			`//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////`
34			`//// POSSIBILITY OF SUCH DAMAGE. ////`
35			`//// ////`
36			`/////////////////////////////////////////////////////////////////////`
37			`//// ////`
38			`//// This disclaimer of warranty extends to the user of these ////`
39			`//// programs and user's customers, employees, agents, ////`
40			`//// transferees, successors, and assigns. ////`
41			`//// ////`
42			`//// The author does not represent or warrant that the programs ////`
43			`//// furnished hereunder are free of infringement of any ////`
44			`//// third-party patents. ////`
45			`//// ////`
46			`//// Commercial implementations of MPEG like video encoders ////`
47			`//// including shareware, are subject to royalty fees to patent ////`
48			`//// holders. Many of these patents are general enough such ////`
49			`//// that they are unavoidable regardless of implementation ////`
50			`//// design. ////`
51			`//// ////`
52			`/////////////////////////////////////////////////////////////////////`
53
54			`//synopsys translate_off`
55			`include "timescale.v"
56			`//synopsys translate_on`
57			`module MotionDetection_MotionTest_v_tf();`
58			`// DATE: 22:50:06 09/11/2004`
59			`// MODULE: MotionDetection`
60			`// DESIGN: MotionDetection`
61			`// FILENAME: MotionTest.v`
62			`// PROJECT: NTSCtoMacroblock`
63			`// VERSION:`
64
65			`integer i,j;`
66			`reg clk2; //half speed clock`
67			`// Inputs`
68			`reg clk;`
69			`reg ena;`
70			`reg rst;`
71			`reg [31:0] din1, din2;`
72			`reg [3:0] state;`
73			`reg [8:0] count;`
74			`reg [31:0] curinput;`
75			`reg [3:0] curcount;`
76
77
78			`// Outputs`
79			`wire [31:0] dout;`
80
81
82			`// Bidirs`
83
84			`// Instantiate the UUT`
85			`MotionDetection uut (`
86			`.clk(clk),`
87			`.ena(ena),`
88			`.rst(rst),`
89			`.din1(din1),`
90			`.din2(din2),`
91			`.dout(dout),`
92			`.state(state),`
93			`.count(count)`
94			`);`
95
96
97			`initial begin`
98			`clk <= 0;`
99			`ena <= 0;`
100			`rst <= 0;`
101			`@(posedge clk);`
102			`ena <= 1;`
103			`rst <= 1;`
104			`@(posedge clk);`
105			`state = 0;`
106			`for (j = 0; j < 10; j = j + 1) // Initilization + 9 tests`
107			`begin`
108			`for (i = 0; i < 512; i = i + 1) // 512 counts per test`
109			`begin`
110			`@(posedge clk); // Two clocks per count`
111			`@(posedge clk);`
112			`end`
113			`end`
114			`$stop;`
115			`end`
116
117			`always @(posedge clk2 or negedge rst)`
118			`begin`
119			`if (~rst)`
120			`begin`
121			`count <= 0;`
122			`end`
123			`else`
124			`if (ena)`
125			`begin`
126			`count <= count + 1;`
127			`end`
128			`end`
129
130			`always @(posedge clk2 or negedge rst)`
131			`begin`
132			`if (~rst)`
133			`begin`
134			`curcount <= 0;`
135			`curinput <= {8'd1,8'd1,8'd1,8'd1};`
136			`end`
137			`else`
138			`if (ena)`
139			`begin`
140			`if (count == 511)`
141			`begin`
142			`curcount <= curcount + 1;`
143			`case (curcount)`
144			`0: curinput <= {8'd2,8'd2,8'd2,8'd2};`
145			`1: curinput <= {8'd3,8'd3,8'd3,8'd3};`
146			`2: curinput <= {8'd4,8'd4,8'd4,8'd4};`
147			`3: curinput <= {8'd5,8'd5,8'd5,8'd5};`
148			`4: curinput <= {8'd6,8'd6,8'd6,8'd6};`
149			`5: curinput <= {8'd7,8'd7,8'd7,8'd7};`
150			`6: curinput <= {8'd8,8'd8,8'd8,8'd8};`
151			`7: curinput <= {8'd9,8'd9,8'd9,8'd9};`
152			`endcase`
153			`end`
154			`end`
155			`end`
156
157
158			`// address control for block memories control`
159			`always @(posedge clk2 or negedge rst)`
160			`begin`
161			`if (~rst)`
162			`begin`
163			`din1 <= 0;`
164			`din2 <= 0;`
165			`end`
166			`else`
167			`if (ena)`
168			`begin`
169			`case (count)`
170			`47: // Writes for CUR and 1 for next macroblock`
171			`begin`
172			`din1 <= curinput;`
173			`din2 <= {8'd1,8'd1,8'd1,8'd1};`
174			`end`
175			`159: // Writes for 2 and 3 for next macroblock`
176			`begin`
177			`din1 <= {8'd2,8'd2,8'd2,8'd2};`
178			`din2 <= {8'd3,8'd3,8'd3,8'd3};`
179			`end`
180			`271: // Writes for 4 and 5 for next macroblock`
181			`begin`
182			`din2 <= {8'd4,8'd4,8'd4,8'd4};`
183			`din1 <= {8'd5,8'd5,8'd5,8'd5};`
184			`end`
185			`383: // Writes for 6 and 7 for next macroblock`
186			`begin`
187			`din1 <= {8'd6,8'd6,8'd6,8'd6};`
188			`din2 <= {8'd7,8'd7,8'd7,8'd7};`
189			`end`
190			`447: // Writes for 8 and 9 for next macroblock`
191			`begin`
192			`din1 <= {8'd8,8'd8,8'd8,8'd8};`
193			`din2 <= {8'd9,8'd9,8'd9,8'd9};`
194			`end`
195			`default:`
196			`begin`
197			`din1 <= din1;`
198			`din2 <= din2;`
199			`end`
200			`endcase`
201
202			`end // if(ena)`
203			`end // always`
204
205			`// generate clock`
206			`always #2.5 clk <= ~clk;`
207
208
209			`// control for clk2`
210			`always @(posedge clk or negedge rst)`
211			`begin`
212			`if (~rst)`
213			`begin`
214			`clk2 <= 0;`
215			`end`
216			`else`
217			`if (ena)`
218			`begin`
219			`clk2 <= ~clk2;`
220			`end`
221			`end`
222
223			`// Display changes to the signals`
224			`always @(posedge clk2)`
225			`begin`
226			`if (ena)`
227			`begin`
228			`if (count == 511)`
229			`begin`
230			`if (dout) // eliminates 0 0 from initialization cycle`
231			`begin`
232			`$display("X offset is %d Y offset is %d", dout[31:16], dout[15:0]);`
233			`case (curcount)`
234			`3: begin`
235			`$display(" Note this search failed to find the block ");`
236			`$display(" in the upper right corrner since a log search ");`
237			`$display(" was used and on the first pass there was a tie");`
238			`$display(" between the upper left and upper right blocks");`
239			`$display(" at (8,8) and (24,8) and the first was selected");`
240			`$display(" then a local minima was found.");`
241			`end`
242			`7: begin`
243			`$display(" Note this search failed to find the block ");`
244			`$display(" in the lower left corrner since a log search ");`
245			`$display(" was used and on the first pass there was a tie ");`
246			`$display(" between the lower left and lower right blocks ");`
247			`$display(" at (8,24) and (24,24) and the second was selected");`
248			`$display(" then a local minima was found.");`
249			`$display(" ");`
250			`$display(" ");`
251			`$display(" ");`
252
253			`end`
254			`endcase`
255			`end`
256			`end`
257			`end`
258			`end`
259			`endmodule`
260