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[/] [marca/] [tags/] [INITIAL/] [vhdl/] [divider_ent.vhd] - Blame information for rev 8

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1 2 jeunes2
--  This file is part of the marca processor.
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--  Copyright (C) 2007 Wolfgang Puffitsch
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--  This program is free software; you can redistribute it and/or modify it
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--  under the terms of the GNU Library General Public License as published
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--  by the Free Software Foundation; either version 2, or (at your option)
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--  any later version.
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--  This program is distributed in the hope that it will be useful,
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--  but WITHOUT ANY WARRANTY; without even the implied warranty of
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--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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--  Library General Public License for more details.
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--  You should have received a copy of the GNU Library General Public
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--  License along with this program; if not, write to the Free Software
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--  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
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-------------------------------------------------------------------------------
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-- MARCA divider
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-------------------------------------------------------------------------------
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-- entity of a bit-serial divider
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- Wolfgang Puffitsch
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-- Computer Architecture Lab, Group 3
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-------------------------------------------------------------------------------
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library IEEE;
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use IEEE.std_logic_1164.all;
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use work.marca_pkg.all;
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entity divider is
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  generic (
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    width : integer := REG_WIDTH);
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  port (
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    clock    : in  std_logic;
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    reset    : in  std_logic;
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    trigger  : in  std_logic;
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    denom    : in  std_logic_vector(width-1 downto 0);
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    numer    : in  std_logic_vector(width-1 downto 0);
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    exc      : out std_logic;
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    busy     : out std_logic;
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    quotient : out std_logic_vector(width-1 downto 0);
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    remain   : out std_logic_vector(width-1 downto 0));
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end divider;

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