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[/] [marca/] [trunk/] [vhdl/] [marca_pkg.vhd] - Blame information for rev 8

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1 2 jeunes2
--  This file is part of the marca processor.
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--  Copyright (C) 2007 Wolfgang Puffitsch
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--  This program is free software; you can redistribute it and/or modify it
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--  under the terms of the GNU Library General Public License as published
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--  by the Free Software Foundation; either version 2, or (at your option)
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--  any later version.
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--  This program is distributed in the hope that it will be useful,
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--  but WITHOUT ANY WARRANTY; without even the implied warranty of
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--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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--  Library General Public License for more details.
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--  You should have received a copy of the GNU Library General Public
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--  License along with this program; if not, write to the Free Software
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--  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
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-------------------------------------------------------------------------------
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-- Package MARCA
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-------------------------------------------------------------------------------
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-- global definitions for MARCA processor
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- Wolfgang Puffitsch
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-- Computer Architecture Lab, Group 3
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-------------------------------------------------------------------------------
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.numeric_std.all;
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package marca_pkg is
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  -----------------------------------------------------------------------------
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  -- running at a whopping 20MHz
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  -----------------------------------------------------------------------------
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  constant CLOCK_FREQ : integer := 20000000;
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  -----------------------------------------------------------------------------
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  -- the reset-button is high when pressed
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  -----------------------------------------------------------------------------
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  constant RESET_ACTIVE : std_logic := '1';
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  -----------------------------------------------------------------------------
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  -- general constants
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  -----------------------------------------------------------------------------
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  constant REG_WIDTH : integer := 16;
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  constant REG_WIDTH_LOG : integer := 4;
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  constant REG_COUNT : integer := 16;
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  constant REG_COUNT_LOG : integer := 4;
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  constant VEC_COUNT : integer := 16;
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  constant ADDR_WIDTH : integer := 13;
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  constant DATA_WIDTH : integer := 8;
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  constant RADDR_WIDTH : integer := 8;
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  constant RDATA_WIDTH : integer := 8;
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  constant PADDR_WIDTH : integer := 13;
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  constant PDATA_WIDTH : integer := 16;
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  constant OUT_BITS : integer := 2;
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  constant IN_BITS : integer := 2;
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  -----------------------------------------------------------------------------
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  -- where to access which memory
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  -----------------------------------------------------------------------------  
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  constant MEM_MIN_ADDR   : std_logic_vector := "0000000000000000";
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  constant MEM_MAX_ADDR   : std_logic_vector := "0001111111111111";
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  constant ROM_MIN_ADDR   : std_logic_vector := "0010000000000000";
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  constant ROM_MAX_ADDR   : std_logic_vector := "0010000011111111";
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  -----------------------------------------------------------------------------
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  -- opcodes
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  -----------------------------------------------------------------------------
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  constant OPC_ADD   : std_logic_vector(3 downto 0) := "0000";
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  constant OPC_SUB   : std_logic_vector(3 downto 0) := "0001";
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  constant OPC_ADDC  : std_logic_vector(3 downto 0) := "0010";
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  constant OPC_SUBC  : std_logic_vector(3 downto 0) := "0011";
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  constant OPC_AND   : std_logic_vector(3 downto 0) := "0100";
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  constant OPC_OR    : std_logic_vector(3 downto 0) := "0101";
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  constant OPC_XOR   : std_logic_vector(3 downto 0) := "0110";
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  constant OPC_MUL   : std_logic_vector(3 downto 0) := "0111";
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  constant OPC_DIV   : std_logic_vector(3 downto 0) := "1000";
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  constant OPC_UDIV  : std_logic_vector(3 downto 0) := "1001";
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  constant OPC_LDIL  : std_logic_vector(3 downto 0) := "1010";
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  constant OPC_LDIH  : std_logic_vector(3 downto 0) := "1011";
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  constant OPC_LDIB  : std_logic_vector(3 downto 0) := "1100";
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  -- the following opcodes have this prefix
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  constant OPC_PFX_A : std_logic_vector(3 downto 0) := "1101";
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  constant OPC_MOV   : std_logic_vector(3 downto 0) := "0000";
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  constant OPC_MOD   : std_logic_vector(3 downto 0) := "0001";
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  constant OPC_UMOD  : std_logic_vector(3 downto 0) := "0010";
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  constant OPC_NOT   : std_logic_vector(3 downto 0) := "0011";
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  constant OPC_NEG   : std_logic_vector(3 downto 0) := "0100";
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  constant OPC_CMP   : std_logic_vector(3 downto 0) := "0101";
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  constant OPC_ADDI  : std_logic_vector(3 downto 0) := "0110";
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  constant OPC_CMPI  : std_logic_vector(3 downto 0) := "0111";
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  constant OPC_SHL   : std_logic_vector(3 downto 0) := "1000";
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  constant OPC_SHR   : std_logic_vector(3 downto 0) := "1001";
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  constant OPC_SAR   : std_logic_vector(3 downto 0) := "1010";
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  constant OPC_ROLC  : std_logic_vector(3 downto 0) := "1011";
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  constant OPC_RORC  : std_logic_vector(3 downto 0) := "1100";
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  constant OPC_BSET  : std_logic_vector(3 downto 0) := "1101";
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  constant OPC_BCLR  : std_logic_vector(3 downto 0) := "1110";
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  constant OPC_BTEST : std_logic_vector(3 downto 0) := "1111";
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114
  -- the following opcodes have this prefix
115
  constant OPC_PFX_B : std_logic_vector(3 downto 0) := "1110";
116
 
117
  constant OPC_LOAD  : std_logic_vector(3 downto 0) := "0000";
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  constant OPC_STORE : std_logic_vector(3 downto 0) := "0001";
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  constant OPC_LOADL : std_logic_vector(3 downto 0) := "0010";
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  constant OPC_LOADH : std_logic_vector(3 downto 0) := "0011";
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  constant OPC_LOADB : std_logic_vector(3 downto 0) := "0100";
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  constant OPC_STOREL: std_logic_vector(3 downto 0) := "0101";
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  constant OPC_STOREH: std_logic_vector(3 downto 0) := "0110";
124
  constant OPC_CALL  : std_logic_vector(3 downto 0) := "1000";
125
 
126
  -- the following opcodes have this prefix
127
  constant OPC_PFX_C : std_logic_vector(3 downto 0) := "1111";
128
 
129
  constant OPC_BR    : std_logic_vector(3 downto 0) := "0000";
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  constant OPC_BRZ   : std_logic_vector(3 downto 0) := "0001";
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  constant OPC_BRNZ  : std_logic_vector(3 downto 0) := "0010";
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  constant OPC_BRLE  : std_logic_vector(3 downto 0) := "0011";
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  constant OPC_BRLT  : std_logic_vector(3 downto 0) := "0100";
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  constant OPC_BRGE  : std_logic_vector(3 downto 0) := "0101";
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  constant OPC_BRGT  : std_logic_vector(3 downto 0) := "0110";
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  constant OPC_BRULE : std_logic_vector(3 downto 0) := "0111";
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  constant OPC_BRULT : std_logic_vector(3 downto 0) := "1000";
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  constant OPC_BRUGE : std_logic_vector(3 downto 0) := "1001";
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  constant OPC_BRUGT : std_logic_vector(3 downto 0) := "1010";
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  constant OPC_SEXT  : std_logic_vector(3 downto 0) := "1011";
141
  constant OPC_LDVEC : std_logic_vector(3 downto 0) := "1100";
142
  constant OPC_STVEC : std_logic_vector(3 downto 0) := "1101";
143
 
144
  -- the following opcodes have this prefix additionally to OPC_PFX_C
145
  constant OPC_PFX_C1 : std_logic_vector(3 downto 0) := "1110";
146
 
147
  constant OPC_JMP   : std_logic_vector(3 downto 0):= "0000";
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  constant OPC_JMPZ  : std_logic_vector(3 downto 0):= "0001";
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  constant OPC_JMPNZ : std_logic_vector(3 downto 0):= "0010";
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  constant OPC_JMPLE : std_logic_vector(3 downto 0):= "0011";
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  constant OPC_JMPLT : std_logic_vector(3 downto 0):= "0100";
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  constant OPC_JMPGE : std_logic_vector(3 downto 0):= "0101";
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  constant OPC_JMPGT : std_logic_vector(3 downto 0):= "0110";
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  constant OPC_JMPULE: std_logic_vector(3 downto 0):= "0111";
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  constant OPC_JMPULT: std_logic_vector(3 downto 0):= "1000";
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  constant OPC_JMPUGE: std_logic_vector(3 downto 0):= "1001";
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  constant OPC_JMPUGT: std_logic_vector(3 downto 0):= "1010";
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  constant OPC_INTR  : std_logic_vector(3 downto 0):= "1011";
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  constant OPC_GETIRA: std_logic_vector(3 downto 0):= "1100";
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  constant OPC_SETIRA: std_logic_vector(3 downto 0):= "1101";
161
  constant OPC_GETFL : std_logic_vector(3 downto 0):= "1110";
162
  constant OPC_SETFL : std_logic_vector(3 downto 0):= "1111";
163
 
164
  -- the following opcodes have this prefix additionally to OPC_PFX_C
165
  constant OPC_PFX_C2 : std_logic_vector(3 downto 0) := "1111";
166
 
167
  constant OPC_GETSHFL:std_logic_vector(3 downto 0):= "0000";
168
  constant OPC_SETSHFL:std_logic_vector(3 downto 0):= "0001";
169
 
170
  -- the following opcodes have this prefix additionally to OPC_PFX_C2
171
  constant OPC_PFX_C2a : std_logic_vector(3 downto 0) := "1111";
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173
  constant OPC_RETI  : std_logic_vector(3 downto 0):= "0000";
174
  constant OPC_NOP   : std_logic_vector(3 downto 0):= "0001";
175
  constant OPC_SEI   : std_logic_vector(3 downto 0):= "0010";
176
  constant OPC_CLI   : std_logic_vector(3 downto 0):= "0011";
177
  constant OPC_ERROR : std_logic_vector(3 downto 0):= "1111";
178
 
179
  -----------------------------------------------------------------------------
180
  -- definitions for the flags register
181
  -----------------------------------------------------------------------------
182
  constant FLAG_Z : integer := 0;
183
  constant FLAG_C : integer := 1;
184
  constant FLAG_V : integer := 2;
185
  constant FLAG_N : integer := 3;
186
  constant FLAG_I : integer := 4;
187
  constant FLAG_P : integer := 5;
188
 
189
  -----------------------------------------------------------------------------
190
  -- definitions for the exception vectors
191
  -----------------------------------------------------------------------------
192
  constant EXC_ERR : integer := 0;
193
  constant EXC_ALU : integer := 1;
194
  constant EXC_MEM : integer := 2;
195
 
196
  -----------------------------------------------------------------------------
197
  -- which unit to be on duty
198
  -----------------------------------------------------------------------------
199
  type UNIT_SELECTOR is (UNIT_ALU, UNIT_MEM, UNIT_INTR, UNIT_CALL);
200
 
201
  -----------------------------------------------------------------------------
202
  -- where to write a result
203
  -----------------------------------------------------------------------------
204
  type TARGET_SELECTOR is (TARGET_NONE, TARGET_REGISTER, TARGET_PC, TARGET_BOTH);
205
 
206
  -----------------------------------------------------------------------------
207
  -- the operations of the ALU
208
  -----------------------------------------------------------------------------
209
  type ALU_OP is (ALU_ADD,
210
                  ALU_SUB,
211
                  ALU_ADDC,
212
                  ALU_SUBC,
213
                  ALU_NEG,
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                  ALU_ADDI,
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                  ALU_CMPI,
216
                  ALU_BRZ,
217
                  ALU_BRNZ,
218
                  ALU_BRLE,
219
                  ALU_BRLT,
220
                  ALU_BRGE,
221
                  ALU_BRGT,
222
                  ALU_BRULE,
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                  ALU_BRULT,
224
                  ALU_BRUGE,
225
                  ALU_BRUGT,
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227
                  ALU_MUL,
228
                  ALU_DIV,
229
                  ALU_UDIV,
230
                  ALU_MOD,
231
                  ALU_UMOD,
232
 
233
                  ALU_AND,
234
                  ALU_OR,
235
                  ALU_XOR,
236
                  ALU_LDIL,
237
                  ALU_LDIH,
238
                  ALU_LDIB,
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                  ALU_MOV,
240
                  ALU_NOT,
241
                  ALU_SHL,
242
                  ALU_SHR,
243
                  ALU_SAR,
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                  ALU_ROLC,
245
                  ALU_RORC,
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                  ALU_BSET,
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                  ALU_BCLR,
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                  ALU_BTEST,
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                  ALU_SEXT,
250
                  ALU_JMP,
251
                  ALU_JMPZ,
252
                  ALU_JMPNZ,
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                  ALU_JMPLE,
254
                  ALU_JMPLT,
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                  ALU_JMPGE,
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                  ALU_JMPGT,
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                  ALU_JMPULE,
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                  ALU_JMPULT,
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                  ALU_JMPUGE,
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                  ALU_JMPUGT,
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                  ALU_GETFL,
262
                  ALU_SETFL,
263
                  ALU_GETSHFL,
264
                  ALU_SETSHFL,
265
                  ALU_INTR,
266
                  ALU_RETI,
267
                  ALU_SEI,
268
                  ALU_CLI,
269
                  ALU_NOP);
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271
  -----------------------------------------------------------------------------
272
  -- the operations of the memory unit
273
  -----------------------------------------------------------------------------
274
  type MEM_OP is (MEM_LOAD,
275
                  MEM_LOADL,
276
                  MEM_LOADH,
277
                  MEM_LOADB,
278
                  MEM_STORE,
279
                  MEM_STOREL,
280
                  MEM_STOREH,
281
                  MEM_NOP);
282
 
283
  -----------------------------------------------------------------------------
284
  -- the operations of the interrupt unit
285
  -----------------------------------------------------------------------------
286
  type INTR_OP is (INTR_INTR,
287
                   INTR_RETI,
288
                   INTR_SETIRA,
289
                   INTR_GETIRA,
290
                   INTR_STVEC,
291
                   INTR_LDVEC,
292
                   INTR_NOP);
293
 
294
  -----------------------------------------------------------------------------
295
  -- more of a hack to reduce checks against zero to a large NOR
296
  -----------------------------------------------------------------------------
297
  function zero(a : std_logic_vector) return std_logic;
298
 
299
end marca_pkg;
300
 
301
 
302
package body marca_pkg is
303
 
304
  function zero(a : std_logic_vector)
305
    return std_logic is
306
    variable result : std_logic;
307
    variable i : integer;
308
  begin
309
    result := '0';
310
    for i in a'low to a'high loop
311
      result := result or a(i);
312
    end loop;
313
    return not result;
314
  end;
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end marca_pkg;

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