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quickwayne |
/*----------------------------------------------------------------------
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*
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* Copyright (c) 2005 Xilinx, Inc. All rights reserved.
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* Xilinx, Inc.
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*
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* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
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* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
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* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR
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* STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION
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* IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE
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* FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
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* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
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* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO
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* ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE
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* FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE.
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*
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* $Header: /home/marcus/revision_ctrl_test/oc_cvs/cvs/mb-jpeg/microblaze_0/code/xmdstub.s,v 1.1 2006-06-23 18:57:05 quickwayne Exp $
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* $Id: xmdstub.s,v 1.1 2006-06-23 18:57:05 quickwayne Exp $
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*
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* XMD_stub version 1.0
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* MicroBlaze
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* Author: Göran Bilski
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* Created: 11 Juli 2001
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* Modified: 20 Sept 2001
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* Modified: 08 Nov 2001
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* Modified: 12 Mar 2002 (jece & navanee)
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* Modified: 25 Aug 2004 (navanee)
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* Modified: Jan 2005 (Raj - Added Half Word/Byte Read & Write)
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*
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----------------------------------------------------------------------*/
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.globl _start
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.text
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.align 2
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.globl xmd_stub
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.ent xmd_stub
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_start:
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xmd_stub:
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.equ uart_rx_data, DEBUG_PERIPHERAL_BASEADDRESS
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.equ uart_tx_data, DEBUG_PERIPHERAL_BASEADDRESS + 4
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.equ uart_stat, DEBUG_PERIPHERAL_BASEADDRESS + 8
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.equ uart_ctrl, DEBUG_PERIPHERAL_BASEADDRESS + 12
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.equ uart_tx_buffer_empty, 0b100
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.equ uart_rx_data_valid, 0b001
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.equ uart_rst_rx_fifo, 0b010
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.equ uart_rst_tx_fifo, 0b001
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.equ Reached_End_Of_Program, 0x00
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.equ Reached_Breakpoint, 0x01
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.equ Received_brk_signal, 0x02
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.equ ProcReset_signal, 0x03
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.equ Escape_Char, 0xFC
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.equ ReSync_Char, 0xFE
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.equ Stub_ID, 0x40
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.equ Reset_TxFifo, 0x01
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.equ Reset_RxFifo, 0x02
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.equ Clear_ExtBreak, 0x04
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.equ Intr_Enabled, 0x10
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.equ version, 3
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/*--------------------------------------------------*/
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/* MicroBlaze jump table */
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/* 0x0 - Reset address */
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/* 0x8 - Exception address */
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/* 0x10 - Interrupt address */
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/* 0x18 - Break signal address (short branch) */
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/* 0x1c - Breakpoint address (short branch) */
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/* 0x20 - Hardware Exception addr (MB ref guide) */
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/* 0x28 - Program Exit(crt1.s) (short branch) */
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/*--------------------------------------------------*/
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brki r16, StartUp_Entry
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nop
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nop
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nop
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nop
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nop
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bri Brk_Signal_Entry
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bri Debug_Entry
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nop
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nop
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bri Program_Exit
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/*--------------------------------------------------*/
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/* ReSync */
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/* - Remove any stale data from the RX and TX fifo */
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/* - Send back the stubID + version number */
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/*--------------------------------------------------*/
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ReSync:
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lwi r15, r0, uart_stat
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andi r15,r15, Intr_Enabled
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ori r15, r15, uart_rst_tx_fifo + uart_rst_rx_fifo
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swi r15, r0, uart_ctrl
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brlid r29,Wait_for_TX_space
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addi r30,r0,Stub_ID + version
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swi r30,r0,uart_tx_data
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/*--------------------------------------------------*/
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/* Main command entry code */
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/* - Wait for the next command */
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/* 0 = Download Program */
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/* 4 = Continue */
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/* 8 = Read Registers */
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/* 12 = Write Register */
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/* 16 = Read Memory */
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/* 20 = Write Memory */
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/* 24 = Resync */
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/* 28 = Return Debug Addr - Deprecated */
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/* 32 = Continue */
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/* 36 = SingleStep */
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/* 40 = Read Memory Half Word */
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/* 44 = Read Memory Byte */
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/* 48 = Write Memory Half Word */
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/* 52 = Write Memory Byte */
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/* - Call the command without any link */
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/*--------------------------------------------------*/
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Wait_for_command:
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brlid r29,Get_Char
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nop
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lwi r29,r3,jump_table
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bra r29
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/*--------------------------------------------------*/
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/* This section will end up in the rodata section */
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/* Is place here for helping understanding the code */
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/*--------------------------------------------------*/
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.rodata
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.align 2
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jump_table:
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.int Load_Memory
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.int Execute
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.int Read_Register
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.int Write_Register
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.int Read_Memory
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.int Write_Memory
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.int ReSync
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.int Return_Dbg_Addr
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.int Continue
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.int SingleStep
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.int Read_Memory_Half
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.int Read_Memory_Byte
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.int Write_Memory_Half
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.int Write_Memory_Byte
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/*--------------------------------------------------*/
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/* Go back to the text section(instruction) */
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/*--------------------------------------------------*/
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.text
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/*--------------------------------------------------*/
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/* Read all registers command */
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/* Get the values of all registers */
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/* from the register_dump where the register */
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/* values are stored */
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/* - Send all values to the terminal (through UART) */
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/* 33 words will be sent: 1-31 and pc and msr */
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/* Note that the pc value sent is always incorrect*/
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/* It has to be in the table for consistency */
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/* - Jump to the main command entry code */
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/*--------------------------------------------------*/
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Read_Register:
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addi r28, r0, register_dump+4
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addi r26, r0, 33
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Read_Register_1:
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brlid r15, Send_32Bit
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lw r5, r28, r0
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addi r26,r26,-1
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bneid r26, Read_Register_1
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addi r28,r28,4
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bri Wait_for_command
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/*--------------------------------------------------*/
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/* Write to a register value command */
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/* - Get a byte which is the register asked for */
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/* The byte has to be Register_Number*4, */
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/* since the value will be used as word address */
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/* and the addressing is always in byte addresses */
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/* ex. Want to see value of register 15 */
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/* The byte value has to be 4*15 = 60 */
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/* - Get 32 bits (4 bytes) which is the new value */
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/* for the register */
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/* - Store the new value to the stored value for */
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/* that register from the register_dump where the */
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/* register values are stored */
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/* - Jump to the main command entry code */
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/*--------------------------------------------------*/
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Write_Register:
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/* Write a register value */
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/* Next byte is which register */
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/* Next four bytes is the new register value */
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brlid r29,Get_Char
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nop
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brlid r15,Get_32Bit
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or r28,r3,r0
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swi r3,r28,register_dump
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bri Wait_for_command
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/*--------------------------------------------------*/
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/* Read from memory command */
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/* - Get 32 bits (4 bytes) which is the memory */
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/* address. */
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/* - Read the value from that memory address */
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/* for the register */
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/* - Send that value to the terminal (through UART) */
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/* - Jump to the main command entry code */
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/*--------------------------------------------------*/
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Read_Memory:
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/* Next four bytes is the address */
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/* The response will be the value in that address */
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/* send as four bytes */
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brlid r15,Get_32Bit
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nop
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brlid r15,Send_32Bit
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lw r5,r3,r0
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bri Wait_for_command
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/*--------------------------------------------------*/
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/* Read from memory Half Word command */
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/* - Get 32 bits (4 bytes) which is the memory */
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/* address. */
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/* - Read the value from that memory address */
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/* for the register */
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/* - Send that value to the terminal (through UART) */
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/* - Jump to the main command entry code */
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/*--------------------------------------------------*/
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Read_Memory_Half:
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/* Next four bytes is the address */
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/* The response will be the value in that address */
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/* send as two bytes */
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brlid r15,Get_32Bit
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nop
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brlid r15,Send_16Bit
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lhu r5,r3,r0
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bri Wait_for_command
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/*--------------------------------------------------*/
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/* Read from memory Byte command */
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| 245 |
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/* - Get 32 bits (4 bytes) which is the memory */
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/* address. */
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| 247 |
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/* - Read the value from that memory address */
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| 248 |
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/* for the register */
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| 249 |
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/* - Send that value to the terminal (through UART) */
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| 250 |
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/* - Jump to the main command entry code */
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| 251 |
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/*--------------------------------------------------*/
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| 252 |
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Read_Memory_Byte:
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| 253 |
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/* Next four bytes is the address */
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| 254 |
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/* The response will be the value in that address */
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/* send a byte */
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| 256 |
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brlid r15,Get_32Bit
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nop
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brid Send_Status
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lbu r15,r3,r0
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| 261 |
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/*--------------------------------------------------*/
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/* Write to memory command */
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| 263 |
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/* - Get 32 bits (4 bytes) which is the memory */
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| 264 |
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/* address. */
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| 265 |
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/* - Get 32 bits (4 bytes) which is the new value */
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| 266 |
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/* for that memory address. */
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| 267 |
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/* - Write the new value to the memory. */
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| 268 |
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/* - Jump to the main command entry code */
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| 269 |
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/*--------------------------------------------------*/
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| 270 |
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Write_Memory:
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| 271 |
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/* Next four byte is the address */
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| 272 |
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/* Then the next four byte is the new data */
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| 273 |
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brlid r15,Get_32Bit
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| 274 |
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nop
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| 275 |
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brlid r15,Get_32Bit
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| 276 |
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or r28,r3,r0
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| 277 |
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swi r3,r28,0
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| 278 |
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bri Wait_for_command
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| 279 |
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|
| 280 |
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Write_Memory_Half:
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| 281 |
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/* Next four bytes is the address */
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| 282 |
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/* Then the next two bytes is the new data */
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| 283 |
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brlid r15,Get_32Bit
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| 284 |
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nop
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| 285 |
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brlid r15,Get_16Bit
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| 286 |
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or r28,r3,r0
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| 287 |
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shi r3,r28,0
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| 288 |
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bri Wait_for_command
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| 289 |
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| 290 |
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Write_Memory_Byte:
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| 291 |
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/* Next four byte is the address */
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| 292 |
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/* Then the next byte is the new data */
|
| 293 |
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brlid r15,Get_32Bit
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| 294 |
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nop
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| 295 |
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brlid r29,Get_Char
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| 296 |
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or r28,r3,r0
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| 297 |
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sbi r3,r28,0
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| 298 |
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bri Wait_for_command
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| 299 |
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|
| 300 |
|
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/*--------------------------------------------------*/
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| 301 |
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/* Download program command */
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| 302 |
|
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/* - Get 32 bits (4 bytes) which is the start */
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| 303 |
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/* address for the downloading */
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| 304 |
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/* - Get 32 bits (4 bytes) which is the number of */
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| 305 |
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/* bytes in the downloading */
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| 306 |
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/* - Loop */
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| 307 |
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/* - Get a byte */
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| 308 |
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/* - Store it at the memory address */
|
| 309 |
|
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/* - Increment the memory address with 1 */
|
| 310 |
|
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/* - Decrement the number of bytes by 1 */
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| 311 |
|
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/* - Continue until all bytes has been received */
|
| 312 |
|
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/* - Jump to the main command entry code */
|
| 313 |
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/*--------------------------------------------------*/
|
| 314 |
|
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Load_Memory:
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| 315 |
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/* Next 4 bytes is the start address */
|
| 316 |
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/* The next four bytes is the number of bytes */
|
| 317 |
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brlid r15,Get_32Bit
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| 318 |
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nop
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| 319 |
|
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brlid r15,Get_32Bit
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| 320 |
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or r28,r3,r0
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| 321 |
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or r25,r3,r0
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| 322 |
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Load_Memory_1:
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| 323 |
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brlid r29,Get_Char
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| 324 |
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addi r25,r25,-1
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| 325 |
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sb r3,r28,r0
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| 326 |
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bneid r25,Load_Memory_1
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| 327 |
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addi r28,r28,1
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| 328 |
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bri Wait_for_command
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| 329 |
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| 330 |
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|
| 331 |
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|
| 332 |
|
|
/*--------------------------------------------------*/
|
| 333 |
|
|
/* NOTE : EXECUTE FOR THE SAKE OF COMPATIBILITY WITH MDK 2.2 */
|
| 334 |
|
|
/* Execute program command */
|
| 335 |
|
|
/* - Get 32 bits (4 bytes) which is the memory */
|
| 336 |
|
|
/* address. */
|
| 337 |
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|
/* - Load all register from the register_dump */
|
| 338 |
|
|
/*--------------------------------------------------*/
|
| 339 |
|
|
Execute:
|
| 340 |
|
|
/* Next four byte is the start address */
|
| 341 |
|
|
brlid r15,Get_32Bit
|
| 342 |
|
|
nop
|
| 343 |
|
|
/* Set the R16 value in the reg dump to the start addr */
|
| 344 |
|
|
/* When control falls thru to the Continue command */
|
| 345 |
|
|
/* it will start execution from the addr in the new R16 */
|
| 346 |
|
|
swi r3,r0,register_dump+64
|
| 347 |
|
|
/* Fall thru to the following Continue command */
|
| 348 |
|
|
|
| 349 |
|
|
|
| 350 |
|
|
/*--------------------------------------------------*/
|
| 351 |
|
|
/* Continue command */
|
| 352 |
|
|
/* continue at the instruction after the brk */
|
| 353 |
|
|
/* - Restore all registers */
|
| 354 |
|
|
/* - jump to the address for the BRK instruction */
|
| 355 |
|
|
/*--------------------------------------------------*/
|
| 356 |
|
|
Continue:
|
| 357 |
|
|
brlid r15, Get_All_Registers
|
| 358 |
|
|
nop
|
| 359 |
|
|
rtbd r16, 0
|
| 360 |
|
|
lwi r15,r0,register_dump+15*4
|
| 361 |
|
|
|
| 362 |
|
|
|
| 363 |
|
|
/*--------------------------------------------------*/
|
| 364 |
|
|
/* SingleStep command */
|
| 365 |
|
|
/* step single instruction without enabling */
|
| 366 |
|
|
/* the BIP flag */
|
| 367 |
|
|
/* - Restore all registers */
|
| 368 |
|
|
/* - jump to the address for the BRK instruction */
|
| 369 |
|
|
/*--------------------------------------------------*/
|
| 370 |
|
|
SingleStep:
|
| 371 |
|
|
brlid r15, Get_All_Registers
|
| 372 |
|
|
nop
|
| 373 |
|
|
rtsd r16, 0
|
| 374 |
|
|
lwi r15,r0,register_dump+15*4
|
| 375 |
|
|
|
| 376 |
|
|
/*--------------------------------------------------*/
|
| 377 |
|
|
/* When Processor resets */
|
| 378 |
|
|
/* - save all registers to the register_dump */
|
| 379 |
|
|
/* - send 0x3 ('Processor reset') to host */
|
| 380 |
|
|
/* - Jump to the main command entry code */
|
| 381 |
|
|
/*--------------------------------------------------*/
|
| 382 |
|
|
|
| 383 |
|
|
StartUp_Entry:
|
| 384 |
|
|
swi r15,r0,register_dump+60
|
| 385 |
|
|
brid Dump_All_Registers
|
| 386 |
|
|
ori r15,r0,ProcReset_signal
|
| 387 |
|
|
/* Control goes to SendStatus from DumpAllRegisters */
|
| 388 |
|
|
|
| 389 |
|
|
|
| 390 |
|
|
/*--------------------------------------------------*/
|
| 391 |
|
|
/* Program End entry */
|
| 392 |
|
|
/* When control returns from the program or */
|
| 393 |
|
|
/* on exit() */
|
| 394 |
|
|
/* - save all register to the register_dump */
|
| 395 |
|
|
/* - send 0x0 ('Reached_End_Of_Program') to host */
|
| 396 |
|
|
/* - Jump to the main command entry code */
|
| 397 |
|
|
/*--------------------------------------------------*/
|
| 398 |
|
|
|
| 399 |
|
|
Program_Exit:
|
| 400 |
|
|
swi r15,r0,register_dump+60
|
| 401 |
|
|
brid Dump_All_Registers
|
| 402 |
|
|
ori r15,r0,Reached_End_Of_Program
|
| 403 |
|
|
/* Control goes to SendStatus from DumpAllRegisters */
|
| 404 |
|
|
|
| 405 |
|
|
/*--------------------------------------------------*/
|
| 406 |
|
|
/* Debug Entry code */
|
| 407 |
|
|
/* The code that breakpoint instruction will call */
|
| 408 |
|
|
/* - Will save all registers */
|
| 409 |
|
|
/* - Send 0x01 to the host */
|
| 410 |
|
|
/* - Jump to the main command entry code */
|
| 411 |
|
|
/*--------------------------------------------------*/
|
| 412 |
|
|
Debug_Entry:
|
| 413 |
|
|
swi r15,r0,register_dump+60 /* Dump_All_regs doesnt do this */
|
| 414 |
|
|
brid Dump_All_Registers
|
| 415 |
|
|
ori r15,r0, Reached_Breakpoint
|
| 416 |
|
|
/* Control goes to SendStatus from DumpAllRegisters */
|
| 417 |
|
|
|
| 418 |
|
|
/*--------------------------------------------------*/
|
| 419 |
|
|
/* Brk signal handler */
|
| 420 |
|
|
/* - Will save all registers */
|
| 421 |
|
|
/* - Send 0x02 to the host */
|
| 422 |
|
|
/* - Jump to the main command entry code */
|
| 423 |
|
|
/*--------------------------------------------------*/
|
| 424 |
|
|
Brk_Signal_Entry:
|
| 425 |
|
|
swi r15,r0,register_dump+60 /* Dump_All_regs doesnt do this */
|
| 426 |
|
|
lwi r15, r0, uart_stat
|
| 427 |
|
|
andi r15,r15, Intr_Enabled
|
| 428 |
|
|
ori r15, r15, Clear_ExtBreak
|
| 429 |
|
|
swi r15, r0, uart_ctrl
|
| 430 |
|
|
brid Dump_All_Registers
|
| 431 |
|
|
ori r15,r0, Received_brk_signal
|
| 432 |
|
|
/* Control goes to SendStatus from DumpAllRegisters */
|
| 433 |
|
|
|
| 434 |
|
|
|
| 435 |
|
|
/* Send the status to the host */
|
| 436 |
|
|
Send_Status:
|
| 437 |
|
|
brlid r29,Wait_for_TX_space
|
| 438 |
|
|
nop
|
| 439 |
|
|
swi r15,r0,uart_tx_data
|
| 440 |
|
|
bri Wait_for_command
|
| 441 |
|
|
|
| 442 |
|
|
|
| 443 |
|
|
|
| 444 |
|
|
/*--------------------------------------------------*/
|
| 445 |
|
|
/* NOTE : ADDED FOR THE SAKE OF COMPATIBILITY WITH MDK 2.2 */
|
| 446 |
|
|
/* Return Debug Address Entry command */
|
| 447 |
|
|
/* The code will return the address for the */
|
| 448 |
|
|
/* Debug_Entry code section as four bytes */
|
| 449 |
|
|
/*--------------------------------------------------*/
|
| 450 |
|
|
Return_Dbg_Addr:
|
| 451 |
|
|
brlid r15,Send_32Bit
|
| 452 |
|
|
addi r5,r0,Debug_Entry
|
| 453 |
|
|
bri Wait_for_command
|
| 454 |
|
|
|
| 455 |
|
|
|
| 456 |
|
|
/*--------------------------------------------------*/
|
| 457 |
|
|
/* Low Level Helper routines */
|
| 458 |
|
|
/*--------------------------------------------------*/
|
| 459 |
|
|
|
| 460 |
|
|
|
| 461 |
|
|
/*--------------------------------------------------*/
|
| 462 |
|
|
/* Get a byte function */
|
| 463 |
|
|
/* - loop until a character has been received */
|
| 464 |
|
|
/* - read the character */
|
| 465 |
|
|
/* Uses: R3 */
|
| 466 |
|
|
/* Parameters: None */
|
| 467 |
|
|
/* Returns using R27 */
|
| 468 |
|
|
/* Result in: R3 */
|
| 469 |
|
|
/*--------------------------------------------------*/
|
| 470 |
|
|
Get_Byte:
|
| 471 |
|
|
/* Get 1 byte and return it in r3 */
|
| 472 |
|
|
lwi r3,r0,uart_stat
|
| 473 |
|
|
andi r3,r3,uart_rx_data_valid /* rx data present */
|
| 474 |
|
|
beqi r3, Get_Byte
|
| 475 |
|
|
lwi r3,r0,uart_rx_data
|
| 476 |
|
|
rtsd r27,8
|
| 477 |
|
|
nop
|
| 478 |
|
|
|
| 479 |
|
|
/*--------------------------------------------------*/
|
| 480 |
|
|
/* Get a char function */
|
| 481 |
|
|
/* - Get a byte from the UART */
|
| 482 |
|
|
/* - Check if it's an escape character */
|
| 483 |
|
|
/* - if it is */
|
| 484 |
|
|
/* Uses: R3, R26, R27 */
|
| 485 |
|
|
/* Parameters: None */
|
| 486 |
|
|
/* Returns using R29 */
|
| 487 |
|
|
/* Result in: R3 */
|
| 488 |
|
|
/*--------------------------------------------------*/
|
| 489 |
|
|
Get_Char:
|
| 490 |
|
|
brlid r27,Get_Byte
|
| 491 |
|
|
nop
|
| 492 |
|
|
xori r26,r3,Escape_Char
|
| 493 |
|
|
bnei r26,No_Escape
|
| 494 |
|
|
brlid r27,Get_Byte
|
| 495 |
|
|
nop
|
| 496 |
|
|
Get_Char_Return:
|
| 497 |
|
|
rtsd r29,8
|
| 498 |
|
|
nop
|
| 499 |
|
|
No_Escape:
|
| 500 |
|
|
xori r26,r3,ReSync_Char
|
| 501 |
|
|
beqi r26,ReSync
|
| 502 |
|
|
bri Get_Char_Return
|
| 503 |
|
|
|
| 504 |
|
|
/*--------------------------------------------------*/
|
| 505 |
|
|
/* Get a half word function */
|
| 506 |
|
|
/* - Get 2 bytes using Get_Char function */
|
| 507 |
|
|
/* - Store each byte in a memory location,temp_mem */
|
| 508 |
|
|
/* using store byte SBI instruction */
|
| 509 |
|
|
/* stores the received byte in the order */
|
| 510 |
|
|
/* addr+1,addr+0 */
|
| 511 |
|
|
/* Uses: R3,R29,R30,R31 */
|
| 512 |
|
|
/* Parameters: None */
|
| 513 |
|
|
/* Returns using R15 */
|
| 514 |
|
|
/* Result in: R3 */
|
| 515 |
|
|
/*--------------------------------------------------*/
|
| 516 |
|
|
Get_16Bit:
|
| 517 |
|
|
and r30,r0,r0
|
| 518 |
|
|
addi r31,r0,1
|
| 519 |
|
|
Get_16Bit_1:
|
| 520 |
|
|
/* Get the next byte */
|
| 521 |
|
|
brlid r29,Get_Char
|
| 522 |
|
|
nop
|
| 523 |
|
|
sbi r3,r31,temp_mem
|
| 524 |
|
|
addi r31,r31,-1
|
| 525 |
|
|
bgei r31,Get_16Bit_1
|
| 526 |
|
|
rtsd r15,8
|
| 527 |
|
|
lhui r3,r0,temp_mem
|
| 528 |
|
|
|
| 529 |
|
|
/*--------------------------------------------------*/
|
| 530 |
|
|
/* Get a word function */
|
| 531 |
|
|
/* - Get 4 bytes using Get_Char function */
|
| 532 |
|
|
/* - Store each byte in a memory location,temp_mem */
|
| 533 |
|
|
/* using store byte SBI instruction */
|
| 534 |
|
|
/* stores the received byte in the order */
|
| 535 |
|
|
/* addr+3,addr+2,addr+1,addr+0 */
|
| 536 |
|
|
/* Uses: R3,R29,R30,R31 */
|
| 537 |
|
|
/* Parameters: None */
|
| 538 |
|
|
/* Returns using R15 */
|
| 539 |
|
|
/* Result in: R3 */
|
| 540 |
|
|
/*--------------------------------------------------*/
|
| 541 |
|
|
Get_32Bit:
|
| 542 |
|
|
and r30,r0,r0
|
| 543 |
|
|
addi r31,r0,3
|
| 544 |
|
|
Get_32Bit_1:
|
| 545 |
|
|
/* Get the next byte */
|
| 546 |
|
|
brlid r29,Get_Char
|
| 547 |
|
|
nop
|
| 548 |
|
|
sbi r3,r31,temp_mem
|
| 549 |
|
|
addi r31,r31,-1
|
| 550 |
|
|
bgei r31,Get_32Bit_1
|
| 551 |
|
|
rtsd r15,8
|
| 552 |
|
|
lwi r3,r0,temp_mem
|
| 553 |
|
|
|
| 554 |
|
|
|
| 555 |
|
|
/*--------------------------------------------------*/
|
| 556 |
|
|
/* Wait for UART TX is become empty function */
|
| 557 |
|
|
/* - loop until UART TXC buffer is empty */
|
| 558 |
|
|
/* Uses: R25 */
|
| 559 |
|
|
/* Parameters: None */
|
| 560 |
|
|
/* Returns using R29 */
|
| 561 |
|
|
/* Result in: no result */
|
| 562 |
|
|
/*--------------------------------------------------*/
|
| 563 |
|
|
Wait_for_TX_space:
|
| 564 |
|
|
lwi r25,r0,uart_stat
|
| 565 |
|
|
andi r25,r25,uart_tx_buffer_empty /* tx buffer empty */
|
| 566 |
|
|
beqi r25, Wait_for_TX_space
|
| 567 |
|
|
rtsd r29,8
|
| 568 |
|
|
nop
|
| 569 |
|
|
|
| 570 |
|
|
/*--------------------------------------------------*/
|
| 571 |
|
|
/* Send a half word function */
|
| 572 |
|
|
/* - Store the half word to send in temp_mem */
|
| 573 |
|
|
/* - loop */
|
| 574 |
|
|
/* - Wait for TX to become empty */
|
| 575 |
|
|
/* - Read a byte out of temp_mem */
|
| 576 |
|
|
/* reads the bytes in the order */
|
| 577 |
|
|
/* addr+1,addr+0 */
|
| 578 |
|
|
/* - Send that byte (Write to the UART_TX fifo) */
|
| 579 |
|
|
/* - Repeat for all 2 bytes */
|
| 580 |
|
|
/* Uses: R3,R25,R29,R30,R31 */
|
| 581 |
|
|
/* Parameters: R5 Half Word to send */
|
| 582 |
|
|
/* Returns using R15 */
|
| 583 |
|
|
/* Result in: No result */
|
| 584 |
|
|
/*--------------------------------------------------*/
|
| 585 |
|
|
Send_16Bit:
|
| 586 |
|
|
addi r31,r0,1
|
| 587 |
|
|
brid Send_32Bit_1
|
| 588 |
|
|
shi r5,r0,temp_mem
|
| 589 |
|
|
|
| 590 |
|
|
/*--------------------------------------------------*/
|
| 591 |
|
|
/* Send a word function */
|
| 592 |
|
|
/* - Store the word to send in temp_mem */
|
| 593 |
|
|
/* - loop */
|
| 594 |
|
|
/* - Wait for TX to become empty */
|
| 595 |
|
|
/* - Read a byte out of temp_mem */
|
| 596 |
|
|
/* reads the bytes in the order */
|
| 597 |
|
|
/* addr+3,addr+2,addr+1,addr+0 */
|
| 598 |
|
|
/* - Send that byte (Write to the UART_TX fifo) */
|
| 599 |
|
|
/* - Repeat for all 4 bytes */
|
| 600 |
|
|
/* Uses: R3,R25,R29,R30,R31 */
|
| 601 |
|
|
/* Parameters: R5 Word to send */
|
| 602 |
|
|
/* Returns using R15 */
|
| 603 |
|
|
/* Result in: No result */
|
| 604 |
|
|
/*--------------------------------------------------*/
|
| 605 |
|
|
Send_32Bit:
|
| 606 |
|
|
addi r31,r0,3
|
| 607 |
|
|
swi r5,r0,temp_mem
|
| 608 |
|
|
|
| 609 |
|
|
Send_32Bit_1:
|
| 610 |
|
|
/* Wait for free space in the transmit buffer */
|
| 611 |
|
|
brlid r29, Wait_for_TX_space
|
| 612 |
|
|
|
| 613 |
|
|
/* Get the right byte from the word to transmit */
|
| 614 |
|
|
lbui r30,r31,temp_mem
|
| 615 |
|
|
swi r30,r0,uart_tx_data
|
| 616 |
|
|
|
| 617 |
|
|
addi r31,r31,-1
|
| 618 |
|
|
bgei r31, Send_32Bit_1
|
| 619 |
|
|
|
| 620 |
|
|
rtsd r15,8
|
| 621 |
|
|
nop
|
| 622 |
|
|
|
| 623 |
|
|
/*--------------------------------------------------*/
|
| 624 |
|
|
/* Save register to register_dump function */
|
| 625 |
|
|
/* - Store all registers to the register dump */
|
| 626 |
|
|
/* except R0 : makes no sense always zero */
|
| 627 |
|
|
/* R15 : needed for the return address */
|
| 628 |
|
|
/* - R15 has to saved before calling this function */
|
| 629 |
|
|
/* to the address register_dump+15*4 */
|
| 630 |
|
|
/* Uses: */
|
| 631 |
|
|
/* Parameters: */
|
| 632 |
|
|
/* Returns using R15 */
|
| 633 |
|
|
/* Result in: No result */
|
| 634 |
|
|
/*--------------------------------------------------*/
|
| 635 |
|
|
Dump_All_Registers:
|
| 636 |
|
|
/* swi r0,r0,register_dump + 0 */
|
| 637 |
|
|
swi r1,r0,register_dump + 4
|
| 638 |
|
|
swi r2,r0,register_dump + 8
|
| 639 |
|
|
swi r3,r0,register_dump+12
|
| 640 |
|
|
swi r4,r0,register_dump+16
|
| 641 |
|
|
swi r5,r0,register_dump+20
|
| 642 |
|
|
swi r6,r0,register_dump+24
|
| 643 |
|
|
swi r7,r0,register_dump+28
|
| 644 |
|
|
swi r8,r0,register_dump+32
|
| 645 |
|
|
swi r9,r0,register_dump+36
|
| 646 |
|
|
swi r10,r0,register_dump+40
|
| 647 |
|
|
swi r11,r0,register_dump+44
|
| 648 |
|
|
swi r12,r0,register_dump+48
|
| 649 |
|
|
swi r13,r0,register_dump+52
|
| 650 |
|
|
swi r14,r0,register_dump+56
|
| 651 |
|
|
/* swi r15,r0,register_dump+60 */
|
| 652 |
|
|
swi r16,r0,register_dump+64
|
| 653 |
|
|
swi r17,r0,register_dump+68
|
| 654 |
|
|
swi r18,r0,register_dump+72
|
| 655 |
|
|
swi r19,r0,register_dump+76
|
| 656 |
|
|
swi r20,r0,register_dump+80
|
| 657 |
|
|
swi r21,r0,register_dump+84
|
| 658 |
|
|
swi r22,r0,register_dump+88
|
| 659 |
|
|
swi r23,r0,register_dump+92
|
| 660 |
|
|
swi r24,r0,register_dump+96
|
| 661 |
|
|
swi r25,r0,register_dump+100
|
| 662 |
|
|
swi r26,r0,register_dump+104
|
| 663 |
|
|
swi r27,r0,register_dump+108
|
| 664 |
|
|
swi r28,r0,register_dump+112
|
| 665 |
|
|
swi r29,r0,register_dump+116
|
| 666 |
|
|
swi r30,r0,register_dump+120
|
| 667 |
|
|
swi r31,r0,register_dump+124
|
| 668 |
|
|
mfs r31, rmsr
|
| 669 |
|
|
brid Send_Status
|
| 670 |
|
|
swi r31,r0,register_dump+132
|
| 671 |
|
|
|
| 672 |
|
|
/*--------------------------------------------------*/
|
| 673 |
|
|
/* Read registers from register_dump function */
|
| 674 |
|
|
/* - Read all registers to the register dump */
|
| 675 |
|
|
/* except R0 : makes no sense always zero */
|
| 676 |
|
|
/* R15 : needed for the return address */
|
| 677 |
|
|
/* R16 : contains the debug return address*/
|
| 678 |
|
|
/* and can't be overwritten */
|
| 679 |
|
|
/* R29 : is used by the eXecute command */
|
| 680 |
|
|
/* for storing the execution address*/
|
| 681 |
|
|
/* Uses: */
|
| 682 |
|
|
/* Parameters: */
|
| 683 |
|
|
/* Returns using R15 */
|
| 684 |
|
|
/* Result in: No result */
|
| 685 |
|
|
/*--------------------------------------------------*/
|
| 686 |
|
|
Get_All_Registers:
|
| 687 |
|
|
/* lwi r0,r0,register_dump + 0 */
|
| 688 |
|
|
lwi r1,r0,register_dump + 4
|
| 689 |
|
|
lwi r2,r0,register_dump + 8
|
| 690 |
|
|
lwi r3,r0,register_dump+12
|
| 691 |
|
|
lwi r4,r0,register_dump+16
|
| 692 |
|
|
lwi r5,r0,register_dump+20
|
| 693 |
|
|
lwi r6,r0,register_dump+24
|
| 694 |
|
|
lwi r7,r0,register_dump+28
|
| 695 |
|
|
lwi r8,r0,register_dump+32
|
| 696 |
|
|
lwi r9,r0,register_dump+36
|
| 697 |
|
|
lwi r10,r0,register_dump+40
|
| 698 |
|
|
lwi r11,r0,register_dump+44
|
| 699 |
|
|
lwi r12,r0,register_dump+48
|
| 700 |
|
|
lwi r13,r0,register_dump+52
|
| 701 |
|
|
lwi r14,r0,register_dump+56
|
| 702 |
|
|
/* lwi r15,r0,register_dump+60 */
|
| 703 |
|
|
lwi r16,r0,register_dump+64
|
| 704 |
|
|
lwi r17,r0,register_dump+68
|
| 705 |
|
|
lwi r18,r0,register_dump+72
|
| 706 |
|
|
lwi r19,r0,register_dump+76
|
| 707 |
|
|
lwi r20,r0,register_dump+80
|
| 708 |
|
|
lwi r21,r0,register_dump+84
|
| 709 |
|
|
lwi r22,r0,register_dump+88
|
| 710 |
|
|
lwi r23,r0,register_dump+92
|
| 711 |
|
|
lwi r24,r0,register_dump+96
|
| 712 |
|
|
lwi r25,r0,register_dump+100
|
| 713 |
|
|
lwi r26,r0,register_dump+104
|
| 714 |
|
|
lwi r27,r0,register_dump+108
|
| 715 |
|
|
lwi r28,r0,register_dump+112
|
| 716 |
|
|
lwi r29,r0,register_dump+116
|
| 717 |
|
|
lwi r30,r0,register_dump+120
|
| 718 |
|
|
lwi r31,r0,register_dump+132
|
| 719 |
|
|
mts rmsr, r31
|
| 720 |
|
|
rtsd r15,8
|
| 721 |
|
|
lwi r31,r0,register_dump+124
|
| 722 |
|
|
|
| 723 |
|
|
/* Temporary memory needed for the byte-to-word */
|
| 724 |
|
|
/* and word-to-byte translation */
|
| 725 |
|
|
.data
|
| 726 |
|
|
.align 2
|
| 727 |
|
|
temp_mem:
|
| 728 |
|
|
.int 0
|
| 729 |
|
|
|
| 730 |
|
|
/* 34 words containing the register_dump (32 regs + pc + msr) */
|
| 731 |
|
|
.align 2
|
| 732 |
|
|
register_dump:
|
| 733 |
|
|
.fill 34, 4, 0
|
| 734 |
|
|
|
| 735 |
|
|
.end xmd_stub
|
| 736 |
|
|
|
