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<HTML><HEAD><TITLE>Xilinx System Settings Report</TITLE></HEAD>
2
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
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<center><big><big><b>System Settings</b></big></big></center><br>
4
<A NAME="Environment Settings"></A>
5
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
6
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
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<TD ALIGN=CENTER COLSPAN='5'><B> Environment Settings </B></TD>
8
</tr>
9
<tr bgcolor='#ffff99'>
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<td><b>Environment Variable</b></td>
11
<td><b>xst</b></td>
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<td><b>ngdbuild</b></td>
13
<td><b>map</b></td>
14
<td><b>par</b></td>
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</tr>
16
<tr>
17
<td>PATHEXT</td>
18
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
19
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
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<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
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<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
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</tr>
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<tr>
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<td>Path</td>
25
<td>C:\Xilinx\14.2\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.2\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\Vivado\2012.2\bin;<br>C:\Xilinx\14.2\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnu\microblaze\nt64\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnu\powerpc-eabi\nt64\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnu\arm\nt64\bin;<br>C:\Xilinx\14.2\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\common\lib\nt64;<br>C:\Program Files (x86)\Microchip\mplabc18\v3.41\mpasm;<br>C:\Program Files (x86)\Microchip\mplabc18\v3.41\bin;<br>C:\Program Files\mips\NavigatorICS\bin;<br>C:\Program Files\mips\NavigatorConsole\bin;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files (x86)\MiKTeX 2.9\miktex\bin\;<br>C:\mast;<br>C:\Program Files (x86)\MATLAB\R2007b\bin;<br>C:\Program Files (x86)\MATLAB\R2007b\bin\win32;<br>C:\Program Files (x86)\MATLAB\R2007b\toolbox\scheduling;<br>C:\Program Files (x86)\MATLAB\R2007b\toolbox\scheduling\stdemos;<br>C:\Program Files (x86)\Java\jdk1.7.0_04\bin;<br>C:\Program Files (x86)\Microchip\MPLAB C32 Suite\bin;<br>C:\Program Files (x86)\QuickTime\QTSystem\;<br>C:\Program Files (x86)\Skype\Phone\</td>
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<td>C:\Xilinx\14.2\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.2\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\Vivado\2012.2\bin;<br>C:\Xilinx\14.2\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnu\microblaze\nt64\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnu\powerpc-eabi\nt64\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnu\arm\nt64\bin;<br>C:\Xilinx\14.2\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\common\lib\nt64;<br>C:\Program Files (x86)\Microchip\mplabc18\v3.41\mpasm;<br>C:\Program Files (x86)\Microchip\mplabc18\v3.41\bin;<br>C:\Program Files\mips\NavigatorICS\bin;<br>C:\Program Files\mips\NavigatorConsole\bin;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files (x86)\MiKTeX 2.9\miktex\bin\;<br>C:\mast;<br>C:\Program Files (x86)\MATLAB\R2007b\bin;<br>C:\Program Files (x86)\MATLAB\R2007b\bin\win32;<br>C:\Program Files (x86)\MATLAB\R2007b\toolbox\scheduling;<br>C:\Program Files (x86)\MATLAB\R2007b\toolbox\scheduling\stdemos;<br>C:\Program Files (x86)\Java\jdk1.7.0_04\bin;<br>C:\Program Files (x86)\Microchip\MPLAB C32 Suite\bin;<br>C:\Program Files (x86)\QuickTime\QTSystem\;<br>C:\Program Files (x86)\Skype\Phone\</td>
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<td>C:\Xilinx\14.2\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.2\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\Vivado\2012.2\bin;<br>C:\Xilinx\14.2\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnu\microblaze\nt64\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnu\powerpc-eabi\nt64\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnu\arm\nt64\bin;<br>C:\Xilinx\14.2\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\common\lib\nt64;<br>C:\Program Files (x86)\Microchip\mplabc18\v3.41\mpasm;<br>C:\Program Files (x86)\Microchip\mplabc18\v3.41\bin;<br>C:\Program Files\mips\NavigatorICS\bin;<br>C:\Program Files\mips\NavigatorConsole\bin;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files (x86)\MiKTeX 2.9\miktex\bin\;<br>C:\mast;<br>C:\Program Files (x86)\MATLAB\R2007b\bin;<br>C:\Program Files (x86)\MATLAB\R2007b\bin\win32;<br>C:\Program Files (x86)\MATLAB\R2007b\toolbox\scheduling;<br>C:\Program Files (x86)\MATLAB\R2007b\toolbox\scheduling\stdemos;<br>C:\Program Files (x86)\Java\jdk1.7.0_04\bin;<br>C:\Program Files (x86)\Microchip\MPLAB C32 Suite\bin;<br>C:\Program Files (x86)\QuickTime\QTSystem\;<br>C:\Program Files (x86)\Skype\Phone\</td>
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<td>C:\Xilinx\14.2\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.2\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\Vivado\2012.2\bin;<br>C:\Xilinx\14.2\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnu\microblaze\nt64\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnu\powerpc-eabi\nt64\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.2\ISE_DS\EDK\gnu\arm\nt64\bin;<br>C:\Xilinx\14.2\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.2\ISE_DS\common\lib\nt64;<br>C:\Program Files (x86)\Microchip\mplabc18\v3.41\mpasm;<br>C:\Program Files (x86)\Microchip\mplabc18\v3.41\bin;<br>C:\Program Files\mips\NavigatorICS\bin;<br>C:\Program Files\mips\NavigatorConsole\bin;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files (x86)\MiKTeX 2.9\miktex\bin\;<br>C:\mast;<br>C:\Program Files (x86)\MATLAB\R2007b\bin;<br>C:\Program Files (x86)\MATLAB\R2007b\bin\win32;<br>C:\Program Files (x86)\MATLAB\R2007b\toolbox\scheduling;<br>C:\Program Files (x86)\MATLAB\R2007b\toolbox\scheduling\stdemos;<br>C:\Program Files (x86)\Java\jdk1.7.0_04\bin;<br>C:\Program Files (x86)\Microchip\MPLAB C32 Suite\bin;<br>C:\Program Files (x86)\QuickTime\QTSystem\;<br>C:\Program Files (x86)\Skype\Phone\</td>
29
</tr>
30
<tr>
31
<td>XILINX</td>
32
<td>C:\Xilinx\14.2\ISE_DS\ISE\</td>
33
<td>C:\Xilinx\14.2\ISE_DS\ISE\</td>
34
<td>C:\Xilinx\14.2\ISE_DS\ISE\</td>
35
<td>C:\Xilinx\14.2\ISE_DS\ISE\</td>
36
</tr>
37
<tr>
38
<td>XILINX_DSP</td>
39
<td>C:\Xilinx\14.2\ISE_DS\ISE</td>
40
<td>C:\Xilinx\14.2\ISE_DS\ISE</td>
41
<td>C:\Xilinx\14.2\ISE_DS\ISE</td>
42
<td>C:\Xilinx\14.2\ISE_DS\ISE</td>
43
</tr>
44
<tr>
45
<td>XILINX_EDK</td>
46
<td>C:\Xilinx\14.2\ISE_DS\EDK</td>
47
<td>C:\Xilinx\14.2\ISE_DS\EDK</td>
48
<td>C:\Xilinx\14.2\ISE_DS\EDK</td>
49
<td>C:\Xilinx\14.2\ISE_DS\EDK</td>
50
</tr>
51
<tr>
52
<td>XILINX_FOR_ALTIUM_OVERRIDE</td>
53
<td> </td>
54
<td> </td>
55
<td> </td>
56
<td> </td>
57
</tr>
58
<tr>
59
<td>XILINX_PLANAHEAD</td>
60
<td>C:\Xilinx\14.2\ISE_DS\PlanAhead</td>
61
<td>C:\Xilinx\14.2\ISE_DS\PlanAhead</td>
62
<td>C:\Xilinx\14.2\ISE_DS\PlanAhead</td>
63
<td>C:\Xilinx\14.2\ISE_DS\PlanAhead</td>
64
</tr>
65
<tr>
66
<td>XILINX_VIVADO</td>
67
<td>C:\Xilinx\Vivado\2012.2</td>
68
<td>C:\Xilinx\Vivado\2012.2</td>
69
<td>C:\Xilinx\Vivado\2012.2</td>
70
<td>C:\Xilinx\Vivado\2012.2</td>
71
</tr>
72
</TABLE>
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<A NAME="Synthesis Property Settings"></A>
74
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
75
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
76
<TD ALIGN=CENTER COLSPAN='4'><B>Synthesis Property Settings </B></TD>
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</tr>
78
<tr bgcolor='#ffff99'>
79
<td><b>Switch Name</b></td>
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<td><b>Property Name</b></td>
81
<td><b>Value</b></td>
82
<td><b>Default Value</b></td>
83
</tr>
84
<tr>
85
<td>-ifn</td>
86
<td>&nbsp;</td>
87
<td>LCDapp_MCIPopen.prj</td>
88
<td>&nbsp;</td>
89
</tr>
90
<tr>
91
<td>-ifmt</td>
92
<td>&nbsp;</td>
93
<td>mixed</td>
94
<td>MIXED</td>
95
</tr>
96
<tr>
97
<td>-ofn</td>
98
<td>&nbsp;</td>
99
<td>LCDapp_MCIPopen</td>
100
<td>&nbsp;</td>
101
</tr>
102
<tr>
103
<td>-ofmt</td>
104
<td>&nbsp;</td>
105
<td>NGC</td>
106
<td>NGC</td>
107
</tr>
108
<tr>
109
<td>-p</td>
110
<td>&nbsp;</td>
111
<td>xc3s500e-4-fg320</td>
112
<td>&nbsp;</td>
113
</tr>
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<tr>
115
<td>-top</td>
116
<td>&nbsp;</td>
117
<td>LCDapp_MCIPopen</td>
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<td>&nbsp;</td>
119
</tr>
120
<tr>
121
<td>-opt_mode</td>
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<td>Optimization Goal</td>
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<td>Speed</td>
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<td>SPEED</td>
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</tr>
126
<tr>
127
<td>-opt_level</td>
128
<td>Optimization Effort</td>
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<td>1</td>
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<td>1</td>
131
</tr>
132
<tr>
133
<td>-iuc</td>
134
<td>Use synthesis Constraints File</td>
135
<td>NO</td>
136
<td>NO</td>
137
</tr>
138
<tr>
139
<td>-keep_hierarchy</td>
140
<td>Keep Hierarchy</td>
141
<td>No</td>
142
<td>NO</td>
143
</tr>
144
<tr>
145
<td>-netlist_hierarchy</td>
146
<td>Netlist Hierarchy</td>
147
<td>As_Optimized</td>
148
<td>as_optimized</td>
149
</tr>
150
<tr>
151
<td>-rtlview</td>
152
<td>Generate RTL Schematic</td>
153
<td>Yes</td>
154
<td>NO</td>
155
</tr>
156
<tr>
157
<td>-glob_opt</td>
158
<td>Global Optimization Goal</td>
159
<td>AllClockNets</td>
160
<td>ALLCLOCKNETS</td>
161
</tr>
162
<tr>
163
<td>-read_cores</td>
164
<td>Read Cores</td>
165
<td>YES</td>
166
<td>YES</td>
167
</tr>
168
<tr>
169
<td>-write_timing_constraints</td>
170
<td>Write Timing Constraints</td>
171
<td>NO</td>
172
<td>NO</td>
173
</tr>
174
<tr>
175
<td>-cross_clock_analysis</td>
176
<td>Cross Clock Analysis</td>
177
<td>NO</td>
178
<td>NO</td>
179
</tr>
180
<tr>
181
<td>-bus_delimiter</td>
182
<td>Bus Delimiter</td>
183
<td>&lt;&gt;</td>
184
<td>&lt;&gt;</td>
185
</tr>
186
<tr>
187
<td>-slice_utilization_ratio</td>
188
<td>Slice Utilization Ratio</td>
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<td>100</td>
190
<td>100%</td>
191
</tr>
192
<tr>
193
<td>-bram_utilization_ratio</td>
194
<td>BRAM Utilization Ratio</td>
195
<td>100</td>
196
<td>100%</td>
197
</tr>
198
<tr>
199
<td>-verilog2001</td>
200
<td>Verilog 2001</td>
201
<td>YES</td>
202
<td>YES</td>
203
</tr>
204
<tr>
205
<td>-fsm_extract</td>
206
<td>&nbsp;</td>
207
<td>YES</td>
208
<td>YES</td>
209
</tr>
210
<tr>
211
<td>-fsm_encoding</td>
212
<td>&nbsp;</td>
213
<td>Auto</td>
214
<td>AUTO</td>
215
</tr>
216
<tr>
217
<td>-safe_implementation</td>
218
<td>&nbsp;</td>
219
<td>No</td>
220
<td>NO</td>
221
</tr>
222
<tr>
223
<td>-fsm_style</td>
224
<td>&nbsp;</td>
225
<td>LUT</td>
226
<td>LUT</td>
227
</tr>
228
<tr>
229
<td>-ram_extract</td>
230
<td>&nbsp;</td>
231
<td>Yes</td>
232
<td>YES</td>
233
</tr>
234
<tr>
235
<td>-ram_style</td>
236
<td>&nbsp;</td>
237
<td>Auto</td>
238
<td>AUTO</td>
239
</tr>
240
<tr>
241
<td>-rom_extract</td>
242
<td>&nbsp;</td>
243
<td>Yes</td>
244
<td>YES</td>
245
</tr>
246
<tr>
247
<td>-shreg_extract</td>
248
<td>&nbsp;</td>
249
<td>YES</td>
250
<td>YES</td>
251
</tr>
252
<tr>
253
<td>-rom_style</td>
254
<td>&nbsp;</td>
255
<td>Auto</td>
256
<td>AUTO</td>
257
</tr>
258
<tr>
259
<td>-auto_bram_packing</td>
260
<td>&nbsp;</td>
261
<td>NO</td>
262
<td>NO</td>
263
</tr>
264
<tr>
265
<td>-resource_sharing</td>
266
<td>&nbsp;</td>
267
<td>YES</td>
268
<td>YES</td>
269
</tr>
270
<tr>
271
<td>-async_to_sync</td>
272
<td>&nbsp;</td>
273
<td>NO</td>
274
<td>NO</td>
275
</tr>
276
<tr>
277
<td>-mult_style</td>
278
<td>&nbsp;</td>
279
<td>Auto</td>
280
<td>AUTO</td>
281
</tr>
282
<tr>
283
<td>-iobuf</td>
284
<td>&nbsp;</td>
285
<td>YES</td>
286
<td>YES</td>
287
</tr>
288
<tr>
289
<td>-max_fanout</td>
290
<td>&nbsp;</td>
291
<td>500</td>
292
<td>500</td>
293
</tr>
294
<tr>
295
<td>-bufg</td>
296
<td>&nbsp;</td>
297
<td>24</td>
298
<td>24</td>
299
</tr>
300
<tr>
301
<td>-register_duplication</td>
302
<td>&nbsp;</td>
303
<td>YES</td>
304
<td>YES</td>
305
</tr>
306
<tr>
307
<td>-register_balancing</td>
308
<td>&nbsp;</td>
309
<td>No</td>
310
<td>NO</td>
311
</tr>
312
<tr>
313
<td>-optimize_primitives</td>
314
<td>&nbsp;</td>
315
<td>NO</td>
316
<td>NO</td>
317
</tr>
318
<tr>
319
<td>-use_clock_enable</td>
320
<td>&nbsp;</td>
321
<td>Yes</td>
322
<td>YES</td>
323
</tr>
324
<tr>
325
<td>-use_sync_set</td>
326
<td>&nbsp;</td>
327
<td>Yes</td>
328
<td>YES</td>
329
</tr>
330
<tr>
331
<td>-use_sync_reset</td>
332
<td>&nbsp;</td>
333
<td>Yes</td>
334
<td>YES</td>
335
</tr>
336
<tr>
337
<td>-iob</td>
338
<td>&nbsp;</td>
339
<td>Auto</td>
340
<td>AUTO</td>
341
</tr>
342
<tr>
343
<td>-equivalent_register_removal</td>
344
<td>&nbsp;</td>
345
<td>YES</td>
346
<td>YES</td>
347
</tr>
348
<tr>
349
<td>-slice_utilization_ratio_maxmargin</td>
350
<td>&nbsp;</td>
351
<td>5</td>
352
<td>0%</td>
353
</tr>
354
</TABLE>
355
<A NAME="Translation Property Settings"></A>
356
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
357
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
358
<TD ALIGN=CENTER COLSPAN='4'><B>Translation Property Settings </B></TD>
359
</tr>
360
<tr bgcolor='#ffff99'>
361
<td><b>Switch Name</b></td>
362
<td><b>Property Name</b></td>
363
<td><b>Value</b></td>
364
<td><b>Default Value</b></td>
365
</tr>
366
<tr>
367
<td>-intstyle</td>
368
<td>&nbsp;</td>
369
<td>ise</td>
370
<td>None</td>
371
</tr>
372
<tr>
373
<td>-dd</td>
374
<td>&nbsp;</td>
375
<td>_ngo</td>
376
<td>None</td>
377
</tr>
378
<tr>
379
<td>-p</td>
380
<td>&nbsp;</td>
381
<td>xc3s500e-fg320-4</td>
382
<td>None</td>
383
</tr>
384
<tr>
385
<td>-uc</td>
386
<td>&nbsp;</td>
387
<td>LCDapp_MCIPopen.ucf</td>
388
<td>None</td>
389
</tr>
390
</TABLE>
391
<A NAME="Map Property Settings"></A>
392
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
393
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
394
<TD ALIGN=CENTER COLSPAN='4'><B>Map Property Settings </B></TD>
395
</tr>
396
<tr bgcolor='#ffff99'>
397
<td><b>Switch Name</b></td>
398
<td><b>Property Name</b></td>
399
<td><b>Value</b></td>
400
<td><b>Default Value</b></td>
401
</tr>
402
<tr>
403
<td>-ir</td>
404
<td>Use RLOC Constraints</td>
405
<td>OFF</td>
406
<td>OFF</td>
407
</tr>
408
<tr>
409
<td>-cm</td>
410
<td>Optimization Strategy (Cover Mode)</td>
411
<td>area</td>
412
<td>area</td>
413
</tr>
414
<tr>
415
<td>-intstyle</td>
416
<td>&nbsp;</td>
417
<td>ise</td>
418
<td>None</td>
419
</tr>
420
<tr>
421
<td>-o</td>
422
<td>&nbsp;</td>
423
<td>LCDapp_MCIPopen_map.ncd</td>
424
<td>None</td>
425
</tr>
426
<tr>
427
<td>-pr</td>
428
<td>Pack I/O Registers/Latches into IOBs</td>
429
<td>off</td>
430
<td>off</td>
431
</tr>
432
<tr>
433
<td>-p</td>
434
<td>&nbsp;</td>
435
<td>xc3s500e-fg320-4</td>
436
<td>None</td>
437
</tr>
438
</TABLE>
439
<A NAME="Place and Route Property Settings"></A>
440
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
441
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
442
<TD ALIGN=CENTER COLSPAN='4'><B>Place and Route Property Settings </B></TD>
443
</tr>
444
<tr bgcolor='#ffff99'>
445
<td><b>Switch Name</b></td>
446
<td><b>Property Name</b></td>
447
<td><b>Value</b></td>
448
<td><b>Default Value</b></td>
449
</tr>
450
<tr>
451
<td>-t</td>
452
<td>&nbsp;</td>
453
<td>1</td>
454
<td>1</td>
455
</tr>
456
<tr>
457
<td>-intstyle</td>
458
<td>&nbsp;</td>
459
<td>ise</td>
460
<td>&nbsp;</td>
461
</tr>
462
<tr>
463
<td>-ol</td>
464
<td>Place & Route Effort Level (Overall)</td>
465
<td>high</td>
466
<td>std</td>
467
</tr>
468
<tr>
469
<td>-w</td>
470
<td>&nbsp;</td>
471
<td>true</td>
472
<td>false</td>
473
</tr>
474
</TABLE>
475
<A NAME="Operating System Information"></A>
476
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
477
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
478
<TD ALIGN=CENTER COLSPAN='5'><B> Operating System Information </B></TD>
479
</tr>
480
<tr bgcolor='#ffff99'>
481
<td><b>Operating System Information</b></td>
482
<td><b>xst</b></td>
483
<td><b>ngdbuild</b></td>
484
<td><b>map</b></td>
485
<td><b>par</b></td>
486
</tr>
487
<tr>
488
<td>CPU Architecture/Speed</td>
489
<td>Intel(R) Core(TM) i3-2100 CPU @ 3.10GHz/3093 MHz</td>
490
<td>Intel(R) Core(TM) i3-2100 CPU @ 3.10GHz/3093 MHz</td>
491
<td>Intel(R) Core(TM) i3-2100 CPU @ 3.10GHz/3093 MHz</td>
492
<td>Intel(R) Core(TM) i3-2100 CPU @ 3.10GHz/3093 MHz</td>
493
</tr>
494
<tr>
495
<td>Host</td>
496
<td>dpr158b421</td>
497
<td>dpr158b421</td>
498
<td>dpr158b421</td>
499
<td>dpr158b421</td>
500
</tr>
501
<tr>
502
<td>OS Name</td>
503
<td>Microsoft Windows 7 , 64-bit</td>
504
<td>Microsoft Windows 7 , 64-bit</td>
505
<td>Microsoft Windows 7 , 64-bit</td>
506
<td>Microsoft Windows 7 , 64-bit</td>
507
</tr>
508
<tr>
509
<td>OS Release</td>
510
<td>major release  (build 7600)</td>
511
<td>major release  (build 7600)</td>
512
<td>major release  (build 7600)</td>
513
<td>major release  (build 7600)</td>
514
</tr>
515
</TABLE>
516
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