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[/] [mcip_open/] [trunk/] [tb_MCIPopen_LCD.vhd] - Blame information for rev 3

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1 3 mezzah
-- MCIPopen TestBench
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  LIBRARY ieee;
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  USE ieee.std_logic_1164.ALL;
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  USE ieee.numeric_std.ALL;
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  ENTITY tb_MCIPopen_LCD IS
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  END tb_MCIPopen_LCD;
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  ARCHITECTURE behavior OF tb_MCIPopen_LCD IS
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          SIGNAL reset :  std_logic := '1';
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          SIGNAL clk50MHz :  std_logic := '0';
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          SIGNAL direction :  std_logic := '0';
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          SIGNAL PORTA :  std_logic_vector(7 downto 0) := (others => '0');
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          SIGNAL clock_out :  std_logic;
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          SIGNAL PORTB :  std_logic_vector(7 downto 0);
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          SIGNAL PORTC :  std_logic_vector(7 downto 0);
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          SIGNAL PORTD :  std_logic_vector(7 downto 0);
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                        constant clock_period : time := 20 ns;
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  BEGIN
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  -- Component Instantiation
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          uut:  entity work.LCDapp_MCIPopen
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Generic map(    STKPTR_length   => 5,
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                                        STVREN                  => '1',
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                                        WDTPS                           => "0100",
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                                        WDTEN                           => '0',
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                                        Banks_number    => 3,
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                                        dm_TOPaddr              => x"2FF",
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                                        IAlength                => 12,
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                                        pm_TOPaddr              => '0'&x"03FFF"
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                                        )
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Port map ( reset              => reset,
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           clk50MHz           => clk50MHz,
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                          direction          => direction,
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                          clock_out          => clock_out,
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           PORTA              => PORTA,
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           PORTB              => PORTB,
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           PORTC              => PORTC,
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           PORTD              => PORTD);
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   clock_process :process
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   begin
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                clk50MHz <= '0';
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                wait for clock_period/2;
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                clk50MHz <= '1';
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                wait for clock_period/2;
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   end process;
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  --  Test Bench Statements
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     tb : PROCESS
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     BEGIN
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        wait for 100 ns; -- wait until global set/reset completes
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        reset <= '0';
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        wait; -- will wait forever
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     END PROCESS tb;
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  --  End Test Bench 
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  END;

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