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#                          COPYRIGHT (C) 2006                                 #

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#- Title       : COMPILE_TIMING.DO

#- Design      : MDCT Core

#- Author      : Michal Krepa

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#- File        : COMPILE_TIMING.DO

#- Created     : Sat April 12 2006

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#-  Description : ModelSim macro for compilation (timing simulation)

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# SIMPRIM

set XILINX $env(XILINX)

vlib simprim

vmap simprim simprim

compxlib -s mti_se -f virtex2p -l all $XILINX/vhdl/src/simprims/simprim_Vpackage_mti.vhd

compxlib -s mti_se -f virtex2p -l all $XILINX/vhdl/src/simprims/simprim_Vcomponents_mti.vhd

compxlib -s mti_se -f virtex2p -l all $XILINX/vhdl/src/simprims/simprim_VITAL_mti.vhd

vlib work

vmap work work

vcom SOURCE/MDCT_PKG.vhd

vcom SOURCE/ROME.VHD

vcom SOURCE/ROMO.VHD

vcom SOURCE/RAM.VHD

vcom SOURCE/DCT1D.VHD

vcom SOURCE/DCT2D.VHD

vcom SOURCE/DBUFCTL.VHD

vcom SYNTHESIS/MDCT_TEMP_2/MDCT_OUT.VHD

vcom SOURCE/TESTBENCH/CLKGEN.VHD

vcom SOURCE/TESTBENCH/MDCTTB_PKG.VHD

vcom SOURCE/TESTBENCH/INPIMAGE.VHD

vcom SOURCE/TESTBENCH/MDCT_TB.VHD