URL https://opencores.org/ocsvn/mdct/mdct/trunk

Subversion Repositories mdct

[/] [mdct/] [trunk/] [source/] [testbench/] [COMPILE_TIMING.DO] - Blame information for rev 27

Line No.	Rev	Author	Line
1	2	mikel262	`#-----------------------------------------------------------------------------#`
2			`# #`
3			`# M A C R O F I L E #`
4			`# COPYRIGHT (C) 2006 #`
5			`# #`
6			`#-----------------------------------------------------------------------------#`
7			`#-`
8			`#- Title : COMPILE_TIMING.DO`
9			`#- Design : MDCT Core`
10			`#- Author : Michal Krepa`
11			`#-`
12			`#-----------------------------------------------------------------------------`
13			`#-`
14			`#- File : COMPILE_TIMING.DO`
15			`#- Created : Sat April 12 2006`
16			`#-`
17			`#-----------------------------------------------------------------------------`
18			`#-`
19			`#- Description : ModelSim macro for compilation (timing simulation)`
20			`#-`
21			`#-----------------------------------------------------------------------------`
22
23			`# SIMPRIM`
24			`set XILINX $env(XILINX)`
25			`vlib simprim`
26			`vmap simprim simprim`
27
28	18	mikel262	`compxlib -s mti_se -arch all -l all -lib simprim`
29	2	mikel262	`vlib work`
30			`vmap work work`
31
32			`vcom SOURCE/MDCT_PKG.vhd`
33	18	mikel262
34			`vcom SYNTHESIS/PRECISION/PROJECT_1_IMPL_1/MDCT_OUT.VHD`
35			`vcom SOURCE/TESTBENCH/MDCTTB_PKG.VHD`
36	15	mikel262	`vcom SOURCE/TESTBENCH/random1.VHD`
37	2	mikel262	`vcom SOURCE/TESTBENCH/CLKGEN.VHD`
38			`vcom SOURCE/TESTBENCH/INPIMAGE.VHD`
39			`vcom SOURCE/TESTBENCH/MDCT_TB.VHD`