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rudi |
/////////////////////////////////////////////////////////////////////
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//// ////
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//// WISHBONE Memory Controller ////
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//// Read FIFO ////
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//// ////
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//// ////
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//// Author: Rudolf Usselmann ////
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//// rudi@asics.ws ////
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//// ////
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//// ////
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//// Downloaded from: http://www.opencores.org/cores/mem_ctrl/ ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2000 Rudolf Usselmann ////
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//// rudi@asics.ws ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////
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//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
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//// POSSIBILITY OF SUCH DAMAGE. ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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// CVS Log
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//
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// $Id: mc_rd_fifo.v,v 1.2 2001-11-29 02:16:28 rudi Exp $
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//
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// $Date: 2001-11-29 02:16:28 $
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// $Revision: 1.2 $
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// $Author: rudi $
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// $Locker: $
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// $State: Exp $
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//
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// Change History:
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// $Log: not supported by cvs2svn $
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// Revision 1.1 2001/07/29 07:34:41 rudi
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//
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//
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// 1) Changed Directory Structure
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// 2) Fixed several minor bugs
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//
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rudi |
// Revision 1.1.1.1 2001/05/13 09:39:44 rudi
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// Created Directory Structure
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//
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//
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//
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//
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`include "mc_defines.v"
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module mc_rd_fifo(clk, rst, din, we, dout, re);
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input clk, rst;
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input [35:0] din;
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input we;
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output [35:0] dout;
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input re;
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reg [3:0] rd_adr, wr_adr;
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reg [35:0] r0, r1, r2, r3;
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reg [35:0] dout;
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always @(posedge clk)
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if(!rst) rd_adr <= #1 4'h1;
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else
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if(re) rd_adr <= #1 {rd_adr[2:0], rd_adr[3]};
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always @(posedge clk)
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if(!rst) wr_adr <= #1 4'h1;
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else
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if(we) wr_adr <= #1 {wr_adr[2:0], wr_adr[3]};
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always @(posedge clk)
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if(we & wr_adr[0]) r0 <= #1 din;
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always @(posedge clk)
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if(we & wr_adr[1]) r1 <= #1 din;
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always @(posedge clk)
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if(we & wr_adr[2]) r2 <= #1 din;
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always @(posedge clk)
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if(we & wr_adr[3]) r3 <= #1 din;
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always @(rd_adr or r0 or r1 or r2 or r3 or re or we or din)
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case(rd_adr) // synopsys full_case parallel_case
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4'h1: dout = r0;
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4'h2: dout = r1;
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4'h4: dout = r2;
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4'h8: dout = r3;
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endcase
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endmodule
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