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[/] [memory_cores/] [trunk/] [dpmem/] [VECTORS.DO] - Blame information for rev 25

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echo Copyright Jamil Khatib 1999
echo
echo This test vector file is an open design, you can redistribute it and/or
echo modify it under the terms of the Openip Hardware General Public
echo License as as published by the OpenIP organization and any
echo coming versions of this license.
echo You can check the draft license at
echo http://www.openip.org/oc/license.html
echo
echo
echo Creator : Jamil Khatib
echo Date 14/5/99
echo
echo version 0.19990704
echo contact me at khatib@ieee.org
 
view source
view signals
view wave
add wave *
 
#init clk
force clk 1 10, 0 20 -r 20
 
# init reset
force reset 1 0
 
#No read nor write
force data_in 00000000 0
force wr 0 0
force re 0 0
force R_add 00000000 0
force W_add 00000000 0
run 40
 
# write only cycles
force data_in 00000000 0
force wr 1 0
force W_add 00000000 0
run 20
 
force data_in 00000001 0
force wr 1 0
force W_add 00000001 0
run 20
 
force data_in 00000011 0
force wr 1 0
force W_add 00000010 0
run 20
 
# Read only cycles
force data_in 00000000 0
force wr 0 0
force re 1 0
force R_add 00000000 0
run 20
 
force re 1 0
force R_add 00000001 0
run 20
 
force re 1 0
force R_add 00000010 0
run 20
 
 
# Read and write from different addresses
force data_in 00000111 0
force W_add 00000011 0
force R_add 00000001 0
force wr 1 0
force re 1 0
run 20
 
# Read and write from different addresses
force data_in 00001111 0
force W_add 00000100 0
force R_add 00000011 0
force wr 1 0
force re 1 0
run 20
 
 
# Read and Write from the same address
force data_in 00000000 0
force W_add 00000010 0
force R_add 00000010 0
force wr 1 0
force re 1 0
run 20
 
force data_in 00000000 0
force W_add 00000100 0
force R_add 00000100 0
force wr 1 0
force re 1 0
run 20
 
# reset system during Operation
run 10
force reset 0 0
force data_in 00000000 0
force W_add 00000100 0
force R_add 00000100 0
force wr 1 0
force re 1 0
run 20
 
force reset 1 0
force data_in 11111111 0
force W_add 00000100 0
force R_add 00000100 0
force wr 1 0
force re 1 0
run 20
run 20

Line No.	Rev	Author	Line
1	23	khatib
2			`echo Copyright Jamil Khatib 1999`
3			`echo`
4			`echo This test vector file is an open design, you can redistribute it and/or`
5			`echo modify it under the terms of the Openip Hardware General Public`
6			`echo License as as published by the OpenIP organization and any`
7			`echo coming versions of this license.`
8			`echo You can check the draft license at`
9			`echo http://www.openip.org/oc/license.html`
10			`echo`
11			`echo`
12			`echo Creator : Jamil Khatib`
13			`echo Date 14/5/99`
14			`echo`
15			`echo version 0.19990704`
16			`echo contact me at khatib@ieee.org`
17
18			`view source`
19			`view signals`
20			`view wave`
21			`add wave *`
22
23			`#init clk`
24			`force clk 1 10, 0 20 -r 20`
25
26			`# init reset`
27			`force reset 1 0`
28
29			`#No read nor write`
30			`force data_in 00000000 0`
31			`force wr 0 0`
32			`force re 0 0`
33			`force R_add 00000000 0`
34			`force W_add 00000000 0`
35			`run 40`
36
37			`# write only cycles`
38			`force data_in 00000000 0`
39			`force wr 1 0`
40			`force W_add 00000000 0`
41			`run 20`
42
43			`force data_in 00000001 0`
44			`force wr 1 0`
45			`force W_add 00000001 0`
46			`run 20`
47
48			`force data_in 00000011 0`
49			`force wr 1 0`
50			`force W_add 00000010 0`
51			`run 20`
52
53			`# Read only cycles`
54			`force data_in 00000000 0`
55			`force wr 0 0`
56			`force re 1 0`
57			`force R_add 00000000 0`
58			`run 20`
59
60			`force re 1 0`
61			`force R_add 00000001 0`
62			`run 20`
63
64			`force re 1 0`
65			`force R_add 00000010 0`
66			`run 20`
67
68
69			`# Read and write from different addresses`
70			`force data_in 00000111 0`
71			`force W_add 00000011 0`
72			`force R_add 00000001 0`
73			`force wr 1 0`
74			`force re 1 0`
75			`run 20`
76
77			`# Read and write from different addresses`
78			`force data_in 00001111 0`
79			`force W_add 00000100 0`
80			`force R_add 00000011 0`
81			`force wr 1 0`
82			`force re 1 0`
83			`run 20`
84
85
86			`# Read and Write from the same address`
87			`force data_in 00000000 0`
88			`force W_add 00000010 0`
89			`force R_add 00000010 0`
90			`force wr 1 0`
91			`force re 1 0`
92			`run 20`
93
94			`force data_in 00000000 0`
95			`force W_add 00000100 0`
96			`force R_add 00000100 0`
97			`force wr 1 0`
98			`force re 1 0`
99			`run 20`
100
101			`# reset system during Operation`
102			`run 10`
103			`force reset 0 0`
104			`force data_in 00000000 0`
105			`force W_add 00000100 0`
106			`force R_add 00000100 0`
107			`force wr 1 0`
108			`force re 1 0`
109			`run 20`
110
111			`force reset 1 0`
112			`force data_in 11111111 0`
113			`force W_add 00000100 0`
114			`force R_add 00000100 0`
115			`force wr 1 0`
116			`force re 1 0`
117			`run 20`
118			`run 20`

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[/] [memory_cores/] [trunk/] [dpmem/] [VECTORS.DO] - Blame information for rev 25