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[/] [mini_aes/] [trunk/] [data/] [xilinx_fpga.ucf] - Blame information for rev 12

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# $Id: xilinx_fpga.ucf,v 1.1.1.1 2005-12-06 02:47:48 arif_endro Exp $
 
NET "clock" TNM_NET = "clock";
TIMESPEC "TS_clock" = PERIOD "clock" 20000 ps HIGH 50 %;
NET "clock" LOC = "AD16";

Line No.	Rev	Author	Line
1	2	arif_endro	`# $Id: xilinx_fpga.ucf,v 1.1.1.1 2005-12-06 02:47:48 arif_endro Exp $`
2
3			`NET "clock" TNM_NET = "clock";`
4			`TIMESPEC "TS_clock" = PERIOD "clock" 20000 ps HIGH 50 %;`
5			`NET "clock" LOC = "AD16";`

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[/] [mini_aes/] [trunk/] [data/] [xilinx_fpga.ucf] - Blame information for rev 12