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-- ------------------------------------------------------------------------
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-- Copyright (C) 2005 Arif Endro Nugroho
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-- All rights reserved.
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--
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-- Redistribution and use in source and binary forms, with or without
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-- modification, are permitted provided that the following conditions
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-- are met:
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--
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-- 1. Redistributions of source code must retain the above copyright
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-- notice, this list of conditions and the following disclaimer.
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-- 2. Redistributions in binary form must reproduce the above copyright
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-- notice, this list of conditions and the following disclaimer in the
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-- documentation and/or other materials provided with the distribution.
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-- 3. The name of Arif Endro Nugroho may not be used to endorse or promote
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-- products derived from this software without specific prior written
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-- permission.
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--
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-- THIS SOFTWARE IS PROVIDED BY ARIF ENDRO NUGROHO "AS IS" AND ANY EXPRESS
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-- OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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-- DISCLAIMED. IN NO EVENT SHALL ARIF ENDRO NUGROHO BE LIABLE FOR ANY
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-- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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-- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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-- OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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-- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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-- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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-- POSSIBILITY OF SUCH DAMAGE.
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--
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-- End Of License.
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-- ------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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package xtime_pkg is
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function xtime_2 ( b : std_logic_vector ) return std_logic_vector;
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function xtime_4 ( c : std_logic_vector ) return std_logic_vector;
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function xtime_8 ( d : std_logic_vector ) return std_logic_vector;
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end xtime_pkg;
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package body xtime_pkg is
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function xtime_2 ( b : std_logic_vector ) return std_logic_vector is
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variable xtime_2_v : std_logic_vector (07 downto 00) := ( B"0000_0000" );
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begin
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xtime_2_v := ( b(6 downto 4) -- 7,6,5
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& (b(3 downto 2) xor (b(7) & b(7))) -- 4,3
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& b(1) -- 2
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& (b(0) xor b(7)) -- 1
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& b(7)); -- 0
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return xtime_2_v;
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end xtime_2;
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function xtime_4 ( c : std_logic_vector ) return std_logic_vector is
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variable xtime_4_v : std_logic_vector (07 downto 00) := ( B"0000_0000" );
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begin
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xtime_4_v := ( c(5) -- 7
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& c(4) -- 6
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& (c(3) xor c(7)) -- 5
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& (c(2) xor c(7) xor c(6)) -- 4
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& (c(1) xor c(6)) -- 3
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& (c(0) xor c(7)) -- 2
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& (c(7) xor c(6)) -- 1
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& c(6)); --
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return xtime_4_v;
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end xtime_4;
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function xtime_8 ( d : std_logic_vector ) return std_logic_vector is
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variable xtime_8_v : std_logic_vector (07 downto 00) := ( B"0000_0000" );
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begin
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xtime_8_v := ( d(4) -- 7
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& (d(3) xor d(7)) -- 6
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& (d(2) xor d(7) xor d(6)) -- 5
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& (d(1) xor d(6) xor d(5)) -- 4
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& (d(0) xor d(7) xor d(5)) -- 3
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& (d(7) xor d(6)) -- 2
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& (d(6) xor d(5)) -- 1
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& d(5)); -- 0
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return xtime_8_v;
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end xtime_8;
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end xtime_pkg;
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