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[/] [minirisc/] [trunk/] [scode/] [tmr_wdt.asm] - Blame information for rev 7

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;/////////////////////////////////////////////////////////////////////
;////                                                             ////
;////  Mini-RISC-1                                                ////
;////  Timer / Wachdog                                            ////
;////  Tests Timer / Wachdog                                      ////
;////                                                             ////
;////  Author: Rudolf Usselmann                                   ////
;////          russelmann@hotmail.com                             ////
;////                                                             ////
;/////////////////////////////////////////////////////////////////////
;////                                                             ////
;//// Copyright (C) 2000 Rudolf Usselmann                         ////
;////                    russelmann@hotmail.com                   ////
;////                                                             ////
;//// This source file may be used and distributed without        ////
;//// restriction provided that this copyright statement is not   ////
;//// removed from the file and that any derivative work contains ////
;//// the original copyright notice and the associated disclaimer.////
;////                                                             ////
;//// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY        ////
;//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT           ////
;//// LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND   ////
;//// FITNESS FOR A PARTICULAR PURPOSE.                           ////
;////                                                             ////
;/////////////////////////////////////////////////////////////////////
 
        list    p=16c57
        #include p16c5x.inc
 
; global Registers
r0      equ     0x8
r1      equ     0x9
r2      equ     0xa
r3      equ     0xb
r4      equ     0xc
r5      equ     0xd
r6      equ     0xe
r7      equ     0xf
 
; banked Registers
br0     equ     0x10
br1     equ     0x11
br2     equ     0x12
br3     equ     0x13
br4     equ     0x14
br5     equ     0x15
br6     equ     0x16
br7     equ     0x17
br8     equ     0x18
br9     equ     0x19
br10    equ     0x1a
br11    equ     0x1b
br12    equ     0x1c
br13    equ     0x1d
br14    equ     0x1e
br15    equ     0x1f
 
 
;       PORTB Indicates Test Number
;       PORTA Indicates Status: 0 - Running; 1 - done OK; ff - stoped on error
 
main    ; Main code entry
        ; Port IO Test
        ; All ports have a Pull up resistor
 
        ; SETUP all ports
        clrw
        movwf   FSR
        movwf   PORTA
        movwf   PORTB
        movwf   PORTC
        tris    PORTA
        tris    PORTB
        tris    PORTC
 
        ; ---------------------------------------
        ; ---- Test RMW on Register fil      ----
        ; ---------------------------------------
 
        movlw   0x01    ;       TEST 1
        movwf   PORTB   ; Set Test Number
 
        movlw   0x00
        option
        movwf   TMR0
        clrwdt
        nop
        nop
        nop
        nop
 
        clrw
        movwf   r1
 
loop2   ; repeat 256 times
        clrw
        movwf   r0
 
 
        ; repeat 256 times
loop1
        movfw   TMR0
        decfsz  r0,F
        goto    loop1
 
        decfsz  r1,F
        goto    loop2
 
 
 
        nop
        nop
        nop
        nop
        nop
        nop
 
        clrw
        movwf   TMR0
        clrwdt
 
        nop
        nop
        nop
        nop
        movlw   0x01
        movwf   PORTA
        nop
        nop
        nop
        nop
good                    ; Loop in good on success
        goto    good
        nop
        nop
        nop
        nop
 
lerr
        movlw   0xff
        movwf   PORTA
 
        nop
        nop
        nop
        nop
lerr_loop               ; Loop in lerr on failure
        goto    lerr_loop
        nop
        nop
        nop
        nop
 
   END
 

Line No.	Rev	Author	Line
1	3	lampret	`;/////////////////////////////////////////////////////////////////////`
2			`;//// ////`
3			`;//// Mini-RISC-1 ////`
4			`;//// Timer / Wachdog ////`
5			`;//// Tests Timer / Wachdog ////`
6			`;//// ////`
7			`;//// Author: Rudolf Usselmann ////`
8			`;//// russelmann@hotmail.com ////`
9			`;//// ////`
10			`;/////////////////////////////////////////////////////////////////////`
11			`;//// ////`
12			`;//// Copyright (C) 2000 Rudolf Usselmann ////`
13			`;//// russelmann@hotmail.com ////`
14			`;//// ////`
15			`;//// This source file may be used and distributed without ////`
16			`;//// restriction provided that this copyright statement is not ////`
17			`;//// removed from the file and that any derivative work contains ////`
18			`;//// the original copyright notice and the associated disclaimer.////`
19			`;//// ////`
20			`;//// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY ////`
21			`;//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT ////`
22			`;//// LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND ////`
23			`;//// FITNESS FOR A PARTICULAR PURPOSE. ////`
24			`;//// ////`
25			`;/////////////////////////////////////////////////////////////////////`
26
27			`list p=16c57`
28			`#include p16c5x.inc`
29
30			`; global Registers`
31			`r0 equ 0x8`
32			`r1 equ 0x9`
33			`r2 equ 0xa`
34			`r3 equ 0xb`
35			`r4 equ 0xc`
36			`r5 equ 0xd`
37			`r6 equ 0xe`
38			`r7 equ 0xf`
39
40			`; banked Registers`
41			`br0 equ 0x10`
42			`br1 equ 0x11`
43			`br2 equ 0x12`
44			`br3 equ 0x13`
45			`br4 equ 0x14`
46			`br5 equ 0x15`
47			`br6 equ 0x16`
48			`br7 equ 0x17`
49			`br8 equ 0x18`
50			`br9 equ 0x19`
51			`br10 equ 0x1a`
52			`br11 equ 0x1b`
53			`br12 equ 0x1c`
54			`br13 equ 0x1d`
55			`br14 equ 0x1e`
56			`br15 equ 0x1f`
57
58
59			`; PORTB Indicates Test Number`
60			`; PORTA Indicates Status: 0 - Running; 1 - done OK; ff - stoped on error`
61
62			`main ; Main code entry`
63			`; Port IO Test`
64			`; All ports have a Pull up resistor`
65
66			`; SETUP all ports`
67			`clrw`
68			`movwf FSR`
69			`movwf PORTA`
70			`movwf PORTB`
71			`movwf PORTC`
72			`tris PORTA`
73			`tris PORTB`
74			`tris PORTC`
75
76			`; ---------------------------------------`
77			`; ---- Test RMW on Register fil ----`
78			`; ---------------------------------------`
79
80			`movlw 0x01 ; TEST 1`
81			`movwf PORTB ; Set Test Number`
82
83			`movlw 0x00`
84			`option`
85			`movwf TMR0`
86			`clrwdt`
87			`nop`
88			`nop`
89			`nop`
90			`nop`
91
92			`clrw`
93			`movwf r1`
94
95			`loop2 ; repeat 256 times`
96			`clrw`
97			`movwf r0`
98
99
100			`; repeat 256 times`
101			`loop1`
102			`movfw TMR0`
103			`decfsz r0,F`
104			`goto loop1`
105
106			`decfsz r1,F`
107			`goto loop2`
108
109
110
111			`nop`
112			`nop`
113			`nop`
114			`nop`
115			`nop`
116			`nop`
117
118			`clrw`
119			`movwf TMR0`
120			`clrwdt`
121
122			`nop`
123			`nop`
124			`nop`
125			`nop`
126			`movlw 0x01`
127			`movwf PORTA`
128			`nop`
129			`nop`
130			`nop`
131			`nop`
132			`good ; Loop in good on success`
133			`goto good`
134			`nop`
135			`nop`
136			`nop`
137			`nop`
138
139			`lerr`
140			`movlw 0xff`
141			`movwf PORTA`
142
143			`nop`
144			`nop`
145			`nop`
146			`nop`
147			`lerr_loop ; Loop in lerr on failure`
148			`goto lerr_loop`
149			`nop`
150			`nop`
151			`nop`
152			`nop`
153
154			`END`
155

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[/] [minirisc/] [trunk/] [scode/] [tmr_wdt.asm] - Blame information for rev 7