URL https://opencores.org/ocsvn/miniuart2/miniuart2/trunk

Subversion Repositories miniuart2

[/] [miniuart2/] [trunk/] [impl/] [Xilinx_xc2s15/] [Xilinx.npl] - Blame information for rev 26

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JDF E
// Created by ISE ver 1.0
PROJECT Xilinx
DESIGN xilinx Normal
DEVKIT xc2s15-6cs144
DEVFAM spartan2
FLOW XST VHDL
MODULE ..\..\rtl\vhdl\Rxunit.vhd
MODSTYLE rxunit Normal
MODULE ..\..\rtl\vhdl\Txunit.vhd
MODSTYLE txunit Normal
MODULE ..\..\rtl\vhdl\miniuart.vhd
MODSTYLE uart Normal
MODULE ..\..\rtl\vhdl\utils.vhd
MODSTYLE synchroniser Normal
MODSTYLE counter Normal
[STRATEGY-LIST]
Normal=True, 1042131939

Line No.	Rev	Author	Line
1	22	philippe	`JDF E`
2			`// Created by ISE ver 1.0`
3			`PROJECT Xilinx`
4			`DESIGN xilinx Normal`
5			`DEVKIT xc2s15-6cs144`
6			`DEVFAM spartan2`
7			`FLOW XST VHDL`
8			`MODULE ..\..\rtl\vhdl\Rxunit.vhd`
9			`MODSTYLE rxunit Normal`
10			`MODULE ..\..\rtl\vhdl\Txunit.vhd`
11			`MODSTYLE txunit Normal`
12			`MODULE ..\..\rtl\vhdl\miniuart.vhd`
13			`MODSTYLE uart Normal`
14			`MODULE ..\..\rtl\vhdl\utils.vhd`
15			`MODSTYLE synchroniser Normal`
16			`MODSTYLE counter Normal`
17			`[STRATEGY-LIST]`
18			`Normal=True, 1042131939`

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Subversion Repositories miniuart2

[/] [miniuart2/] [trunk/] [impl/] [Xilinx_xc2s15/] [Xilinx.npl] - Blame information for rev 26