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[/] [miniuart2/] [trunk/] [sim/] [ModelSim/] [test_bench3/] [info.txt] - Blame information for rev 26

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1 22 philippe
This testbench will simulate a BitStream on the RxD pad. The RxUnit unserialise it and
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store it in the receive register.
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at 17.2uS, the RxD line is driven low. This is the start bit.
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from 34.4uS to 139.2uS follows the others bits from 0 to 7.
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at 139.2uS the RxD line is driven high. This is the stop bit.
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at 173.6uS the intrx_o signal goes high. This indicates that a byte has been received by
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   the Rx unit.
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at 190uS the status reg is read (adr 01). It contains the value 0x03. This indicates that
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   a char is available in the receive register (bit1 = 1).
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at 200uS the receive buffer is read. It contains the value 0x32.
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The baudrate is 57600bps.

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