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[/] [miniuart2/] [trunk/] [sim/] [rtl_sim/] [bin/] [TESTRx.CMD] - Blame information for rev 26

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Line No. Rev Author Line
1 2 philippe
| Script file for testing the receiver
2
| for multi frames
3
 
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| Initial settings
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delete_waveforms
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restart
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stepsize 50nS
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| Watched Signals and Vectors
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watch WB_CLK_I | Wishbone clock
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watch WB_RST_I
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watch WB_WE_I
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watch WB_STB_I
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watch WB_ACK_O
15 6 philippe
vector ADR WB_ADR_I[1:0]
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vector DI WB_DAT_I[7:0]
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vector DO WB_DAT_O[7:0]
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watch RxD_PAD_I | RS232 Rx Line
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watch IntRx_O   | Emit Buffer is empty
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watch BR_Clk_I
21 2 philippe
watch EnabRx
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| Stimulators Assignment
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| 1/Read SReg
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| 2/Read Byte Rx
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| 3/Read SReg
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| 4/Read Byte Rx
28 6 philippe
clock WB_CLK_I  1 0     | BR_CLK_I=10MHz
29 2 philippe
wfm WB_RST_I    @1nS=L 100nS=H 100nS=L
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wfm WB_STB_I    @1nS=L +
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                @190.001uS=H 100nS=L +
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                                @200.001uS=H 100nS=L +
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                    @210.001uS=H 100nS=L +
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                                @355.501uS=H 100nS=L
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wfm WB_WE_I             @1nS=L +
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                    @190.001uS=L +
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                @200.001uS=L +
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                    @210.001uS=L +
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                @355.501uS=L
40 6 philippe
wfm ADR                 @1nS=L +
41 2 philippe
                    @190.001uS=1\H 100nS=Z +
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                                @200.001uS=0\H 100nS=Z +
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                        @210.001uS=1\H 100nS=Z +
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                @355.501uS=0\H 100nS=Z
45
 
46 6 philippe
wfm BR_Clk_I  @0nS=L (1uS=H 1uS=L)*8000 | BR_Clk_I=500kHz
47
| BRDIVISOR=1. Baudrate=500000/1/4=125kHz (Bit period=8uS)
48 2 philippe
| Below is a generation of 50 same frames, coding 40h.
49 6 philippe
wfm RxD_PAD_I    @0nS=H +
50 2 philippe
           102.7uS=H (8uS=L 8uS=L 8uS=L 8uS=L 8uS=L 8uS=L 8uS=L 8uS=H 8uS=L 8uS=H)*50 8uS=H
51
 
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| Perform Simulation
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sim 4000uS
54
 

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