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[/] [minsoc/] [branches/] [rc-1.0/] [backend/] [spartan3a_dsp_kit/] [spartan3a_dsp_kit.ucf] - Blame information for rev 67

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1 63 rfajardo 
###########################
2 
##
3 
## Global signals
4 
##
5 2 rfajardo 
net "clk" loc = "f13";                                          #125MHz clock
6 63 rfajardo 
net "reset" loc = "j17";                                        #SW5
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###########################
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###########################
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##
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## JTAG
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##
13 15 rfajardo 
#net "jtag_tms" loc = "aa23";                                   #SAM D0
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#net "jtag_tdi" loc = "u20";                                    #SAM D2
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#net "jtag_tdo" loc = "aa25";                                           #SAM D4
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#net "jtag_tck" loc = "u18" | CLOCK_DEDICATED_ROUTE = FALSE;    #SAM D6
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#net "jtag_gnd" loc = "y23";                                    #SAM D8
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#net "jtag_vref" loc = "t20";                                   #SAM D10
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###########################
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#############################
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##
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## SPI Flash External Memory
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##
25 67 rfajardo 
#NET "spi_flash_mosi" LOC = "ab15";
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#NET "spi_flash_miso" LOC = "af24";
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#NET "spi_flash_sclk" LOC = "ae24";
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#NET "spi_flash_ss(1)" LOC = "ac25";
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#NET "spi_flash_ss(0)" LOC = "aa7";
30 63 rfajardo 
###########################
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###########################
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##
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## UART
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##
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net "uart_stx" loc = "p22";
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net "uart_srx" loc = "n21";
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###########################
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###########################
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##
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## ETH
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##
44 64 rfajardo 
NET "eth_txd(3)" LOC = "b1";
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NET "eth_txd(2)" LOC = "b2";
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NET "eth_txd(1)" LOC = "j9";
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NET "eth_txd(0)" LOC = "j8";
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NET "eth_tx_en" LOC = "d3";
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NET "eth_tx_clk" LOC = "p2";
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NET "eth_tx_er" LOC = "e4";
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NET "eth_rxd(3)" LOC = "d2";
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NET "eth_rxd(2)" LOC = "g5";
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NET "eth_rxd(1)" LOC = "g2";
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NET "eth_rxd(0)" LOC = "c2";
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NET "eth_rx_er" LOC = "j3";
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NET "eth_rx_dv" LOC = "d1";
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NET "eth_rx_clk" LOC = "p1";
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NET "eth_mdio" LOC = "f5" | PULLUP;
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NET "eth_crs" LOC = "g1";
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NET "eth_col" LOC = "y3";
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NET "eth_mdc" LOC = "f4";
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NET "eth_trste" LOC = "g4";
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NET "eth_fds_mdint" LOC = "j1";
71 63 rfajardo 
###########################
72 
 

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