OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [branches/] [verilator/] [utils/] [setup/] [configure.sh] - Blame information for rev 110

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 110 rfajardo
. beautify.sh
2
 
3
#Configuring MinSoC
4
cecho "\nConfiguring MinSoC"
5
execcmd "cd ${DIR_TO_INSTALL}/minsoc/backend/std"
6
execcmd "Configuring MinSoC as standard board (simulatable but not synthesizable)" "./configure"
7
execcmd "cd ${DIR_TO_INSTALL}"
8
 
9
 
10
#Configuring Advanced Debug System to work with MinSoC
11
cecho "\nConfiguring Advanced Debug System to work with MinSoC"
12
execcmd "cd ${DIR_TO_INSTALL}/minsoc/rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog"
13
sed "s%\`define DBG_JSP_SUPPORTED%//\`define DBG_JSP_SUPPORTED%" adbg_defines.v > TMPFILE && mv TMPFILE adbg_defines.v
14
 
15
#Compiling and moving adv_jtag_bridge debug modules for simulation
16
execcmd "cd ${DIR_TO_INSTALL}/minsoc/rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge/sim_lib/icarus"
17
execcmd "make"
18
execcmd "cp jp-io-vpi.vpi ${DIR_TO_INSTALL}/minsoc/bench/verilog/vpi"
19
 
20
#Patching OpenRISC Release 1 with Advanced Debug System patch for Watchpoints
21
execcmd "cd ${DIR_TO_INSTALL}/minsoc/rtl/verilog/or1200/rtl/verilog"
22
execcmd "patch -p0 < ${DIR_TO_INSTALL}/minsoc/rtl/verilog/adv_debug_sys/Patches/OR1200v1/or1200v1_hwbkpt.patch"
23
 
24
 
25
#Precompiling firmwares
26
cecho "\nPrecompiling delivered firmwares";
27
execcmd "cd ${DIR_TO_INSTALL}/minsoc/sw/utils"
28
execcmd "Make utils" "make"
29
 
30
execcmd "cd ${DIR_TO_INSTALL}/minsoc/sw/support"
31
execcmd "Make support tools" "make"
32
 
33
execcmd "cd ${DIR_TO_INSTALL}/minsoc/sw/drivers"
34
execcmd "Make drivers" "make"
35
 
36
execcmd "cd ${DIR_TO_INSTALL}/minsoc/sw/uart"
37
execcmd "Make UART" "make"

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.