URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [sim/] [run/] [generate_bench] - Blame information for rev 167

Line No.	Rev	Author	Line
1	30	rfajardo	`#!/bin/sh`
2	166	rfajardo	`iverilog -Wimplicit -Wportbind -Wselect-range -Wsensitivity-entire-array -c ../../prj/sim/minsoc_verilog.src -o minsoc_bench`