URL
https://opencores.org/ocsvn/minsoc/minsoc/trunk
Go to most recent revision |
Details |
Compare with Previous |
View Log
| Line No. |
Rev |
Author |
Line |
| 1 |
40 |
rfajardo |
|
| 2 |
|
|
NET "clk" LOC = E12; # 50 MHz on-board clock oscillator
|
| 3 |
|
|
NET "reset" LOC = T14; # Push Button BTN_NORTH
|
| 4 |
|
|
|
| 5 |
|
|
# UART Peripheral
|
| 6 |
|
|
NET "uart_stx" LOC = E15; # RS232 Serial port ( DTE Connector )
|
| 7 |
|
|
NET "uart_srx" LOC = F16; #
|
| 8 |
|
|
|
| 9 |
|
|
# GPIO
|
| 10 |
|
|
NET "io_pins<0>" LOC = R20;
|
| 11 |
|
|
NET "io_pins<1>" LOC = T19;
|
| 12 |
|
|
NET "io_pins<2>" LOC = U20;
|
| 13 |
|
|
NET "io_pins<3>" LOC = U19;
|
| 14 |
|
|
NET "io_pins<4>" LOC = V19;
|
| 15 |
|
|
NET "io_pins<5>" LOC = V20;
|
| 16 |
|
|
NET "io_pins<6>" LOC = Y22;
|
| 17 |
|
|
NET "io_pins<7>" LOC = W21;
|
| 18 |
|
|
|
| 19 |
|
|
NET "i_pins<0>" LOC = V8;
|
| 20 |
|
|
NET "i_pins<1>" LOC = U10;
|
| 21 |
|
|
NET "i_pins<2>" LOC = U8;
|
| 22 |
|
|
NET "i_pins<3>" LOC = T9;
|
| 23 |
|
|
NET "i_pins<4>" LOC = T16;
|
| 24 |
|
|
NET "i_pins<5>" LOC = U15;
|
| 25 |
|
|
#NET "i_pins<6>" LOC = ;
|
| 26 |
|
|
NET "i_pins<7>" LOC = T15;
|
| 27 |
|
|
|
| 28 |
|
|
#################################################################################
|
| 29 |
|
|
# Pin constraints including the IOSTANDARD and DRIVE
|
| 30 |
|
|
# Reference : Spartan-3A/3AN FPGA Starter Kit Board User Guide ( UG334 v1.1 )
|
| 31 |
|
|
#################################################################################
|
| 32 |
|
|
|
| 33 |
|
|
#NET "clk" LOC = E12 | IOSTANDARD = LVCMOS33;
|
| 34 |
|
|
#NET "uart_stx" LOC = E15 | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
|
| 35 |
|
|
#NET "uart_srx" LOC = F16 | IOSTANDARD = LVCMOS33;
|
| 36 |
|
|
#NET "reset" LOC = T14 | IOSTANDARD = LVCMOS33 | PULLDOWN ;
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.