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Subversion Repositories mips32

[/] [mips32/] [trunk/] [Classic-MIPS/] [source/] [ip/] [main_mem/] [main_mem.xci] - Blame information for rev 2

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  xilinx.com
  xci
  unknown
  1.0
  
    
      main_mem
      
      
        main_mem
        Native
        AXI4_Full
        Memory_Slave
        false
        4
        True_Dual_Port_RAM
        BRAM
        false
        No_ECC
        false
        false
        false
        false
        false
        false
        false
        false
        false
        Single_Bit_Error_Injection
        false
        9
        Minimum_Area
        8kx2
        true
        32
        8192
        32
        WRITE_FIRST
        Always_Enabled
        32
        32
        WRITE_FIRST
        Always_Enabled
        false
        false
        false
        false
        false
        false
        false
        false
        0
        false
        no_coe_file_loaded
        false
        0
        false
        false
        CE
        0
        false
        false
        CE
        0
        SYNC
        false
        100
        50
        100
        50
        100
        100
        ALL
        false
        false
        Stand_Alone
        no_mem_loaded
        NONE
        zynq
        zynq
        ./
        0
        1
        0
        0
        0
        NONE
        0
        4
        2
        9
        1
        1
        0
        no_coe_file_loaded
        main_mem.mem
        0
        0
        0
        CE
        0
        0
        0
        0
        0
        1
        WRITE_FIRST
        32
        32
        8192
        8192
        13
        0
        CE
        0
        0
        0
        0
        0
        1
        WRITE_FIRST
        32
        32
        8192
        8192
        13
        0
        0
        0
        0
        0
        0
        0
        0
        0
        0
        0
        ALL
        1
        0
        0
        0
        0
        0
        0
        0
        0
        7
        1
        Estimated Power for IP     :     22.81715 mW
        zynq
        xc7z045
        ffg900
        -2
        C
        
        VERILOG
        MIXED
        TRUE
        TRUE
        xilinx.com:zc706:part0:1.2
        TRUE
        2015.2
        6
        GLOBAL
        
        .
        .
        IP_Flow
      
      
        
          
            
            
            
            
            
            
            
            
            
            
            
            
            
            
          
        
      
    
  


Line No.	Rev	Author	Line
1	2	jjf
2
3			`xilinx.com`
4			`xci`
5			`unknown`
6			`1.0`
7
8
9			`main_mem`
10
11
12			`main_mem`
13			`Native`
14			`AXI4_Full`
15			`Memory_Slave`
16			`false`
17			`4`
18			`True_Dual_Port_RAM`
19			`BRAM`
20			`false`
21			`No_ECC`
22			`false`
23			`false`
24			`false`
25			`false`
26			`false`
27			`false`
28			`false`
29			`false`
30			`false`
31			`Single_Bit_Error_Injection`
32			`false`
33			`9`
34			`Minimum_Area`
35			`8kx2`
36			`true`
37			`32`
38			`8192`
39			`32`
40			`WRITE_FIRST`
41			`Always_Enabled`
42			`32`
43			`32`
44			`WRITE_FIRST`
45			`Always_Enabled`
46			`false`
47			`false`
48			`false`
49			`false`
50			`false`
51			`false`
52			`false`
53			`false`
54			`0`
55			`false`
56			`no_coe_file_loaded`
57			`false`
58			`0`
59			`false`
60			`false`
61			`CE`
62			`0`
63			`false`
64			`false`
65			`CE`
66			`0`
67			`SYNC`
68			`false`
69			`100`
70			`50`
71			`100`
72			`50`
73			`100`
74			`100`
75			`ALL`
76			`false`
77			`false`
78			`Stand_Alone`
79			`no_mem_loaded`
80			`NONE`
81			`zynq`
82			`zynq`
83			`./`
84			`0`
85			`1`
86			`0`
87			`0`
88			`0`
89			`NONE`
90			`0`
91			`4`
92			`2`
93			`9`
94			`1`
95			`1`
96			`0`
97			`no_coe_file_loaded`
98			`main_mem.mem`
99			`0`
100			`0`
101			`0`
102			`CE`
103			`0`
104			`0`
105			`0`
106			`0`
107			`0`
108			`1`
109			`WRITE_FIRST`
110			`32`
111			`32`
112			`8192`
113			`8192`
114			`13`
115			`0`
116			`CE`
117			`0`
118			`0`
119			`0`
120			`0`
121			`0`
122			`1`
123			`WRITE_FIRST`
124			`32`
125			`32`
126			`8192`
127			`8192`
128			`13`
129			`0`
130			`0`
131			`0`
132			`0`
133			`0`
134			`0`
135			`0`
136			`0`
137			`0`
138			`0`
139			`0`
140			`ALL`
141			`1`
142			`0`
143			`0`
144			`0`
145			`0`
146			`0`
147			`0`
148			`0`
149			`0`
150			`7`
151			`1`
152			`Estimated Power for IP : 22.81715 mW`
153			`zynq`
154			`xc7z045`
155			`ffg900`
156			`-2`
157			`C`
158
159			`VERILOG`
160			`MIXED`
161			`TRUE`
162			`TRUE`
163			`xilinx.com:zc706:part0:1.2`
164			`TRUE`
165			`2015.2`
166			`6`
167			`GLOBAL`
168
169			`.`
170			`.`
171			`IP_Flow`
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195

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Subversion Repositories mips32

[/] [mips32/] [trunk/] [Classic-MIPS/] [source/] [ip/] [main_mem/] [main_mem.xci] - Blame information for rev 2