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[/] [mips32/] [trunk/] [Classic-MIPS/] [source/] [src/] [bypath_ctr.v] - Blame information for rev 2

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Line No. Rev Author Line
1 2 jjf
`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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// Company: 
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// Engineer: 
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// 
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// Create Date: 2017/01/13 13:11:37
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// Design Name: 
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// Module Name: bypath_ctr
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// Project Name: 
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// Target Devices: 
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// Tool Versions: 
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// Description: 
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// 
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// Dependencies: 
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// 
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// Revision:
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// Revision 0.01 - File Created
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// Additional Comments:
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// 
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//////////////////////////////////////////////////////////////////////////////////
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module bypath_ctr(
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input wire [4:0]        id_ex_rs,
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input wire [4:0]        id_ex_rt,
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input wire [4:0]        ex_mem_rd,
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input wire [4:0]        mem_wb_rd,
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input wire              ex_mem_regwrite_flag,
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input wire              mem_wb_regwrite_flag,
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output wire [1:0]       forward_a,
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output wire [1:0]       forward_b
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    );
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    wire forwardA_ex_mem_condition;
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    wire forwardA_mem_wb_condition;
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    wire forwardB_ex_mem_condition;
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    wire forwardB_mem_wb_condition;
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    assign forwardA_ex_mem_condition = (ex_mem_regwrite_flag == 1'b1) && (ex_mem_rd != 0) && (ex_mem_rd == id_ex_rs);
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//    assign forwardA_mem_wb_condition = (mem_wb_regwrite_flag == 1'b1) && (mem_wb_rd != 0) && ( mem_wb_rd == id_ex_rs) && 
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//    ( !((ex_mem_regwrite_flag == 1'b1) && (ex_mem_rd != 0) && ( ex_mem_rd != id_ex_rs)) );
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    assign forwardA_mem_wb_condition = (mem_wb_regwrite_flag == 1'b1) && (mem_wb_rd != 0) && ( mem_wb_rd == id_ex_rs);
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    assign forwardB_ex_mem_condition = (ex_mem_regwrite_flag == 1'b1) && (ex_mem_rd != 0) && (ex_mem_rd == id_ex_rt);
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//    assign forwardB_mem_wb_condition = (mem_wb_regwrite_flag == 1'b1) && (mem_wb_rd != 0) && ( mem_wb_rd == id_ex_rt) && 
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//    ( !((ex_mem_regwrite_flag == 1'b1) && (ex_mem_rd != 0) && ( ex_mem_rd != id_ex_rt)) );
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    assign forwardB_mem_wb_condition = (mem_wb_regwrite_flag == 1'b1) && (mem_wb_rd != 0) && ( mem_wb_rd == id_ex_rt);
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    function [1:0]  FORWARD;
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    input       ex_mem_condition;
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    input       mem_wb_condition;
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    begin
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        if( ex_mem_condition )
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            FORWARD = 2'b10;
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        else if( mem_wb_condition )
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            FORWARD = 2'b01;
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        else
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            FORWARD = 2'b00;
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    end
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    endfunction
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    assign forward_a = FORWARD(forwardA_ex_mem_condition, forwardA_mem_wb_condition);
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    assign forward_b = FORWARD(forwardB_ex_mem_condition, forwardB_mem_wb_condition);
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endmodule

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