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[/] [mips32r1/] [trunk/] [Hardware/] [XUPV5-LX110T_SoC/] [MIPS32-Pipelined-Hw/] [src/] [Top.ucf] - Blame information for rev 3

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Line No. Rev Author Line
1 3 ayersg
 
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# Clock and Reset
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NET "clock_100Mhz" LOC = AH15 | IOSTANDARD = LVCMOS33; # 100 MHz
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NET "clock_100MHz" TNM_NET = "BOARD_CLK";
5 2 ayersg
TIMESPEC "TS_BOARD_CLK" = PERIOD "BOARD_CLK" 10 ns HIGH 50 %;
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NET "reset_n"      LOC = E9   | IOSTANDARD = LVCMOS33;
7 3 ayersg
 
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# UART
9 2 ayersg
NET "UART_Rx" LOC = AG15 | IOSTANDARD = LVCMOS33;
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NET "UART_Tx" LOC = AG20 | IOSTANDARD = LVCMOS33;
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# LCD Screen
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NET "lcd[6]"  LOC = T11  | IOSTANDARD = LVCMOS33;   #D_4
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NET "lcd[5]"  LOC = G6   | IOSTANDARD = LVCMOS33;   #D_3
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NET "lcd[4]"  LOC = G7   | IOSTANDARD = LVCMOS33;   #D_2
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NET "lcd[3]"  LOC = T9   | IOSTANDARD = LVCMOS33;   #D_1
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NET "lcd[2]"  LOC = AC9  | IOSTANDARD = LVCMOS33;   #E
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NET "lcd[1]"  LOC = J17  | IOSTANDARD = LVCMOS25;   #RS
19 3 ayersg
NET "lcd[0]"  LOC = AC10 | IOSTANDARD = LVCMOS33;   #RW
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# General-Purpose LEDs
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NET "LED[0]"  LOC = AE24 | IOSTANDARD = SSTL18_I;   # LED 7
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NET "LED[1]"  LOC = AD24 | IOSTANDARD = SSTL18_I;   # LED 6
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NET "LED[2]"  LOC = AD25 | IOSTANDARD = SSTL18_I;   # LED 5
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NET "LED[3]"  LOC = G16  | IOSTANDARD = LVCMOS25;   # LED 4
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NET "LED[4]"  LOC = AD26 | IOSTANDARD = SSTL18_I;   # LED 3
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NET "LED[5]"  LOC = G15  | IOSTANDARD = LVCMOS25;   # LED 2
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NET "LED[6]"  LOC = L18  | IOSTANDARD = LVCMOS25;   # LED 1
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NET "LED[7]"  LOC = H18  | IOSTANDARD = LVCMOS25;   # LED 0
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NET "LED[8]"  LOC = E8   | IOSTANDARD = LVCMOS33;   # LED Center
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NET "LED[9]"  LOC = AF23 | IOSTANDARD = LVCMOS33;   # LED West
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NET "LED[10]" LOC = AG12 | IOSTANDARD = LVCMOS33;   # LED South
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NET "LED[11]" LOC = AG23 | IOSTANDARD = LVCMOS33;   # LED East
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NET "LED[12]" LOC = AF13 | IOSTANDARD = LVCMOS33;   # LED North
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NET "LED[13]" LOC = F6   | IOSTANDARD = LVCMOS33;   # LED Error 1
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NET "LED[14]" LOC = T10  | IOSTANDARD = LVCMOS33;   # LED Error 2
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# Piezo Transducer
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NET "Piezo" LOC = G30 | IOSTANDARD = SSTL18_I;
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# General Purpose Switches
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NET "Switch[7]" LOC = U25  | IOSTANDARD = SSTL18_I; # DIP 1
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NET "Switch[6]" LOC = AG27 | IOSTANDARD = SSTL18_I; # DIP 2
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NET "Switch[5]" LOC = AF25 | IOSTANDARD = SSTL18_I; # DIP 3
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NET "Switch[4]" LOC = AF26 | IOSTANDARD = SSTL18_I; # DIP 4
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NET "Switch[3]" LOC = AE27 | IOSTANDARD = SSTL18_I; # DIP 5
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NET "Switch[2]" LOC = AE26 | IOSTANDARD = SSTL18_I; # DIP 6
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NET "Switch[1]" LOC = AC25 | IOSTANDARD = SSTL18_I; # DIP 7
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NET "Switch[0]" LOC = AC24 | IOSTANDARD = SSTL18_I; # DIP 8
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# Main IIC Bus
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NET "i2c_scl" LOC = F9 | IOSTANDARD = LVCMOS33; # IIC_Main SCL
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NET "i2c_sda" LOC = F8 | IOSTANDARD = LVCMOS33; # IIC_Main SDA

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