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[/] [mips789/] [branches/] [avendor/] [quartus2/] [mips_top.qsf] - Blame information for rev 53

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# Copyright (C) 1991-2004 Altera Corporation
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# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
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# support information,  device programming or simulation file,  and any other
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# associated  documentation or information  provided by  Altera  or a partner
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# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
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# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
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# other  use  of such  megafunction  design,  netlist,  support  information,
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# device programming or simulation file,  or any other  related documentation
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# or information  is prohibited  for  any  other purpose,  including, but not
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# limited to  modification,  reverse engineering,  de-compiling, or use  with
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# any other  silicon devices,  unless such use is  explicitly  licensed under
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# a separate agreement with  Altera  or a megafunction partner.  Title to the
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# intellectual property,  including patents,  copyrights,  trademarks,  trade
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# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
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# support  information,  device programming or simulation file,  or any other
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# related documentation or information provided by  Altera  or a megafunction
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# partner, remains with Altera, the megafunction partner, or their respective
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# licensors. No other licenses, including any licenses needed under any third
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# party's intellectual property, are provided herein.
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# The default values for assignments are stored in the file
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#               mips_top_assignment_defaults.qdf
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# If this file doesn't exist, and for assignments not listed, see file
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#               assignment_defaults.qdf
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# Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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# Project-Wide Assignments
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# ========================
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.2
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:48:42  NOVEMBER 13, 2008"
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set_global_assignment -name LAST_QUARTUS_VERSION 4.2
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set_global_assignment -name VQM_FILE ../synplify_prj/rev_1/mips_sys.vqm
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set_global_assignment -name VERILOG_FILE ../rtl/verilog/altera/pll50.v
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set_global_assignment -name VERILOG_FILE ../rtl/verilog/altera/ram2048x8_0.v
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set_global_assignment -name VERILOG_FILE ../rtl/verilog/altera/ram2048x8_1.v
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set_global_assignment -name VERILOG_FILE ../rtl/verilog/altera/ram2048x8_2.v
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set_global_assignment -name VERILOG_FILE ../rtl/verilog/altera/ram2048x8_3.v
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set_global_assignment -name VERILOG_FILE ../rtl/verilog/mips_top.v
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set_global_assignment -name VERILOG_FILE ../rtl/verilog/ram_module.v
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# Pin & Location Assignments
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# ==========================
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set_location_assignment PIN_28 -to clk
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set_location_assignment PIN_159 -to rst
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set_location_assignment PIN_156 -to key1
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set_location_assignment PIN_158 -to key2
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set_location_assignment PIN_1 -to led1
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set_location_assignment PIN_2 -to led2
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set_location_assignment PIN_177 -to ser_rxd
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set_location_assignment PIN_176 -to ser_txd
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set_location_assignment PIN_135 -to lcd_en
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set_location_assignment PIN_133 -to lcd_rs
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set_location_assignment PIN_134 -to lcd_rw
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set_location_assignment PIN_136 -to lcd_data[0]
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set_location_assignment PIN_137 -to lcd_data[1]
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set_location_assignment PIN_138 -to lcd_data[2]
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set_location_assignment PIN_139 -to lcd_data[3]
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set_location_assignment PIN_140 -to lcd_data[4]
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set_location_assignment PIN_141 -to lcd_data[5]
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set_location_assignment PIN_143 -to lcd_data[6]
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set_location_assignment PIN_144 -to lcd_data[7]
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set_location_assignment PIN_169 -to seg7led1[0]
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set_location_assignment PIN_166 -to seg7led1[1]
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set_location_assignment PIN_161 -to seg7led1[2]
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set_location_assignment PIN_160 -to seg7led1[3]
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set_location_assignment PIN_164 -to seg7led1[4]
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set_location_assignment PIN_168 -to seg7led1[5]
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set_location_assignment PIN_167 -to seg7led1[6]
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set_location_assignment PIN_175 -to seg7led2[0]
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set_location_assignment PIN_170 -to seg7led2[1]
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set_location_assignment PIN_163 -to seg7led2[2]
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set_location_assignment PIN_165 -to seg7led2[3]
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set_location_assignment PIN_162 -to seg7led2[4]
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set_location_assignment PIN_174 -to seg7led2[5]
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set_location_assignment PIN_173 -to seg7led2[6]
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# Analysis & Synthesis Assignments
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# ================================
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set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240
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set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 6
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set_global_assignment -name FAMILY Cyclone
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set_global_assignment -name TOP_LEVEL_ENTITY mips_top
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# Fitter Assignments
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# ==================
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set_global_assignment -name DEVICE EP1C6Q240C6
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set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
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# Simulator Assignments
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# =====================
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set_global_assignment -name GLITCH_INTERVAL 1
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# LogicLock Region Assignments
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# ============================
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set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT off

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