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[/] [mips789/] [branches/] [avendor/] [quartus2/] [mips_top.tan.summary] - Blame information for rev 53

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Line No. Rev Author Line
1 15 mcupro 
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Timing Analyzer Summary
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5 
Type           : Worst-case tsu
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Slack          : N/A
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Required Time  : None
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Actual Time    : 5.491 ns
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From           : key1
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To             : mips_sys:isys|mips_dvc:imips_dvc|r_key1
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From Clock     :
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To Clock       : clk
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Failed Paths   : 0
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Type           : Worst-case tco
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Slack          : N/A
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Required Time  : None
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Actual Time    : 6.738 ns
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From           : mips_sys:isys|mips_dvc:imips_dvc|cmd_6
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To             : led2
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From Clock     : clk
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To Clock       :
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Failed Paths   : 0
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Type           : Worst-case th
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Slack          : N/A
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Required Time  : None
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Actual Time    : -4.639 ns
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From           : rst
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To             : r_rst
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From Clock     :
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To Clock       : clk
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Failed Paths   : 0
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Type           : Clock Setup: 'pll50:Ipll|altpll:altpll_component|_clk0'
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Slack          : 0.083 ns
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Required Time  : 50.00 MHz ( period = 20.000 ns )
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Actual Time    : 50.21 MHz ( period = 19.917 ns )
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From           : mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23
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To             : mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg5
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From Clock     : pll50:Ipll|altpll:altpll_component|_clk0
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To Clock       : pll50:Ipll|altpll:altpll_component|_clk0
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Failed Paths   : 0
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Type           : Clock Hold: 'pll50:Ipll|altpll:altpll_component|_clk0'
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Slack          : 0.566 ns
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Required Time  : 50.00 MHz ( period = 20.000 ns )
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Actual Time    : N/A
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From           : mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|delay_counter_Sreg0[0]
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To             : mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|delay_counter_Sreg0[0]
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From Clock     : pll50:Ipll|altpll:altpll_component|_clk0
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To Clock       : pll50:Ipll|altpll:altpll_component|_clk0
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Failed Paths   : 0
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Type           : Total number of failed paths
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Slack          :
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Required Time  :
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Actual Time    :
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From           :
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To             :
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From Clock     :
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To Clock       :
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Failed Paths   : 0
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