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[/] [mips789/] [branches/] [avendor/] [verilog/] [altera_ram/] [transcript] - Blame information for rev 53

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# Reading C:/Modeltech_5.8e/tcl/vsim/pref.tcl
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# //  ModelSim SE 5.8e Aug 28 2004
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# //
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# //  Copyright Model Technology, a Mentor Graphics Corporation company, 2004
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# //                         All Rights Reserved.
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# //                   UNPUBLISHED, LICENSED SOFTWARE.
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# //         CONFIDENTIAL AND PROPRIETARY INFORMATION WHICH IS THE
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# //        PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS.
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# //
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#  OpenFile "G:/core/verilog/altera_ram/ram2048x8_2.v"

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