OpenCores
URL https://opencores.org/ocsvn/mips789/mips789/trunk

Subversion Repositories mips789

[/] [mips789/] [branches/] [mcupro/] [bench/] [led/] [mips_led.v] - Blame information for rev 59

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 4 mcupro
 
2
 
3
module mips_led (clk,key2,rst,cop_data,irq_addr,seg7led1,seg7led2) ;
4
input clk;
5
wire clk;
6
input key2;
7
wire key2;
8
input rst;
9
wire rst;
10
input [31:0] cop_data;
11
wire [31:0] cop_data;
12
input [31:0] irq_addr;
13
wire [31:0] irq_addr;
14
output [6:0] seg7led1;
15
wire [6:0] seg7led1;
16
output [6:0] seg7led2;
17
wire [6:0] seg7led2;
18
 
19
wire [31:0] cop_addr;
20
wire [3:0] cop_mem_ctl;
21
wire [31:0] data2cop;
22
wire [31:0] data2core;
23
wire [31:0] data2mem;
24
wire [31:0] ins2core;
25
wire [31:0] mem_Addr;
26
wire [31:0] pc;
27
wire [3:0] wr_en;
28
 
29
mips_core1 mips_core_
30
(
31
        .clk(clk),
32
        .cop_addr_o(cop_addr),
33
        .cop_data_o(data2cop),
34
        .cop_dout(cop_data),
35
        .cop_mem_ctl_o(cop_mem_ctl),
36
        .irq_addr(irq_addr),
37
        .irq_i(key2),
38
        .rst(rst),
39
        .zz_addr_o(mem_Addr),
40
        .zz_din(data2core),
41
        .zz_dout(data2mem),
42
        .zz_ins_i(ins2core),
43
        .zz_pc_o(pc),
44
        .zz_wr_en_o(wr_en)
45
);
46
 
47
 
48
 
49
mem_array ram_4k
50
(
51
        .clk(clk),
52
        .din(data2mem),
53
        .dout(data2core),
54
        .ins_o(ins2core),
55
        .pc_i(pc),
56
        .rd_addr_i(mem_Addr),
57
        .wr_addr_i(mem_Addr),
58
        .wren(wr_en)
59
);
60
 
61
 
62
 
63
mips_seg7led seg7led
64
(
65
        .addr_i(cop_addr),
66
        .clk(clk),
67
        .din(data2cop),
68
        .dmem_ctl_i(cop_mem_ctl),
69
        .rst(rst),
70
        .seg7led1(seg7led1),
71
        .seg7led2(seg7led2)
72
);
73
 
74
 
75
 
76
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.